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Cortex-M7: Add support for enabled the D-Cache in write only mode.

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SAMV7 Ethernet:  I- and D-Cache are now enabled in the netnsh/ configuration.  D-Cache is enabled in write-though mode.  This mode is necessary because the DMA descriptors are each 8-bytes in size but the D-Cache cache line is 32-bits in size. So it is impossible make coherency for every 8-byte DMA descriptor without write-through.
This commit is contained in:
Gregory Nutt 2015-03-29 14:42:03 -06:00
parent d8d4a3486c
commit c9eff799c0
1 changed files with 2 additions and 1 deletions
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3
nshlib/nsh_fscmds.c
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@ -390,7 +390,7 @@ static int ls_recursive(FAR struct nsh_vtbl_s *vtbl, const char *dirpath,
{ {
/* Yes.. */ /* Yes.. */
char *newpath; FAR char *newpath;
newpath = nsh_getdirpath(dirpath, entryp->d_name); newpath = nsh_getdirpath(dirpath, entryp->d_name);
/* List the directory contents */ /* List the directory contents */
@ -408,6 +408,7 @@ static int ls_recursive(FAR struct nsh_vtbl_s *vtbl, const char *dirpath,
free(newpath); free(newpath);
} }
} }
return ret; return ret;
} }