This issue was preventing ramtest to be displayed into
nsh (this is why all modifications need to be tested!!
"should work" doesn't work).
This is was discovered by user @nonpawite
Signed-off-by: Alan C. Assis <acassis@gmail.com>
1. Change 'heap' to a global variable. When using the software tag 'kasan', the base of 'heap' is dynamically changing, which may result in runtime errors
2. Modify the length of the argv array to ensure that all 64 bit addresses can be copied
3. After initialization, the registration of the heap must be canceled
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
This patch add some command line arguments for debug
program, then you can use it to insert watchpoint or
breakpoint to arbitrary address at runtime.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
some platform use TICK to calculate the time, for example
1tick = 1ms, when the test may run less then 1ms, then gettime()
before + sleep = after
Signed-off-by: ligd <liguiding1@xiaomi.com>
-u: This option is used to test the use of freed memory
-h: This option is used to test heap memory out-of-bounds access errors.
-g: This option is used to test global variables for out-of-bounds access errors.
-s: This option is used to test the Memory Stampede phenomenon.
Signed-off-by: wangmingrong <wangmingrong@xiaomi.com>
MPS2_AN500 have UART1,2,3,4, TIMER0,1, is a great board to do irqprio
test.
enable CONFIG_ARCH_IRQPRIO, and use
'qemu-system-arm -M mps2-an500 -nographic -kernel nuttx.bin'
to lauch qemu
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
The 10 times is too short and can only support 10% step, make cpuload
delay based on 100 times, can decrease the influence of sched cost.
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
log:
CC: setjmp.c cpuload_main.c: In function ‘cpuload_main’:
cpuload_main.c:38:45: error: ‘CONFIG_SCHED_CPULOAD_TICKSPERSEC’ undeclared (first use in this function); did you mean ‘CONFIG_SCHED_CPULOAD_TIMECONSTANT’?
38 | #define CPULOAD_US (USEC_PER_SEC / CONFIG_SCHED_CPULOAD_TICKSPERSEC)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
cpuload_main.c:42:35: note: in expansion of macro ‘CPULOAD_US’
42 | #define CPULOAD_DELAY (10 * CPULOAD_US)
Signed-off-by: dulibo1 <dulibo1@xiaomi.com>
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
stressapptest is a userspace test, primarily composed of threads doing memory copies
and directIO disk read/write. It allocates a large block of memory (typically 85% of
the total memory on the machine), and each thread will choose randomized blocks of
memory to copy, or to write to disk. Typically there are two threads per processor,
and two threads for each disk. Result checking is done as the test proceeds by
CRCing the data as it is copied.
https://github.com/stressapptest/stressapptest
Signed-off-by: guohao15 <guohao15@xiaomi.com>
CC: binfmt_unregister.c "fpu.c", line 98: warning #1160-D: a reduction in alignment without the
"packed" attribute is ignored
uintptr_t save1[XCPTCONTEXT_REGS] aligned_data(XCPTCONTEXT_ALIGN);
^
"fpu.c", line 99: warning #1160-D: a reduction in alignment without the
"packed" attribute is ignored
uintptr_t save2[XCPTCONTEXT_REGS] aligned_data(XCPTCONTEXT_ALIGN);
^
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
the warning are:
ltp/testcases/open_posix_testsuite/conformance/interfaces/pthread_sigmask/18-1.c:163: warning: "NSIG" redefined
163 | #define NSIG (sizeof(signals)/sizeof(int))
|
In file included from /home/guoshichao/work_profile/vela_os/vela_ltp_1/nuttx/include/pthread.h:35,
from ltp/testcases/open_posix_testsuite/conformance/interfaces/pthread_sigmask/18-1.c:31:
/home/guoshichao/work_profile/vela_os/vela_ltp_1/nuttx/include/signal.h:53: note: this is the location of the previous definition
53 | #define NSIG _NSIG /* _NSIG variant commonly used */
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
the link error are:
arm-none-eabi-ld: /home/guoshichao/work_profile/vela_os/vela_ltp_1/nuttx/staging/libapps.a(1-4.c.home.guoshichao.work_profile.vela_os.vela_ltp_1.apps.testing.ltp_3.o): in function `tst_process_state_wait3':
/home/guoshichao/work_profile/vela_os/vela_ltp_1/apps/testing/ltp/ltp/testcases/open_posix_testsuite/include/proc.h:63: multiple definition of `tst_process_state_wait3'; /home/guoshichao/work_profile/vela_os/vela_ltp_1/nuttx/staging/libapps.a(1-3.c.home.guoshichao.work_profile.vela_os.vela_ltp_1.apps.testing.ltp_3.o):/home/guoshichao/work_profile/vela_os/vela_ltp_1/apps/testing/ltp/ltp/testcases/open_posix_testsuite/include/proc.h:63: first defined here
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
Summary:
A tool is provided to test the case of data correctness after cache flush. It requires an uncacheable offset to check whether the uncacheable address is consistent with the data in the buffer after calling up_dcache_flush.
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
