--- libuavcan/libuavcan_drivers/stm32/driver/src/internal.hpp.orig 2016-02-15 18:43:32.799005338 -0600 +++ libuavcan/libuavcan_drivers/stm32/driver/src/internal.hpp 2016-02-15 18:45:09.621004803 -0600 @@ -9,6 +9,7 @@ #if UAVCAN_STM32_CHIBIOS # include #elif UAVCAN_STM32_NUTTX +# include # include # include # include @@ -97,12 +98,12 @@ const irqstate_t flags_; CriticalSectionLocker() - : flags_(irqsave()) + : flags_(enter_critical_section()) { } ~CriticalSectionLocker() { - irqrestore(flags_); + leave_critical_section(flags_); } }; --- libuavcan/libuavcan_drivers/stm32/driver/src/uc_stm32_clock.cpp.orig 2016-06-05 09:12:29.086814547 -0600 +++ libuavcan/libuavcan_drivers/stm32/driver/src/uc_stm32_clock.cpp 2016-06-05 09:15:03.676810202 -0600 @@ -31,17 +31,30 @@ # if UAVCAN_STM32_NUTTX # define TIMX UAVCAN_STM32_GLUE3(STM32_TIM, UAVCAN_STM32_TIMER_NUMBER, _BASE) -# define TMR_REG(o) (TIMX + (o)) -# define TIMX_INPUT_CLOCK STM32_TIM27_FREQUENCY +# define TMR_REG(o) (TIMX + (o)) -# define TIMX_IRQn UAVCAN_STM32_GLUE2(STM32_IRQ_TIM, UAVCAN_STM32_TIMER_NUMBER) +# if UAVCAN_STM32_TIMER_NUMBER == 2 +# define TIMX_INPUT_CLOCK BOARD_TIM2_FREQUENCY +# elif UAVCAN_STM32_TIMER_NUMBER == 3 +# define TIMX_INPUT_CLOCK BOARD_TIM3_FREQUENCY +# elif UAVCAN_STM32_TIMER_NUMBER == 4 +# define TIMX_INPUT_CLOCK BOARD_TIM4_FREQUENCY +# elif UAVCAN_STM32_TIMER_NUMBER == 5 +# define TIMX_INPUT_CLOCK BOARD_TIM5_FREQUENCY +# elif UAVCAN_STM32_TIMER_NUMBER == 6 +# define TIMX_INPUT_CLOCK BOARD_TIM6_FREQUENCY +# elif UAVCAN_STM32_TIMER_NUMBER == 7 +# define TIMX_INPUT_CLOCK BOARD_TIM7_FREQUENCY +# endif + +# define TIMX_IRQn UAVCAN_STM32_GLUE2(STM32_IRQ_TIM, UAVCAN_STM32_TIMER_NUMBER) # endif # if UAVCAN_STM32_TIMER_NUMBER >= 2 && UAVCAN_STM32_TIMER_NUMBER <= 7 -# define TIMX_RCC_ENR RCC->APB1ENR -# define TIMX_RCC_RSTR RCC->APB1RSTR -# define TIMX_RCC_ENR_MASK UAVCAN_STM32_GLUE3(RCC_APB1ENR_TIM, UAVCAN_STM32_TIMER_NUMBER, EN) -# define TIMX_RCC_RSTR_MASK UAVCAN_STM32_GLUE3(RCC_APB1RSTR_TIM, UAVCAN_STM32_TIMER_NUMBER, RST) +# define TIMX_RCC_ENR RCC->APB1ENR +# define TIMX_RCC_RSTR RCC->APB1RSTR +# define TIMX_RCC_ENR_MASK UAVCAN_STM32_GLUE3(RCC_APB1ENR_TIM, UAVCAN_STM32_TIMER_NUMBER, EN) +# define TIMX_RCC_RSTR_MASK UAVCAN_STM32_GLUE3(RCC_APB1RSTR_TIM, UAVCAN_STM32_TIMER_NUMBER, RST) # else # error "This UAVCAN_STM32_TIMER_NUMBER is not supported yet" # endif