05def1befc
MPS2_AN500 have UART1,2,3,4, TIMER0,1, is a great board to do irqprio test. enable CONFIG_ARCH_IRQPRIO, and use 'qemu-system-arm -M mps2-an500 -nographic -kernel nuttx.bin' to lauch qemu Signed-off-by: buxiasen <buxiasen@xiaomi.com>
495 lines
11 KiB
C
495 lines
11 KiB
C
/****************************************************************************
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* apps/testing/drivertest/drivertest_mps2.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/nuttx.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdarg.h>
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#include <stddef.h>
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#include <setjmp.h>
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#include <string.h>
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#include <cmocka.h>
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#include <nuttx/arch.h>
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#include <nuttx/irq.h>
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#include <nuttx/semaphore.h>
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#include <nuttx/serial/uart_cmsdk.h>
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#include <pthread.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define CONFIG_TEST_IRQPRIO_TTHREAD 8
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#define CONFIG_TEST_IRQPRIO_LOOP_CNT 5000
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#define CONFIG_TEST_IRQPRIO_LOG 0
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#define MPS2_ADDR2REG_PTR(base, off) (uint32_t*)((uint32_t*)(base) + (off))
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#define MPS2_IRQ_FROMBASE(base, off) ((base) + (off))
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/* https://developer.arm.com/documentation/101104/0200/programmers-model/
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* base-element/cmsdk-timer
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*/
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#define MPS_TIMER_CTRL_OFFSET 0
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#define MPS_TIMER_VALUE_OFFSET 1
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#define MPS_TIMER_RELOAD_OFFSET 2
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#define MPS_TIMER_CLEAR_OFFSET 3
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#define MPS_TIMER_CTRL_ENABLE (1<<0)
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#define MPS_TIMER_CTRL_IE (1<<3)
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#if CONFIG_TEST_IRQPRIO_LOG
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# define TAG_BEGIN(v) \
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do { \
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if ((v)->begin) \
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{ \
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up_puts((v)->begin); \
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} \
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} while(0)
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# define TAG_END(v) \
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do { \
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if ((v)->end) \
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{ \
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up_puts((v)->end); \
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} \
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} while(0)
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#else
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#define TAG_BEGIN(v)
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#define TAG_END(v)
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#endif
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static_assert(NVIC_SYSH_PRIORITY_DEFAULT == 0x80, "prio");
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/****************************************************************************
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* Private Types
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****************************************************************************/
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typedef struct mps2_an500_uart_s
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{
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volatile uint32_t *ctrl;
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volatile uint32_t *tx;
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volatile uint32_t *clear;
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int irq;
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int before;
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sem_t *sem;
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struct mps2_an500_uart_s *trigger;
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int after;
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#if CONFIG_TEST_IRQPRIO_LOG
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const char *begin;
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const char *end;
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#endif
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} mps2_an500_uart_t;
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typedef struct mps2_an500_timer_s
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{
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volatile uint32_t *reload;
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volatile uint32_t *ctrl;
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volatile uint32_t *clear;
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int irq;
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int before;
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sem_t *sem;
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int after;
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#if CONFIG_TEST_IRQPRIO_LOG
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const char *begin;
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const char *end;
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#endif
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} mps2_an500_timer_t;
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/****************************************************************************
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* Private Functions Prototypes
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****************************************************************************/
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static int uart_irq_tx_handle(int irq, void *context, void *arg);
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static int timer_irq_handle(int irq, void *context, void *arg);
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static uint32_t uart_random_test(mps2_an500_uart_t *uart);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static mps2_an500_uart_t uarts[5];
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static mps2_an500_timer_t timer[2];
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static sem_t test_sem = SEM_INITIALIZER(0);
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static const int armv7m_gpio_base = 16;
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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static void mps_uart_init(void)
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{
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static const uint32_t uartbase[] =
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{
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0x40004000, 0x40005000, 0x40006000, 0x40007000, 0x40009000
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};
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/* static const int an500_uart_tx_irq_offset = 1; */
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static const int uarttxirq[] =
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{
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1, 3, 5, 19, 21
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};
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static const int uarttxirq_prio[] =
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{
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0x80, 0x90, 0xb0, 0xc0, 0xd0,
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};
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#if CONFIG_TEST_IRQPRIO_LOG
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static const char *begin_tag[] =
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{
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"0", "1", "2", "3", "4"
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};
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static const char *end_tag[] =
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{
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" ", "A", "B", "C", "D"
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};
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#endif
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mps2_an500_uart_t *prev = NULL;
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for (int i = 0; i < 5; i++)
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{
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mps2_an500_uart_t *u = &uarts[i];
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u->ctrl = MPS2_ADDR2REG_PTR(uartbase[i], UART_CTRL_OFFSET);
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u->tx = MPS2_ADDR2REG_PTR(uartbase[i], UART_THR_OFFSET);
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u->clear = MPS2_ADDR2REG_PTR(uartbase[i], UART_INTSTS_OFFSET);
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u->irq = MPS2_IRQ_FROMBASE(armv7m_gpio_base, uarttxirq[i]);
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if (i > 0)
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{
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irq_attach(u->irq, uart_irq_tx_handle, u);
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up_enable_irq(u->irq);
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*u->ctrl = UART_CTRL_TX_ENABLE | UART_CTRL_TX_INT_ENABLE;
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u->trigger = prev;
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prev = u;
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#if CONFIG_TEST_IRQPRIO_LOG
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u->begin = begin_tag[i];
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u->end = end_tag[i];
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#endif
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}
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up_prioritize_irq(u->irq, uarttxirq_prio[i]);
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}
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}
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static void mps_timer_init(void)
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{
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static const uint32_t timerbase[] =
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{
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0x40000000, 0x40001000
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};
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static const int timerirq[] =
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{
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8, 9
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};
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static const int timer_irq_prio[] =
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{
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0x80, 0xa0
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};
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#if CONFIG_TEST_IRQPRIO_LOG
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static const char *begin_tag[] =
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{
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"t", "u"
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};
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static const char *end_tag[] =
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{
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"T", "U"
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};
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#endif
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for (int i = 0; i < 2; i++)
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{
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mps2_an500_timer_t *t = &timer[i];
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t->reload = MPS2_ADDR2REG_PTR(timerbase[i], MPS_TIMER_RELOAD_OFFSET);
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t->ctrl = MPS2_ADDR2REG_PTR(timerbase[i], MPS_TIMER_CTRL_OFFSET);
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t->clear = MPS2_ADDR2REG_PTR(timerbase[i], MPS_TIMER_CLEAR_OFFSET);
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t->irq = MPS2_IRQ_FROMBASE(armv7m_gpio_base, timerirq[i]);
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irq_attach(t->irq, timer_irq_handle, t);
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up_enable_irq(t->irq);
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up_prioritize_irq(t->irq, timer_irq_prio[i]);
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#if CONFIG_TEST_IRQPRIO_LOG
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t->begin = begin_tag[i];
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t->end = end_tag[i];
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#endif
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}
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}
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static int uart_irq_tx_handle(int irq, void *context, void *arg)
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{
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mps2_an500_uart_t *u = arg;
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*u->clear = UART_INTSTATUS_TX;
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TAG_BEGIN(u);
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up_udelay(u->before);
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if (u->sem != NULL)
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{
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sem_post(u->sem);
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}
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if (u->trigger != NULL)
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{
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uart_random_test(u->trigger);
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}
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up_udelay(u->after);
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TAG_END(u);
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return 0;
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}
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static int timer_irq_handle(int irq, void *context, void *arg)
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{
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mps2_an500_timer_t *t = arg;
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*t->clear = 1;
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TAG_BEGIN(t);
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up_udelay(t->before);
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if (t->sem != NULL)
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{
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sem_post(t->sem);
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}
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up_udelay(t->after);
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TAG_END(t);
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return 0;
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}
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static void timer_begin_test(mps2_an500_timer_t *t, uint32_t reload_us)
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{
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uint32_t reload = reload_us * 25;
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*t->reload = reload;
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t->sem = &test_sem;
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*t->ctrl = MPS_TIMER_CTRL_IE | MPS_TIMER_CTRL_ENABLE;
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}
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static void timer_end_test(mps2_an500_timer_t *t)
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{
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*t->ctrl = 0;
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*t->clear = 1;
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}
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static void uart_simple_test(mps2_an500_uart_t *uart)
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{
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uart->before = 0;
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uart->sem = NULL;
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uart->after = 0;
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*uart->tx = 0;
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}
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static uint32_t uart_random_test(mps2_an500_uart_t *uart)
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{
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/* 31bits random
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* | thread usleep | after udelay | before udelay | uart_sel | use sem |
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* | 30...19 (12b) | 18..11 (8b) | 10..3 (8b) | 2..1 (2b) | 0 (1b) |
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*/
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uint32_t r = random();
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int use_sem = (r >> 0) & 0x1;
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int u_before = (r >> 3) & (0xff);
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int u_after = (r >> 12) & (0xff);
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mps2_an500_uart_t *u;
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if (uart != NULL)
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{
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u = uart;
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if (!use_sem)
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{
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return r;
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}
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}
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else
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{
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int uart_select = (r >> 1) & 0x3;
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u = &uarts[uart_select + 1];
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}
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if (use_sem)
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{
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u->sem = &test_sem;
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}
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else
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{
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u->sem = NULL;
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}
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u->before = u_before;
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u->after = u_after;
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*u->tx = 0;
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if (!up_interrupt_context())
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{
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int u_thread = (r >> 19) & (0xfff);
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usleep(u_thread);
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}
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return r;
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}
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static void *test_irq_awaker_thread_entry(void *arg)
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{
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struct timespec ts;
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int cnt = 0;
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int ret;
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while (true)
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{
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clock_gettime(CLOCK_REALTIME, &ts);
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ts.tv_sec++;
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ret = sem_timedwait(&test_sem, &ts);
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if (ret != OK)
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{
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break;
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}
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else
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{
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cnt++;
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if (cnt % 10000 == 0)
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{
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printf("%d, recv:%d\n", gettid(), cnt);
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}
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#if CONFIG_TEST_IRQPRIO_LOG
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else
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{
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printf(".");
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}
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#endif
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}
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}
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printf("timeoutquit %d\n", cnt);
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return 0;
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}
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static void *test_irq_prio_thread_entry(void *arg)
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{
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int i;
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for (i = 0; i < CONFIG_TEST_IRQPRIO_LOOP_CNT; i++)
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{
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uart_random_test(NULL);
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}
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return NULL;
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}
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static void test_irqprio(void **argv)
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{
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pid_t tid[CONFIG_TEST_IRQPRIO_TTHREAD + 1];
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pthread_attr_t attr;
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int i;
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printf("init done\n");
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for (i = 1; i < 5; i++)
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{
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uart_simple_test(&uarts[i]);
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}
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printf("simple_test done\n");
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timer[0].before = 1;
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timer[0].after = 1;
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timer_begin_test(&timer[0], 1000);
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timer[1].before = 10;
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timer[1].after = 10;
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timer_begin_test(&timer[1], 100 * 1000);
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pthread_attr_init(&attr);
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attr.priority = 1;
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for (i = 0; i < CONFIG_TEST_IRQPRIO_TTHREAD; i++)
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{
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attr.priority++;
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pthread_create(&tid[i], &attr, test_irq_prio_thread_entry, NULL);
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}
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attr.priority = 255;
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pthread_create(&tid[CONFIG_TEST_IRQPRIO_TTHREAD],
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&attr,
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test_irq_awaker_thread_entry,
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NULL);
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printf("thread init done\n");
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for (i = 0; i < CONFIG_TEST_IRQPRIO_TTHREAD; i++)
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{
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pthread_join(tid[i], NULL);
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}
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printf("uart join done\n");
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timer_end_test(&timer[0]);
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timer_end_test(&timer[1]);
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printf("timer end done\n");
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pthread_join(tid[CONFIG_TEST_IRQPRIO_TTHREAD], NULL);
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printf("sem thread join done\n");
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}
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static int setup(void **argv)
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{
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mps_uart_init();
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mps_timer_init();
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return 0;
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}
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static int teardown(void **argv)
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{
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return 0;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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int main(int argc, char *argv[])
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{
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const struct CMUnitTest tests[] = {
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cmocka_unit_test_prestate_setup_teardown(
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test_irqprio, setup, teardown, NULL),
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};
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return cmocka_run_group_tests(tests, NULL, NULL);
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}
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