87 lines
3.9 KiB
C
87 lines
3.9 KiB
C
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/****************************************************************************
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* drivers/lcd/jd9851.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __DRIVERS_LCD_JD9851_H
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#define __DRIVERS_LCD_JD9851_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define JD9851_SLEEP_IN 0x10 /* Sleep in */
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#define JD9851_SLEEP_OUT 0x11 /* Sleep out */
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#define JD9851_INVERSION_ON 0x21 /* Display inversion on */
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#define JD9851_DISOFF 0x28 /* Display off */
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#define JD9851_DISON 0x29 /* Display on */
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#define JD9851_CASET 0x2A /* Column address set */
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#define JD9851_PASET 0x2B /* Page address set */
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#define JD9851_RAMWR 0x2C /* Memory Write */
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#define JD9851_RAMRD 0x2E /* Memory read */
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#define JD9851_TEOFF 0x34 /* Tearing effect line off */
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#define JD9851_TEON 0x35 /* Tearing effect line on */
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#define JD9851_TE_MODE0 0x00
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#define JD9851_TE_MODE1 0x01
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#define JD9851_COLMOD 0x3A /* Pixel format set */
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#define JD9851_COLMOD_16BIT 0x55
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#define JD9851_MADCTL 0x36 /* Memory Data Access Control */
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#define JD9851_MADCTL_MY (1<<7) /* Page Address Order */
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#define JD9851_MADCTL_MX (1<<6) /* Column Address Order */
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#define JD9851_MADCTL_MV (1<<5) /* Page/Column Order */
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#define JD9851_MADCTL_ML (1<<4) /* Line Address Order */
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#define JD9851_MADCTL_BGR (1<<3) /* Set Panel Order BGR */
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#define JD9851_SET_PAGE_CMD 0xDE /* Change page */
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#define JD9851_PAGE_0 0x00
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#define JD9851_PAGE_2 0x02
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#define JD9851_PASSWORD 0xDF /* Set password to access inhouse reg */
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/* PAGE_0 */
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#define JD9851_GAMMA_SET_CMD 0xB7
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#define JD9851_R_GAMMA_SET_CMD 0xC8
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#define JD9851_POWER_CTRL 0xB9 /* Control engineer mode of power related setting */
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#define JD9851_DCDC_SET 0xBB /* Set charge pump related setting */
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#define JD9851_VDDD_CTRL 0xBC /* Control inrernal logic voltage setting */
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#define JD9851_SETSTBA 0xC0 /* Set source output driving ability */
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#define JD9851_SETPANEL 0xC1 /* Set panel related reg, page_0/2 */
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#define JD9851_SETRGBCYC 0xC3 /* Set internal SD output timing */
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#define JD9851_SETTCON 0xC4 /* Set timing control */
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#define JD9851_SETGD 0xD0 /* Set Gate function */
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#define JD9851_SETRGBIF 0xBD /* Set RGB interface related setting */
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#define JD9851_RAM_CTRL 0xD7 /* Set interface related setting */
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/* PAGE_2 */
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#define JD9851_DCDC_SET2 0xB8 /* Set internal OTP program related setting */
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#define JD9851_OSCM_SET 0xC5 /* Set oscillator M. OSCM */
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#define JD9851_SETMIPI_2 0xCA
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FAR struct lcd_dev_s *jd9851_lcdinitialize(FAR struct spi_dev_s *spi);
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#endif /* __DRIVERS_LCD_JD9851_H */
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