2021-03-04 08:02:21 +01:00
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/****************************************************************************
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2012-05-24 17:45:46 +02:00
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* drivers/lcd/ssd1289.c
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*
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2021-03-04 07:10:42 +01:00
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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2012-05-24 17:45:46 +02:00
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*
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2021-03-04 07:10:42 +01:00
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* http://www.apache.org/licenses/LICENSE-2.0
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2012-05-24 17:45:46 +02:00
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*
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2021-03-04 07:10:42 +01:00
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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2012-05-24 17:45:46 +02:00
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*
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2021-03-04 08:02:21 +01:00
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****************************************************************************/
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2014-04-13 22:32:20 +02:00
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2021-03-04 08:02:21 +01:00
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/* Generic LCD driver for LCDs based on the Solomon Systech SSD1289 LCD
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* controller.
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* Think of this as a template for an LCD driver that you will probably have
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* to customize for any particular LCD hardware.
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2021-03-04 07:10:42 +01:00
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*
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* References: SSD1289, Rev 1.3, Apr 2007, Solomon Systech Limited
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*/
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2021-03-04 08:02:21 +01:00
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/****************************************************************************
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2012-05-24 17:45:46 +02:00
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* Included Files
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2021-03-04 08:02:21 +01:00
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****************************************************************************/
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2012-05-24 17:45:46 +02:00
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <string.h>
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2021-05-18 08:59:14 +02:00
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#include <assert.h>
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2012-05-24 17:45:46 +02:00
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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2013-07-01 16:11:54 +02:00
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#include <nuttx/spi/spi.h>
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2012-05-24 17:45:46 +02:00
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#include <nuttx/lcd/lcd.h>
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#include <nuttx/lcd/ssd1289.h>
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#include "ssd1289.h"
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#ifdef CONFIG_LCD_SSD1289
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2021-03-04 08:02:21 +01:00
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/****************************************************************************
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2012-05-24 17:45:46 +02:00
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* Pre-processor Definitions
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2021-03-04 08:02:21 +01:00
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****************************************************************************/
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/* Configuration ************************************************************/
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2012-05-24 17:45:46 +02:00
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/* Check contrast selection */
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#if !defined(CONFIG_LCD_MAXCONTRAST)
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# define CONFIG_LCD_MAXCONTRAST 1
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#endif
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/* Check power setting */
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#if !defined(CONFIG_LCD_MAXPOWER) || CONFIG_LCD_MAXPOWER < 1
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# define CONFIG_LCD_MAXPOWER 1
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#endif
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#if CONFIG_LCD_MAXPOWER > 255
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# error "CONFIG_LCD_MAXPOWER must be less than 256 to fit in uint8_t"
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#endif
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/* Check orientation */
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#if defined(CONFIG_LCD_PORTRAIT)
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# if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) || defined(CONFIG_LCD_RPORTRAIT)
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# error "Cannot define both portrait and any other orientations"
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# endif
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#elif defined(CONFIG_LCD_RPORTRAIT)
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# if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE)
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# error "Cannot define both rportrait and any other orientations"
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# endif
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#elif defined(CONFIG_LCD_LANDSCAPE)
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# ifdef CONFIG_LCD_RLANDSCAPE
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# error "Cannot define both landscape and any other orientations"
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# endif
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#elif !defined(CONFIG_LCD_RLANDSCAPE)
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# define CONFIG_LCD_LANDSCAPE 1
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#endif
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2021-03-04 08:02:21 +01:00
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/* Display/Color Properties *************************************************/
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2012-05-24 17:45:46 +02:00
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/* Display Resolution */
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2014-04-13 22:32:20 +02:00
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#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE)
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2012-05-24 17:45:46 +02:00
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# define SSD1289_XRES 320
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# define SSD1289_YRES 240
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#else
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# define SSD1289_XRES 240
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# define SSD1289_YRES 320
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#endif
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/* Color depth and format */
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#define SSD1289_BPP 16
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#define SSD1289_COLORFMT FB_FMT_RGB16_565
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2021-03-04 08:02:21 +01:00
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/* LCD Profiles *************************************************************/
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/* Many details of the controller initialization must, unfortunately, vary
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* from LCD to LCD. I have looked at the spec and at three different drivers
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* for LCDs that have SSD1289 controllers.
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* I have tried to summarize these differences as "LCD profiles"
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2012-05-31 19:07:02 +02:00
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*
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* Most of the differences between LCDs are nothing more than a few minor bit
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2020-02-22 19:31:14 +01:00
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* settings. The most significant difference between LCD drivers in is the
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2021-03-04 08:02:21 +01:00
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* manner in which the LCD is powered up and in how the power controls are
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* set.
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* My suggestion is that if you have working LCD initialization code, you
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* should simply replace the code in ssd1289_hwinitialize with your working
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* code.
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2012-05-31 19:07:02 +02:00
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*/
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#if defined (CONFIG_SSD1289_PROFILE2)
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# undef SSD1289_USE_SIMPLE_INIT
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/* PWRCTRL1: AP=smalll-to-medium, DC=Flinex24, BT=+5/-4, DCT=Flinex24 */
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# define PWRCTRL1_SETTING \
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(SSD1289_PWRCTRL1_AP_SMMED | SSD1289_PWRCTRL1_DC_FLINEx24 | \
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SSD1289_PWRCTRL1_BT_p5m4 | SSD1289_PWRCTRL1_DCT_FLINEx24)
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/* PWRCTRL2: 5.1v */
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# define PWRCTRL2_SETTING SSD1289_PWRCTRL2_VRC_5p1V
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/* PWRCTRL3: x 2.165
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2021-03-04 08:02:21 +01:00
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* NOTE:
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* Many drivers have bit 8 set which is not defined in the SSD1289 spec.
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2012-05-31 19:07:02 +02:00
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*/
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# define PWRCTRL3_SETTING SSD1289_PWRCTRL3_VRH_x2p165
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2021-03-04 08:02:21 +01:00
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/* PWRCTRL4: VDV=9 + VCOMG */
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2012-05-31 19:07:02 +02:00
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# define PWRCTRL4_SETTING (SSD1289_PWRCTRL4_VDV(9) | SSD1289_PWRCTRL4_VCOMG)
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2021-03-04 08:02:21 +01:00
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/* PWRCTRL5: VCM=56 + NOTP */
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2012-05-31 19:07:02 +02:00
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# define PWRCTRL5_SETTING (SSD1289_PWRCTRL5_VCM(56) | SSD1289_PWRCTRL5_NOTP)
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#elif defined (CONFIG_SSD1289_PROFILE3)
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# undef SSD1289_USE_SIMPLE_INIT
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/* PWRCTRL1: AP=smalll-to-medium, DC=Flinex24, BT=+5/-4, DCT=Flinex24 */
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# define PWRCTRL1_SETTING \
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(SSD1289_PWRCTRL1_AP_SMMED | SSD1289_PWRCTRL1_DC_FLINEx24 | \
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SSD1289_PWRCTRL1_BT_p5m4 | SSD1289_PWRCTRL1_DCT_FLINEx24)
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/* PWRCTRL2: 5.1v */
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# define PWRCTRL2_SETTING SSD1289_PWRCTRL2_VRC_5p1V
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/* PWRCTRL3: x 2.165
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2021-03-04 08:02:21 +01:00
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* NOTE:
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* Many drivers have bit 8 set which is not defined in the SSD1289 spec.
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2012-05-31 19:07:02 +02:00
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*/
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# define PWRCTRL3_SETTING SSD1289_PWRCTRL3_VRH_x2p165
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2021-03-04 08:02:21 +01:00
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/* PWRCTRL4: VDV=9 + VCOMG */
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2012-05-31 19:07:02 +02:00
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# define PWRCTRL4_SETTING (SSD1289_PWRCTRL4_VDV(9) | SSD1289_PWRCTRL4_VCOMG)
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2021-03-04 08:02:21 +01:00
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/* PWRCTRL5: VCM=56 + NOTP */
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2012-05-31 19:07:02 +02:00
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# define PWRCTRL5_SETTING (SSD1289_PWRCTRL5_VCM(56) | SSD1289_PWRCTRL5_NOTP)
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#else /* if defined (CONFIG_SSD1289_PROFILE1) */
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# undef SSD1289_USE_SIMPLE_INIT
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# define SSD1289_USE_SIMPLE_INIT 1
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/* PWRCTRL1: AP=medium-to-large, DC=Fosc/4, BT=+5/-4, DCT=Fosc/4 */
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# define PWRCTRL1_SETTING \
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(SSD1289_PWRCTRL1_AP_MEDLG | SSD1289_PWRCTRL1_DC_FOSd4 | \
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SSD1289_PWRCTRL1_BT_p5m4 | SSD1289_PWRCTRL1_DCT_FOSd4)
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/* PWRCTRL2: 5.3v */
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# define PWRCTRL2_SETTING SSD1289_PWRCTRL2_VRC_5p3V
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/* PWRCTRL3: x 2.570
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2021-03-04 08:02:21 +01:00
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* NOTE:
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* Many drivers have bit 8 set which is not defined in the SSD1289 spec.
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2012-05-31 19:07:02 +02:00
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*/
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# define PWRCTRL3_SETTING SSD1289_PWRCTRL3_VRH_x2p570
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2021-03-04 08:02:21 +01:00
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/* PWRCTRL4: VDV=12 + VCOMG */
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2012-05-31 19:07:02 +02:00
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# define PWRCTRL4_SETTING (SSD1289_PWRCTRL4_VDV(12) | SSD1289_PWRCTRL4_VCOMG)
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2021-03-04 08:02:21 +01:00
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/* PWRCTRL5: VCM=60 + NOTP */
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2012-05-31 19:07:02 +02:00
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# define PWRCTRL5_SETTING (SSD1289_PWRCTRL5_VCM(60) | SSD1289_PWRCTRL5_NOTP)
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#endif
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2021-03-04 08:02:21 +01:00
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/****************************************************************************
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2012-05-24 17:45:46 +02:00
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* Private Type Definition
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2021-03-04 08:02:21 +01:00
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****************************************************************************/
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2012-05-24 17:45:46 +02:00
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/* This structure describes the state of this driver */
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struct ssd1289_dev_s
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{
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2020-02-22 19:31:14 +01:00
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/* Publicly visible device structure */
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2012-05-24 17:45:46 +02:00
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struct lcd_dev_s dev;
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/* Private LCD-specific information follows */
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FAR struct ssd1289_lcd_s *lcd; /* The contained platform-specific, LCD interface */
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uint8_t power; /* Current power setting */
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2012-09-28 21:24:46 +02:00
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/* These fields simplify and reduce debug output */
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#ifdef CONFIG_DEBUG_LCD
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bool put; /* Last raster operation was a putrun */
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fb_coord_t firstrow; /* First row of the run */
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fb_coord_t lastrow; /* Last row of the run */
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fb_coord_t col; /* Column of the run */
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size_t npixels; /* Length of the run */
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#endif
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2012-05-24 17:45:46 +02:00
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/* This is working memory allocated by the LCD driver for each LCD device
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2021-03-04 08:02:21 +01:00
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* and for each color plane. This memory will hold one raster line of
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* data.
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2012-05-24 17:45:46 +02:00
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* The size of the allocated run buffer must therefore be at least
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* (bpp * xres / 8). Actual alignment of the buffer must conform to the
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* bitwidth of the underlying pixel type.
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*
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* If there are multiple planes, they may share the same working buffer
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* because different planes will not be operate on concurrently. However,
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2021-03-04 08:02:21 +01:00
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* if there are multiple LCD devices, they must each have unique run
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* buffers.
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2012-05-24 17:45:46 +02:00
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*/
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uint16_t runbuffer[SSD1289_XRES];
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};
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2021-03-04 08:02:21 +01:00
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/****************************************************************************
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2012-05-24 17:45:46 +02:00
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* Private Function Protototypes
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2021-03-04 08:02:21 +01:00
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****************************************************************************/
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2012-05-24 17:45:46 +02:00
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/* Low Level LCD access */
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2021-03-04 08:02:21 +01:00
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static void ssd1289_putreg(FAR struct ssd1289_lcd_s *lcd,
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uint8_t regaddr,
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2012-05-24 17:45:46 +02:00
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uint16_t regval);
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2012-05-24 23:31:24 +02:00
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#ifndef CONFIG_LCD_NOGETRUN
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2021-03-04 08:02:21 +01:00
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static uint16_t ssd1289_readreg(FAR struct ssd1289_lcd_s *lcd,
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uint8_t regaddr);
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2012-05-24 17:45:46 +02:00
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#endif
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2021-03-04 08:02:21 +01:00
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static inline void ssd1289_gramwrite(FAR struct ssd1289_lcd_s *lcd,
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uint16_t rgbcolor);
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2012-05-24 23:31:24 +02:00
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#ifndef CONFIG_LCD_NOGETRUN
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2021-03-04 08:02:21 +01:00
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static inline void ssd1289_readsetup(FAR struct ssd1289_lcd_s *lcd,
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FAR uint16_t *accum);
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static inline uint16_t ssd1289_gramread(FAR struct ssd1289_lcd_s *lcd,
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FAR uint16_t *accum);
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2012-05-24 17:45:46 +02:00
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#endif
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2021-03-04 08:02:21 +01:00
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static void ssd1289_setcursor(FAR struct ssd1289_lcd_s *lcd,
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uint16_t column,
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2012-05-24 17:45:46 +02:00
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uint16_t row);
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/* LCD Data Transfer Methods */
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2012-09-28 21:24:46 +02:00
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#if 0 /* Sometimes useful */
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2021-03-04 08:02:21 +01:00
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static void ssd1289_dumprun(FAR const char *msg, FAR uint16_t *run,
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size_t npixels);
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2012-09-28 21:24:46 +02:00
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#else
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# define ssd1289_dumprun(m,r,n)
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#endif
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#ifdef CONFIG_DEBUG_LCD
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static void ssd1289_showrun(FAR struct ssd1289_dev_s *priv, fb_coord_t row,
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fb_coord_t col, size_t npixels, bool put);
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#else
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# define ssd1289_showrun(p,r,c,n,b)
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#endif
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2022-06-17 12:17:18 +02:00
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static int ssd1289_putrun(FAR struct lcd_dev_s *dev,
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fb_coord_t row, fb_coord_t col,
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2021-03-04 08:02:21 +01:00
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FAR const uint8_t *buffer,
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|
|
size_t npixels);
|
2022-06-17 12:17:18 +02:00
|
|
|
static int ssd1289_getrun(FAR struct lcd_dev_s *dev,
|
|
|
|
fb_coord_t row, fb_coord_t col,
|
2021-03-04 08:02:21 +01:00
|
|
|
FAR uint8_t *buffer,
|
|
|
|
size_t npixels);
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
/* LCD Configuration */
|
|
|
|
|
|
|
|
static int ssd1289_getvideoinfo(FAR struct lcd_dev_s *dev,
|
2021-03-04 08:02:21 +01:00
|
|
|
FAR struct fb_videoinfo_s *vinfo);
|
|
|
|
static int ssd1289_getplaneinfo(FAR struct lcd_dev_s *dev,
|
|
|
|
unsigned int planeno,
|
|
|
|
FAR struct lcd_planeinfo_s *pinfo);
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
/* LCD RGB Mapping */
|
|
|
|
|
|
|
|
#ifdef CONFIG_FB_CMAP
|
|
|
|
# error "RGB color mapping not supported by this driver"
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Cursor Controls */
|
|
|
|
|
|
|
|
#ifdef CONFIG_FB_HWCURSOR
|
|
|
|
# error "Cursor control not supported by this driver"
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* LCD Specific Controls */
|
|
|
|
|
|
|
|
static int ssd1289_getpower(FAR struct lcd_dev_s *dev);
|
|
|
|
static int ssd1289_setpower(FAR struct lcd_dev_s *dev, int power);
|
|
|
|
static int ssd1289_getcontrast(FAR struct lcd_dev_s *dev);
|
2021-03-04 08:02:21 +01:00
|
|
|
static int ssd1289_setcontrast(FAR struct lcd_dev_s *dev,
|
|
|
|
unsigned int contrast);
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
/* Initialization */
|
|
|
|
|
2012-05-30 20:46:40 +02:00
|
|
|
static inline int ssd1289_hwinitialize(FAR struct ssd1289_dev_s *priv);
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Private Data
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2022-06-17 12:17:18 +02:00
|
|
|
/* This driver can support only a signal SSD1289 device.
|
|
|
|
* The following is the single SSD1289 driver state instance:
|
2012-05-24 17:45:46 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
static struct ssd1289_dev_s g_lcddev;
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Private Functions
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2014-04-13 22:32:20 +02:00
|
|
|
* Name: ssd1289_putreg(lcd,
|
2012-05-24 17:45:46 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Write to an LCD register
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
static void ssd1289_putreg(FAR struct ssd1289_lcd_s *lcd,
|
|
|
|
uint8_t regaddr, uint16_t regval)
|
2012-05-24 17:45:46 +02:00
|
|
|
{
|
2021-03-04 08:02:21 +01:00
|
|
|
/* Set the index register to the register address and write the register
|
|
|
|
* contents
|
|
|
|
*/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
lcd->index(lcd, regaddr);
|
|
|
|
lcd->write(lcd, regval);
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_readreg
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Read from an LCD register
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2012-05-24 23:31:24 +02:00
|
|
|
#ifndef CONFIG_LCD_NOGETRUN
|
2021-03-04 08:02:21 +01:00
|
|
|
static uint16_t ssd1289_readreg(FAR struct ssd1289_lcd_s *lcd,
|
|
|
|
uint8_t regaddr)
|
2012-05-24 17:45:46 +02:00
|
|
|
{
|
2021-03-04 08:02:21 +01:00
|
|
|
/* Set the index register to the register address and read the register
|
|
|
|
* contents
|
|
|
|
*/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
lcd->index(lcd, regaddr);
|
|
|
|
return lcd->read(lcd);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_gramselect
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Setup to read or write multiple pixels to the GRAM memory
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
static inline void ssd1289_gramselect(FAR struct ssd1289_lcd_s *lcd)
|
|
|
|
{
|
|
|
|
lcd->index(lcd, SSD1289_DATA);
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_gramwrite
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Setup to read or write multiple pixels to the GRAM memory
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
static inline void ssd1289_gramwrite(FAR struct ssd1289_lcd_s *lcd,
|
|
|
|
uint16_t data)
|
2012-05-24 17:45:46 +02:00
|
|
|
{
|
|
|
|
lcd->write(lcd, data);
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_readsetup
|
|
|
|
*
|
|
|
|
* Description:
|
2021-03-04 08:02:21 +01:00
|
|
|
* Prime the operation by reading one pixel from the GRAM memory if
|
|
|
|
* necessary for this LCD type. When reading 16-bit gram data, there
|
|
|
|
* may be some shifts in the returned data:
|
2012-05-24 17:45:46 +02:00
|
|
|
*
|
|
|
|
* - ILI932x: Discard first dummy read; no shift in the return data
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2012-05-24 23:31:24 +02:00
|
|
|
#ifndef CONFIG_LCD_NOGETRUN
|
2021-03-04 08:02:21 +01:00
|
|
|
static inline void ssd1289_readsetup(FAR struct ssd1289_lcd_s *lcd,
|
|
|
|
FAR uint16_t *accum)
|
2012-05-24 17:45:46 +02:00
|
|
|
{
|
|
|
|
/* Read-ahead one pixel */
|
|
|
|
|
|
|
|
*accum = lcd->read(lcd);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_gramread
|
|
|
|
*
|
|
|
|
* Description:
|
2021-03-04 08:02:21 +01:00
|
|
|
* Read one correctly aligned pixel from the GRAM memory.
|
|
|
|
* Possibly shifting the data and possibly swapping red and green
|
|
|
|
* components.
|
2012-05-24 17:45:46 +02:00
|
|
|
*
|
2014-04-13 22:32:20 +02:00
|
|
|
* - ILI932x: Unknown -- assuming colors are in the color order
|
2012-05-24 17:45:46 +02:00
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2012-05-24 23:31:24 +02:00
|
|
|
#ifndef CONFIG_LCD_NOGETRUN
|
2021-03-04 08:02:21 +01:00
|
|
|
static inline uint16_t ssd1289_gramread(FAR struct ssd1289_lcd_s *lcd,
|
|
|
|
FAR uint16_t *accum)
|
2012-05-24 17:45:46 +02:00
|
|
|
{
|
|
|
|
/* Read the value (GRAM register already selected) */
|
|
|
|
|
|
|
|
return lcd->read(lcd);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_setcursor
|
|
|
|
*
|
|
|
|
* Description:
|
2021-03-04 08:02:21 +01:00
|
|
|
* Set the cursor position.
|
|
|
|
* In landscape mode, the "column" is actually the physical
|
2012-05-24 17:45:46 +02:00
|
|
|
* Y position and the "row" is the physical X position.
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
static void ssd1289_setcursor(FAR struct ssd1289_lcd_s *lcd,
|
|
|
|
uint16_t column, uint16_t row)
|
2012-05-24 17:45:46 +02:00
|
|
|
{
|
|
|
|
#if defined(CONFIG_LCD_PORTRAIT) || defined(CONFIG_LCD_RPORTRAIT)
|
|
|
|
ssd1289_putreg(lcd, SSD1289_XADDR, column); /* 0-239 */
|
|
|
|
ssd1289_putreg(lcd, SSD1289_YADDR, row); /* 0-319 */
|
|
|
|
#elif defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE)
|
|
|
|
ssd1289_putreg(lcd, SSD1289_XADDR, row); /* 0-239 */
|
|
|
|
ssd1289_putreg(lcd, SSD1289_YADDR, column); /* 0-319 */
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_dumprun
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Dump the contexts of the run buffer:
|
|
|
|
*
|
|
|
|
* run - The buffer in containing the run read to be dumped
|
|
|
|
* npixels - The number of pixels to dump
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
#if 0 /* Sometimes useful */
|
2021-03-04 08:02:21 +01:00
|
|
|
static void ssd1289_dumprun(FAR const char *msg,
|
|
|
|
FAR uint16_t *run, size_t npixels)
|
2012-05-24 17:45:46 +02:00
|
|
|
{
|
2021-03-04 08:02:21 +01:00
|
|
|
int i;
|
|
|
|
int j;
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2014-10-08 18:18:58 +02:00
|
|
|
syslog(LOG_INFO, "\n%s:\n", msg);
|
2012-05-24 17:45:46 +02:00
|
|
|
for (i = 0; i < npixels; i += 16)
|
|
|
|
{
|
|
|
|
up_putc(' ');
|
2014-10-08 18:18:58 +02:00
|
|
|
syslog(LOG_INFO, " ");
|
2012-05-24 17:45:46 +02:00
|
|
|
for (j = 0; j < 16; j++)
|
|
|
|
{
|
2014-10-08 18:18:58 +02:00
|
|
|
syslog(LOG_INFO, " %04x", *run++);
|
2012-05-24 17:45:46 +02:00
|
|
|
}
|
2021-03-04 08:02:21 +01:00
|
|
|
|
2012-05-24 17:45:46 +02:00
|
|
|
up_putc('\n');
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-09-28 21:24:46 +02:00
|
|
|
* Name: ssd1289_showrun
|
|
|
|
*
|
|
|
|
* Description:
|
2021-03-04 08:02:21 +01:00
|
|
|
* When LCD debug is enabled, try to reduce then amount of output data
|
|
|
|
* generated by ssd1289_putrun and ssd1289_getrun
|
2012-09-28 21:24:46 +02:00
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-09-28 21:24:46 +02:00
|
|
|
|
|
|
|
#ifdef CONFIG_DEBUG_LCD
|
|
|
|
static void ssd1289_showrun(FAR struct ssd1289_dev_s *priv, fb_coord_t row,
|
|
|
|
fb_coord_t col, size_t npixels, bool put)
|
|
|
|
{
|
|
|
|
fb_coord_t nextrow = priv->lastrow + 1;
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/* Has anything changed
|
|
|
|
* (other than the row is the next row in the sequence)?
|
|
|
|
*/
|
2012-09-28 21:24:46 +02:00
|
|
|
|
|
|
|
if (put == priv->put && row == nextrow && col == priv->col &&
|
|
|
|
npixels == priv->npixels)
|
|
|
|
{
|
|
|
|
/* No, just update the last row */
|
|
|
|
|
|
|
|
priv->lastrow = nextrow;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2021-03-04 08:02:21 +01:00
|
|
|
/* Yes... then this is the end of the preceding sequence.
|
|
|
|
* Output the last run
|
2012-09-28 21:24:46 +02:00
|
|
|
* (if there were more than one run in the sequence).
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (priv->firstrow != priv->lastrow)
|
|
|
|
{
|
2016-06-12 17:26:00 +02:00
|
|
|
lcdinfo("...\n");
|
|
|
|
lcdinfo("%s row: %d col: %d npixels: %d\n",
|
|
|
|
priv->put ? "PUT" : "GET",
|
|
|
|
priv->lastrow, priv->col, priv->npixels);
|
2012-09-28 21:24:46 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* And we are starting a new sequence. Output the first run of the
|
|
|
|
* new sequence
|
|
|
|
*/
|
|
|
|
|
2016-06-12 17:26:00 +02:00
|
|
|
lcdinfo("%s row: %d col: %d npixels: %d\n",
|
|
|
|
put ? "PUT" : "GET", row, col, npixels);
|
2012-09-28 21:24:46 +02:00
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/* And save information about the run so that we can detect
|
|
|
|
* continuations of the sequence.
|
2012-09-28 21:24:46 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
priv->put = put;
|
|
|
|
priv->firstrow = row;
|
|
|
|
priv->lastrow = row;
|
|
|
|
priv->col = col;
|
|
|
|
priv->npixels = npixels;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_putrun
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* This method can be used to write a partial raster line to the LCD:
|
|
|
|
*
|
2022-06-17 12:17:18 +02:00
|
|
|
* dev - The lcd device
|
2012-05-24 17:45:46 +02:00
|
|
|
* row - Starting row to write to (range: 0 <= row < yres)
|
|
|
|
* col - Starting column to write to (range: 0 <= col <= xres-npixels)
|
|
|
|
* buffer - The buffer containing the run to be written to the LCD
|
|
|
|
* npixels - The number of pixels to write to the LCD
|
|
|
|
* (range: 0 < npixels <= xres-col)
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2022-06-17 12:17:18 +02:00
|
|
|
static int ssd1289_putrun(FAR struct lcd_dev_s *dev,
|
|
|
|
fb_coord_t row, fb_coord_t col,
|
2021-03-04 08:02:21 +01:00
|
|
|
FAR const uint8_t *buffer,
|
2012-05-24 17:45:46 +02:00
|
|
|
size_t npixels)
|
|
|
|
{
|
2022-06-17 12:17:18 +02:00
|
|
|
FAR struct ssd1289_dev_s *priv = (FAR struct ssd1289_dev_s *)dev;
|
2012-05-24 17:45:46 +02:00
|
|
|
FAR struct ssd1289_lcd_s *lcd = priv->lcd;
|
2015-10-10 18:41:00 +02:00
|
|
|
FAR const uint16_t *src = (FAR const uint16_t *)buffer;
|
2012-05-24 17:45:46 +02:00
|
|
|
int i;
|
2014-04-13 22:32:20 +02:00
|
|
|
|
2012-05-24 17:45:46 +02:00
|
|
|
/* Buffer must be provided and aligned to a 16-bit address boundary */
|
|
|
|
|
2012-09-28 21:24:46 +02:00
|
|
|
ssd1289_showrun(priv, row, col, npixels, true);
|
2012-05-24 17:45:46 +02:00
|
|
|
DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
|
|
|
|
|
|
|
|
/* Select the LCD */
|
|
|
|
|
|
|
|
lcd->select(lcd);
|
|
|
|
|
|
|
|
/* Write the run to GRAM. */
|
|
|
|
|
|
|
|
#ifdef CONFIG_LCD_LANDSCAPE
|
|
|
|
/* Convert coordinates -- Here the edge away from the row of buttons on
|
|
|
|
* the STM3240G-EVAL is used as the top.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* Write the GRAM data, manually incrementing X */
|
|
|
|
|
|
|
|
for (i = 0; i < npixels; i++)
|
|
|
|
{
|
|
|
|
/* Write the next pixel to this position */
|
|
|
|
|
|
|
|
ssd1289_setcursor(lcd, col, row);
|
|
|
|
ssd1289_gramselect(lcd);
|
|
|
|
ssd1289_gramwrite(lcd, *src);
|
|
|
|
|
2012-09-28 21:24:46 +02:00
|
|
|
/* Increment to the next column */
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
src++;
|
|
|
|
col++;
|
|
|
|
}
|
|
|
|
#elif defined(CONFIG_LCD_RLANDSCAPE)
|
|
|
|
/* Convert coordinates -- Here the edge next to the row of buttons on
|
|
|
|
* the STM3240G-EVAL is used as the top.
|
|
|
|
*/
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
col = (SSD1289_XRES - 1) - col;
|
|
|
|
row = (SSD1289_YRES - 1) - row;
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
/* Set the cursor position */
|
|
|
|
|
|
|
|
ssd1289_setcursor(lcd, col, row);
|
|
|
|
|
|
|
|
/* Then write the GRAM data, auto-decrementing X */
|
|
|
|
|
|
|
|
ssd1289_gramselect(lcd);
|
|
|
|
for (i = 0; i < npixels; i++)
|
|
|
|
{
|
2021-03-04 08:02:21 +01:00
|
|
|
/* Write the next pixel to this position
|
|
|
|
* (auto-decrements to the next column)
|
|
|
|
*/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
ssd1289_gramwrite(lcd, *src);
|
|
|
|
src++;
|
|
|
|
}
|
|
|
|
#elif defined(CONFIG_LCD_PORTRAIT)
|
2021-03-04 08:02:21 +01:00
|
|
|
/* Convert coordinates.
|
|
|
|
* In this configuration, the top of the display is to the left
|
|
|
|
* of the buttons (if the board is held so that the buttons are
|
|
|
|
* at the bottom of the board).
|
2012-05-24 17:45:46 +02:00
|
|
|
*/
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
col = (SSD1289_XRES - 1) - col;
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
/* Then write the GRAM data, manually incrementing Y (which is col) */
|
|
|
|
|
|
|
|
for (i = 0; i < npixels; i++)
|
|
|
|
{
|
|
|
|
/* Write the next pixel to this position */
|
|
|
|
|
|
|
|
ssd1289_setcursor(lcd, row, col);
|
|
|
|
ssd1289_gramselect(lcd);
|
|
|
|
ssd1289_gramwrite(lcd, *src);
|
|
|
|
|
2012-09-28 21:24:46 +02:00
|
|
|
/* Increment to the next column */
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
src++;
|
|
|
|
col--;
|
|
|
|
}
|
|
|
|
#else /* CONFIG_LCD_RPORTRAIT */
|
|
|
|
/* Convert coordinates. In this configuration, the top of the display is to the right
|
2020-02-23 09:50:23 +01:00
|
|
|
* of the buttons (if the board is held so that the buttons are at the bottom of the
|
2012-05-24 17:45:46 +02:00
|
|
|
* board).
|
|
|
|
*/
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
row = (SSD1289_YRES - 1) - row;
|
2014-04-13 22:32:20 +02:00
|
|
|
|
2012-05-24 17:45:46 +02:00
|
|
|
/* Then write the GRAM data, manually incrementing Y (which is col) */
|
|
|
|
|
|
|
|
for (i = 0; i < npixels; i++)
|
|
|
|
{
|
|
|
|
/* Write the next pixel to this position */
|
|
|
|
|
|
|
|
ssd1289_setcursor(lcd, row, col);
|
|
|
|
ssd1289_gramselect(lcd);
|
|
|
|
ssd1289_gramwrite(lcd, *src);
|
|
|
|
|
2012-09-28 21:24:46 +02:00
|
|
|
/* Decrement to the next column */
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
src++;
|
|
|
|
col++;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* De-select the LCD */
|
|
|
|
|
|
|
|
lcd->deselect(lcd);
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_getrun
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* This method can be used to read a partial raster line from the LCD:
|
|
|
|
*
|
2022-06-17 12:17:18 +02:00
|
|
|
* dev - The lcd device
|
2012-05-24 17:45:46 +02:00
|
|
|
* row - Starting row to read from (range: 0 <= row < yres)
|
|
|
|
* col - Starting column to read read (range: 0 <= col <= xres-npixels)
|
|
|
|
* buffer - The buffer in which to return the run read from the LCD
|
|
|
|
* npixels - The number of pixels to read from the LCD
|
|
|
|
* (range: 0 < npixels <= xres-col)
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2022-06-17 12:17:18 +02:00
|
|
|
static int ssd1289_getrun(FAR struct lcd_dev_s *dev,
|
|
|
|
fb_coord_t row, fb_coord_t col,
|
2021-03-04 08:02:21 +01:00
|
|
|
FAR uint8_t *buffer,
|
2012-09-28 21:24:46 +02:00
|
|
|
size_t npixels)
|
2012-05-24 17:45:46 +02:00
|
|
|
{
|
2012-05-24 23:31:24 +02:00
|
|
|
#ifndef CONFIG_LCD_NOGETRUN
|
2022-06-17 12:17:18 +02:00
|
|
|
FAR struct ssd1289_dev_s *priv = (FAR struct ssd1289_dev_s *)dev;
|
2012-05-24 17:45:46 +02:00
|
|
|
FAR struct ssd1289_lcd_s *lcd = priv->lcd;
|
2015-10-10 18:41:00 +02:00
|
|
|
FAR uint16_t *dest = (FAR uint16_t *)buffer;
|
2012-05-24 17:45:46 +02:00
|
|
|
uint16_t accum;
|
|
|
|
int i;
|
2014-04-13 22:32:20 +02:00
|
|
|
|
2012-05-24 17:45:46 +02:00
|
|
|
/* Buffer must be provided and aligned to a 16-bit address boundary */
|
|
|
|
|
2012-09-28 21:24:46 +02:00
|
|
|
ssd1289_showrun(priv, row, col, npixels, false);
|
2012-05-24 17:45:46 +02:00
|
|
|
DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
|
|
|
|
|
|
|
|
/* Select the LCD */
|
|
|
|
|
|
|
|
lcd->select(lcd);
|
|
|
|
|
|
|
|
/* Read the run from GRAM. */
|
|
|
|
|
|
|
|
#ifdef CONFIG_LCD_LANDSCAPE
|
|
|
|
/* Convert coordinates -- Here the edge away from the row of buttons on
|
|
|
|
* the STM3240G-EVAL is used as the top.
|
|
|
|
*/
|
|
|
|
|
|
|
|
for (i = 0; i < npixels; i++)
|
|
|
|
{
|
|
|
|
/* Read the next pixel from this position */
|
|
|
|
|
|
|
|
ssd1289_setcursor(lcd, row, col);
|
|
|
|
ssd1289_gramselect(lcd);
|
|
|
|
ssd1289_readsetup(lcd, &accum);
|
|
|
|
*dest++ = ssd1289_gramread(lcd, &accum);
|
|
|
|
|
2012-09-28 21:24:46 +02:00
|
|
|
/* Increment to the next column */
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
col++;
|
|
|
|
}
|
|
|
|
#elif defined(CONFIG_LCD_RLANDSCAPE)
|
|
|
|
/* Convert coordinates -- Here the edge next to the row of buttons on
|
|
|
|
* the STM3240G-EVAL is used as the top.
|
|
|
|
*/
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
col = (SSD1289_XRES - 1) - col;
|
|
|
|
row = (SSD1289_YRES - 1) - row;
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
/* Set the cursor position */
|
|
|
|
|
|
|
|
ssd1289_setcursor(lcd, col, row);
|
|
|
|
|
|
|
|
/* Then read the GRAM data, auto-decrementing Y */
|
|
|
|
|
|
|
|
ssd1289_gramselect(lcd);
|
|
|
|
|
|
|
|
/* Prime the pump for unaligned read data */
|
|
|
|
|
|
|
|
ssd1289_readsetup(lcd, &accum);
|
|
|
|
|
|
|
|
for (i = 0; i < npixels; i++)
|
|
|
|
{
|
2021-03-04 08:02:21 +01:00
|
|
|
/* Read the next pixel from this position
|
|
|
|
* (autoincrements to the next row)
|
|
|
|
*/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
*dest++ = ssd1289_gramread(lcd, &accum);
|
|
|
|
}
|
|
|
|
#elif defined(CONFIG_LCD_PORTRAIT)
|
2021-03-04 08:02:21 +01:00
|
|
|
/* Convert coordinates. In this configuration, the top of the display is
|
|
|
|
* to the left of the buttons (if the board is held so that the buttons
|
|
|
|
* are at the bottom of the board).
|
2012-05-24 17:45:46 +02:00
|
|
|
*/
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
col = (SSD1289_XRES - 1) - col;
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
/* Then read the GRAM data, manually incrementing Y (which is col) */
|
|
|
|
|
|
|
|
for (i = 0; i < npixels; i++)
|
|
|
|
{
|
|
|
|
/* Read the next pixel from this position */
|
|
|
|
|
|
|
|
ssd1289_setcursor(lcd, row, col);
|
|
|
|
ssd1289_gramselect(lcd);
|
|
|
|
ssd1289_readsetup(lcd, &accum);
|
|
|
|
*dest++ = ssd1289_gramread(lcd, &accum);
|
|
|
|
|
2012-09-28 21:24:46 +02:00
|
|
|
/* Increment to the next column */
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
col--;
|
|
|
|
}
|
|
|
|
#else /* CONFIG_LCD_RPORTRAIT */
|
|
|
|
/* Convert coordinates. In this configuration, the top of the display is to the right
|
2020-02-23 09:50:23 +01:00
|
|
|
* of the buttons (if the board is held so that the buttons are at the bottom of the
|
2012-05-24 17:45:46 +02:00
|
|
|
* board).
|
|
|
|
*/
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
row = (SSD1289_YRES - 1) - row;
|
2014-04-13 22:32:20 +02:00
|
|
|
|
2012-05-24 17:45:46 +02:00
|
|
|
/* Then write the GRAM data, manually incrementing Y (which is col) */
|
|
|
|
|
|
|
|
for (i = 0; i < npixels; i++)
|
|
|
|
{
|
|
|
|
/* Write the next pixel to this position */
|
|
|
|
|
|
|
|
ssd1289_setcursor(lcd, row, col);
|
|
|
|
ssd1289_gramselect(lcd);
|
|
|
|
ssd1289_readsetup(lcd, &accum);
|
|
|
|
*dest++ = ssd1289_gramread(lcd, &accum);
|
|
|
|
|
2012-09-28 21:24:46 +02:00
|
|
|
/* Decrement to the next column */
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
col++;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* De-select the LCD */
|
|
|
|
|
|
|
|
lcd->deselect(lcd);
|
|
|
|
return OK;
|
|
|
|
#else
|
|
|
|
return -ENOSYS;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_getvideoinfo
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Get information about the LCD video controller configuration.
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
static int ssd1289_getvideoinfo(FAR struct lcd_dev_s *dev,
|
|
|
|
FAR struct fb_videoinfo_s *vinfo)
|
|
|
|
{
|
|
|
|
DEBUGASSERT(dev && vinfo);
|
2016-06-11 19:59:51 +02:00
|
|
|
lcdinfo("fmt: %d xres: %d yres: %d nplanes: 1\n",
|
2012-09-26 21:41:54 +02:00
|
|
|
SSD1289_COLORFMT, SSD1289_XRES, SSD1289_YRES);
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
vinfo->fmt = SSD1289_COLORFMT; /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
|
|
|
|
vinfo->xres = SSD1289_XRES; /* Horizontal resolution in pixel columns */
|
|
|
|
vinfo->yres = SSD1289_YRES; /* Vertical resolution in pixel rows */
|
|
|
|
vinfo->nplanes = 1; /* Number of color planes supported */
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_getplaneinfo
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Get information about the configuration of each LCD color plane.
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
static int ssd1289_getplaneinfo(FAR struct lcd_dev_s *dev,
|
|
|
|
unsigned int planeno,
|
2012-05-24 17:45:46 +02:00
|
|
|
FAR struct lcd_planeinfo_s *pinfo)
|
|
|
|
{
|
|
|
|
FAR struct ssd1289_dev_s *priv = (FAR struct ssd1289_dev_s *)dev;
|
|
|
|
|
|
|
|
DEBUGASSERT(dev && pinfo && planeno == 0);
|
2016-06-11 19:59:51 +02:00
|
|
|
lcdinfo("planeno: %d bpp: %d\n", planeno, SSD1289_BPP);
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2015-10-10 18:41:00 +02:00
|
|
|
pinfo->putrun = ssd1289_putrun; /* Put a run into LCD memory */
|
|
|
|
pinfo->getrun = ssd1289_getrun; /* Get a run from LCD memory */
|
|
|
|
pinfo->buffer = (FAR uint8_t *)priv->runbuffer; /* Run scratch buffer */
|
|
|
|
pinfo->bpp = SSD1289_BPP; /* Bits-per-pixel */
|
2022-06-17 12:17:18 +02:00
|
|
|
pinfo->dev = dev; /* The lcd device */
|
2012-05-24 17:45:46 +02:00
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_getpower
|
|
|
|
*
|
|
|
|
* Description:
|
2021-03-04 08:02:21 +01:00
|
|
|
* Get the LCD panel power status
|
|
|
|
* (0: full off - CONFIG_LCD_MAXPOWER: full on).
|
|
|
|
* On backlit LCDs, this setting may correspond to the backlight setting.
|
2012-05-24 17:45:46 +02:00
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
static int ssd1289_getpower(FAR struct lcd_dev_s *dev)
|
|
|
|
{
|
2016-06-11 19:59:51 +02:00
|
|
|
lcdinfo("power: %d\n", 0);
|
2012-05-24 17:45:46 +02:00
|
|
|
return g_lcddev.power;
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_poweroff
|
|
|
|
*
|
|
|
|
* Description:
|
2021-03-04 08:02:21 +01:00
|
|
|
* Enable/disable LCD panel power
|
|
|
|
* (0: full off - CONFIG_LCD_MAXPOWER: full on).
|
|
|
|
* On backlit LCDs, this setting may correspond to the backlight setting.
|
2012-05-24 17:45:46 +02:00
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
static int ssd1289_poweroff(FAR struct ssd1289_lcd_s *lcd)
|
|
|
|
{
|
|
|
|
/* Set the backlight off */
|
|
|
|
|
|
|
|
lcd->backlight(lcd, 0);
|
|
|
|
|
|
|
|
/* Turn the display off */
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_DSPCTRL, 0);
|
|
|
|
|
|
|
|
/* Remember the power off state */
|
|
|
|
|
|
|
|
g_lcddev.power = 0;
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_setpower
|
|
|
|
*
|
|
|
|
* Description:
|
2021-03-04 08:02:21 +01:00
|
|
|
* Enable/disable LCD panel power
|
|
|
|
* (0: full off - CONFIG_LCD_MAXPOWER: full on).
|
|
|
|
* On backlit LCDs, this setting may correspond to the backlight setting.
|
2012-05-24 17:45:46 +02:00
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
static int ssd1289_setpower(FAR struct lcd_dev_s *dev, int power)
|
|
|
|
{
|
|
|
|
FAR struct ssd1289_dev_s *priv = (FAR struct ssd1289_dev_s *)dev;
|
|
|
|
FAR struct ssd1289_lcd_s *lcd = priv->lcd;
|
|
|
|
|
2016-06-11 19:59:51 +02:00
|
|
|
lcdinfo("power: %d\n", power);
|
2012-05-24 17:45:46 +02:00
|
|
|
DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER);
|
|
|
|
|
|
|
|
/* Set new power level */
|
|
|
|
|
|
|
|
if (power > 0)
|
|
|
|
{
|
|
|
|
/* Set the backlight level */
|
|
|
|
|
|
|
|
lcd->backlight(lcd, power);
|
|
|
|
|
|
|
|
/* Then turn the display on:
|
2012-05-31 19:07:02 +02:00
|
|
|
* D=ON(3) CM=0 DTE=1 GON=1 SPT=0 VLE=0 PT=0
|
2012-05-24 17:45:46 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_DSPCTRL,
|
|
|
|
(SSD1289_DSPCTRL_ON | SSD1289_DSPCTRL_GON |
|
2014-04-13 22:32:20 +02:00
|
|
|
SSD1289_DSPCTRL_DTE | SSD1289_DSPCTRL_VLE(0)));
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
g_lcddev.power = power;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* Turn the display off */
|
|
|
|
|
|
|
|
ssd1289_poweroff(lcd);
|
|
|
|
}
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_getcontrast
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST).
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
static int ssd1289_getcontrast(FAR struct lcd_dev_s *dev)
|
|
|
|
{
|
2016-06-11 19:59:51 +02:00
|
|
|
lcdinfo("Not implemented\n");
|
2012-05-24 17:45:46 +02:00
|
|
|
return -ENOSYS;
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_setcontrast
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST).
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
static int ssd1289_setcontrast(FAR struct lcd_dev_s *dev,
|
|
|
|
unsigned int contrast)
|
2012-05-24 17:45:46 +02:00
|
|
|
{
|
2016-06-11 19:59:51 +02:00
|
|
|
lcdinfo("contrast: %d\n", contrast);
|
2012-05-24 17:45:46 +02:00
|
|
|
return -ENOSYS;
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_hwinitialize
|
|
|
|
*
|
|
|
|
* Description:
|
2012-05-31 01:21:37 +02:00
|
|
|
* Initialize the LCD hardware.
|
2012-05-24 17:45:46 +02:00
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2012-05-30 20:46:40 +02:00
|
|
|
static inline int ssd1289_hwinitialize(FAR struct ssd1289_dev_s *priv)
|
2012-05-24 17:45:46 +02:00
|
|
|
{
|
|
|
|
FAR struct ssd1289_lcd_s *lcd = priv->lcd;
|
2012-05-24 23:31:24 +02:00
|
|
|
#ifndef CONFIG_LCD_NOGETRUN
|
2012-05-24 17:45:46 +02:00
|
|
|
uint16_t id;
|
|
|
|
#endif
|
2012-09-26 21:41:54 +02:00
|
|
|
int ret;
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2012-05-31 01:21:37 +02:00
|
|
|
/* Select the LCD */
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
lcd->select(lcd);
|
|
|
|
|
2012-09-27 17:29:53 +02:00
|
|
|
/* Read the device ID. Skip verification of the device ID is the LCD is
|
|
|
|
* write-only. What choice do we have?
|
|
|
|
*/
|
|
|
|
|
2012-05-24 23:31:24 +02:00
|
|
|
#ifndef CONFIG_LCD_NOGETRUN
|
2012-05-24 17:45:46 +02:00
|
|
|
id = ssd1289_readreg(lcd, SSD1289_DEVCODE);
|
2012-09-27 17:29:53 +02:00
|
|
|
if (id != 0)
|
|
|
|
{
|
2016-06-12 17:26:00 +02:00
|
|
|
lcdinfo("LCD ID: %04x\n", id);
|
2012-09-27 17:29:53 +02:00
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/* If we could not get the ID, then let's just assume that this is an
|
|
|
|
* SSD1289. Perhaps we have some early register access issues.
|
|
|
|
* This seems to happen.
|
2012-09-27 17:29:53 +02:00
|
|
|
* But then perhaps we should not even bother to read the device ID at all?
|
|
|
|
*/
|
|
|
|
|
|
|
|
else
|
|
|
|
{
|
2016-06-12 17:26:00 +02:00
|
|
|
lcdwarn("WARNING: No LCD ID, assuming SSD1289\n");
|
2012-09-27 17:29:53 +02:00
|
|
|
id = SSD1289_DEVCODE_VALUE;
|
|
|
|
}
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
/* Check if the ID is for the SSD1289 */
|
|
|
|
|
|
|
|
if (id == SSD1289_DEVCODE_VALUE)
|
|
|
|
#endif
|
|
|
|
{
|
2021-03-04 08:02:21 +01:00
|
|
|
/* LCD controller configuration.
|
|
|
|
* Many details of the controller initialization must, unfortunately,
|
|
|
|
* vary from LCD to LCD. I have looked at the spec and at three
|
|
|
|
* different drivers for LCDs that have SSD1289 controllers. I have
|
|
|
|
* tried to summarize these differences as profiles (defined above).
|
|
|
|
* Some other alternatives are noted below.
|
2012-05-24 17:45:46 +02:00
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
* Most of the differences between LCDs are nothing more than a few
|
|
|
|
* minor bit settings. The most significant difference between LCD
|
|
|
|
* drivers in is the manner in which the LCD is powered up and in how
|
|
|
|
* the power controls are set.
|
|
|
|
* My suggestion is that if you have working LCD initialization code,
|
|
|
|
* you should simply replace the following guesses with your working
|
|
|
|
* code.
|
2012-05-24 17:45:46 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
/* Most drivers just enable the oscillator */
|
2012-05-31 19:07:02 +02:00
|
|
|
|
|
|
|
#ifdef SSD1289_USE_SIMPLE_INIT
|
2012-05-24 17:45:46 +02:00
|
|
|
ssd1289_putreg(lcd, SSD1289_OSCSTART, SSD1289_OSCSTART_OSCEN);
|
|
|
|
#else
|
2021-03-04 08:02:21 +01:00
|
|
|
/* But one goes through a more complex start-up sequence.
|
|
|
|
* Something like the following:
|
2012-05-31 19:07:02 +02:00
|
|
|
*
|
2012-05-24 17:45:46 +02:00
|
|
|
* First, put the display in INTERNAL operation:
|
|
|
|
* D=INTERNAL(1) CM=0 DTE=0 GON=1 SPT=0 VLE=0 PT=0
|
|
|
|
*/
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_DSPCTRL,
|
|
|
|
(SSD1289_DSPCTRL_INTERNAL | SSD1289_DSPCTRL_GON |
|
2014-04-13 22:32:20 +02:00
|
|
|
SSD1289_DSPCTRL_VLE(0)));
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
/* Then enable the oscillator */
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_OSCSTART, SSD1289_OSCSTART_OSCEN);
|
|
|
|
|
|
|
|
/* Turn the display on:
|
|
|
|
* D=ON(3) CM=0 DTE=0 GON=1 SPT=0 VLE=0 PT=0
|
|
|
|
*/
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_DSPCTRL,
|
|
|
|
(SSD1289_DSPCTRL_ON | SSD1289_DSPCTRL_GON |
|
2014-04-13 22:32:20 +02:00
|
|
|
SSD1289_DSPCTRL_VLE(0)));
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/* Take the LCD out of sleep mode */
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_SLEEP, 0);
|
|
|
|
up_mdelay(30);
|
|
|
|
|
|
|
|
/* Turn the display on:
|
|
|
|
* D=INTERNAL(1) CM=0 DTE=1 GON=1 SPT=0 VLE=0 PT=0
|
|
|
|
*/
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_DSPCTRL,
|
|
|
|
(SSD1289_DSPCTRL_ON | SSD1289_DSPCTRL_DTE |
|
2014-04-13 22:32:20 +02:00
|
|
|
SSD1289_DSPCTRL_GON | SSD1289_DSPCTRL_VLE(0)));
|
2012-05-24 17:45:46 +02:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Set up power control registers. There is a lot of variability
|
|
|
|
* from LCD-to-LCD in how the power registers are configured.
|
|
|
|
*/
|
|
|
|
|
2012-05-31 19:07:02 +02:00
|
|
|
ssd1289_putreg(lcd, SSD1289_PWRCTRL1, PWRCTRL1_SETTING);
|
|
|
|
ssd1289_putreg(lcd, SSD1289_PWRCTRL2, PWRCTRL2_SETTING);
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/* One driver adds a delay here.. I doubt that this is really
|
|
|
|
* necessary.
|
|
|
|
*/
|
|
|
|
|
2012-05-31 19:07:02 +02:00
|
|
|
/* up_mdelay(15); */
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2012-05-31 19:07:02 +02:00
|
|
|
ssd1289_putreg(lcd, SSD1289_PWRCTRL3, PWRCTRL3_SETTING);
|
|
|
|
ssd1289_putreg(lcd, SSD1289_PWRCTRL4, PWRCTRL4_SETTING);
|
|
|
|
ssd1289_putreg(lcd, SSD1289_PWRCTRL5, PWRCTRL5_SETTING);
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2013-08-27 17:40:19 +02:00
|
|
|
/* One driver does an odd setting of the driver output control.
|
2012-05-24 17:45:46 +02:00
|
|
|
* No idea why.
|
|
|
|
*/
|
|
|
|
#if 0
|
|
|
|
ssd1289_putreg(lcd, SSD1289_OUTCTRL,
|
|
|
|
(SSD1289_OUTCTRL_MUX(12) | SSD1289_OUTCTRL_TB |
|
|
|
|
SSD1289_OUTCTRL_BGR | SSD1289_OUTCTRL_CAD));
|
|
|
|
|
|
|
|
/* The same driver does another small delay here */
|
2012-05-31 19:07:02 +02:00
|
|
|
|
2012-05-24 17:45:46 +02:00
|
|
|
up_mdelay(15);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* After this point, the drivers differ only in some varying register
|
|
|
|
* bit settings.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* Set the driver output control.
|
|
|
|
* PORTRAIT MODES:
|
|
|
|
* MUX=319, TB=1, SM=0, BGR=1, CAD=0, REV=1, RL=0
|
|
|
|
* LANDSCAPE MODES:
|
|
|
|
* MUX=319, TB=0, SM=0, BGR=1, CAD=0, REV=1, RL=0
|
|
|
|
*/
|
|
|
|
|
|
|
|
#if defined(CONFIG_LCD_PORTRAIT) || defined(CONFIG_LCD_RPORTRAIT)
|
|
|
|
ssd1289_putreg(lcd, SSD1289_OUTCTRL,
|
|
|
|
(SSD1289_OUTCTRL_MUX(319) | SSD1289_OUTCTRL_TB |
|
2013-05-09 22:23:34 +02:00
|
|
|
SSD1289_OUTCTRL_BGR | SSD1289_OUTCTRL_REV));
|
2012-05-24 17:45:46 +02:00
|
|
|
#else
|
|
|
|
ssd1289_putreg(lcd, SSD1289_OUTCTRL,
|
|
|
|
(SSD1289_OUTCTRL_MUX(319) | SSD1289_OUTCTRL_BGR |
|
|
|
|
SSD1289_OUTCTRL_REV));
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Set the LCD driving AC waveform
|
|
|
|
* NW=0, WSMD=0, EOR=1, BC=1, ENWD=0, FLD=0
|
|
|
|
*/
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_ACCTRL,
|
|
|
|
(SSD1289_ACCTRL_EOR | SSD1289_ACCTRL_BC));
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/* Take the LCD out of sleep mode (isn't this redundant in the
|
|
|
|
* non-simple case?)
|
2012-05-31 19:07:02 +02:00
|
|
|
*/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_SLEEP, 0);
|
|
|
|
|
|
|
|
/* Set entry mode */
|
|
|
|
|
|
|
|
#if defined(CONFIG_LCD_PORTRAIT) || defined(CONFIG_LCD_RPORTRAIT)
|
|
|
|
/* LG=0, AM=0, ID=3, TY=2, DMODE=0, WMODE=0, OEDEF=0, TRANS=0, DRM=3
|
2012-05-31 19:07:02 +02:00
|
|
|
* Alternative TY=2 (But TY only applies in 262K color mode anyway)
|
2012-05-24 17:45:46 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_ENTRY,
|
2012-05-30 20:46:40 +02:00
|
|
|
(SSD1289_ENTRY_ID_HINCVINC | SSD1289_ENTRY_TY_C |
|
2012-05-24 17:45:46 +02:00
|
|
|
SSD1289_ENTRY_DMODE_RAM | SSD1289_ENTRY_DFM_65K));
|
|
|
|
#else
|
|
|
|
/* LG=0, AM=1, ID=3, TY=2, DMODE=0, WMODE=0, OEDEF=0, TRANS=0, DRM=3 */
|
2021-03-04 08:02:21 +01:00
|
|
|
|
2012-05-31 19:07:02 +02:00
|
|
|
/* Alternative TY=2 (But TY only applies in 262K color mode anyway) */
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_ENTRY,
|
|
|
|
(SSD1289_ENTRY_AM | SSD1289_ENTRY_ID_HINCVINC |
|
2012-05-30 20:46:40 +02:00
|
|
|
SSD1289_ENTRY_TY_C | SSD1289_ENTRY_DMODE_RAM |
|
2012-05-24 17:45:46 +02:00
|
|
|
SSD1289_ENTRY_DFM_65K));
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Clear compare registers */
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_CMP1, 0);
|
|
|
|
ssd1289_putreg(lcd, SSD1289_CMP2, 0);
|
2012-05-31 19:07:02 +02:00
|
|
|
|
|
|
|
/* One driver puts a huge, 100 millisecond delay here */
|
2021-03-04 08:02:21 +01:00
|
|
|
|
2012-05-31 19:07:02 +02:00
|
|
|
/* up_mdelay(100); */
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
/* Set Horizontal and vertical porch.
|
|
|
|
* Horizontal porch: 239 pixels per line, delay=28
|
|
|
|
* Vertical porch: VBP=3, XFP=0
|
|
|
|
*/
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_HPORCH,
|
2021-03-04 08:02:21 +01:00
|
|
|
(28 << SSD1289_HPORCH_HBP_SHIFT) |
|
|
|
|
(239 << SSD1289_HPORCH_XL_SHIFT));
|
2012-05-24 17:45:46 +02:00
|
|
|
ssd1289_putreg(lcd, SSD1289_VPORCH,
|
2021-03-04 08:02:21 +01:00
|
|
|
(3 << SSD1289_VPORCH_VBP_SHIFT) |
|
|
|
|
(0 << SSD1289_VPORCH_XFP_SHIFT));
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
/* Set display control.
|
|
|
|
* D=ON(3), CM=0 (not 8-color), DTE=1, GON=1, SPT=0, VLE=1 PT=0
|
|
|
|
*/
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_DSPCTRL,
|
2012-05-24 23:31:24 +02:00
|
|
|
(SSD1289_DSPCTRL_ON | SSD1289_DSPCTRL_DTE |
|
2014-04-13 22:32:20 +02:00
|
|
|
SSD1289_DSPCTRL_GON | SSD1289_DSPCTRL_VLE(1)));
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
/* Frame cycle control. Alternative: SSD1289_FCYCCTRL_DIV8 */
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_FCYCCTRL, 0);
|
|
|
|
|
|
|
|
/* Gate scan start position = 0 */
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_GSTART, 0);
|
|
|
|
|
|
|
|
/* Clear vertical scrolling */
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_VSCROLL1, 0);
|
|
|
|
ssd1289_putreg(lcd, SSD1289_VSCROLL2, 0);
|
|
|
|
|
|
|
|
/* Setup window 1 (0-319) */
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_W1START, 0);
|
|
|
|
ssd1289_putreg(lcd, SSD1289_W1END, 319);
|
|
|
|
|
|
|
|
/* Disable window 2 (0-0) */
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_W2START, 0);
|
|
|
|
ssd1289_putreg(lcd, SSD1289_W2END, 0);
|
|
|
|
|
|
|
|
/* Horizontal start and end (0-239) */
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_HADDR,
|
2021-03-04 08:02:21 +01:00
|
|
|
(0 << SSD1289_HADDR_HSA_SHIFT) |
|
|
|
|
(239 << SSD1289_HADDR_HEA_SHIFT));
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
/* Vertical start and end (0-319) */
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_VSTART, 0);
|
|
|
|
ssd1289_putreg(lcd, SSD1289_VEND, 319);
|
|
|
|
|
|
|
|
/* Gamma controls */
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_GAMMA1, 0x0707);
|
|
|
|
ssd1289_putreg(lcd, SSD1289_GAMMA2, 0x0204); /* Alternative: 0x0704 */
|
|
|
|
ssd1289_putreg(lcd, SSD1289_GAMMA3, 0x0204);
|
|
|
|
ssd1289_putreg(lcd, SSD1289_GAMMA4, 0x0502);
|
|
|
|
ssd1289_putreg(lcd, SSD1289_GAMMA5, 0x0507);
|
|
|
|
ssd1289_putreg(lcd, SSD1289_GAMMA6, 0x0204);
|
|
|
|
ssd1289_putreg(lcd, SSD1289_GAMMA7, 0x0204);
|
|
|
|
ssd1289_putreg(lcd, SSD1289_GAMMA8, 0x0502);
|
|
|
|
ssd1289_putreg(lcd, SSD1289_GAMMA9, 0x0302);
|
|
|
|
ssd1289_putreg(lcd, SSD1289_GAMMA10, 0x0302); /* Alternative: 0x1f00 */
|
|
|
|
|
|
|
|
/* Clear write mask */
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_WRMASK1, 0);
|
|
|
|
ssd1289_putreg(lcd, SSD1289_WRMASK2, 0);
|
|
|
|
|
|
|
|
/* Set frame frequency = 65Hz (This should not be necessary since this
|
|
|
|
* is the default POR value)
|
|
|
|
*/
|
|
|
|
|
|
|
|
ssd1289_putreg(lcd, SSD1289_FFREQ, SSD1289_FFREQ_OSC_FF65);
|
|
|
|
|
|
|
|
/* Set the cursor at the home position and set the index register to
|
|
|
|
* the gram data register (I can't imagine these are necessary).
|
|
|
|
*/
|
|
|
|
|
|
|
|
ssd1289_setcursor(lcd, 0, 0);
|
|
|
|
ssd1289_gramselect(lcd);
|
|
|
|
|
|
|
|
/* One driver has a 50 msec delay here */
|
2021-03-04 08:02:21 +01:00
|
|
|
|
2012-05-31 19:07:02 +02:00
|
|
|
/* up_mdelay(50); */
|
|
|
|
|
2012-09-26 21:41:54 +02:00
|
|
|
ret = OK;
|
2012-05-24 17:45:46 +02:00
|
|
|
}
|
2012-05-24 23:31:24 +02:00
|
|
|
#ifndef CONFIG_LCD_NOGETRUN
|
2012-05-24 17:45:46 +02:00
|
|
|
else
|
|
|
|
{
|
2016-06-12 17:26:00 +02:00
|
|
|
lcderr("ERROR: Unsupported LCD type\n");
|
2012-09-26 21:41:54 +02:00
|
|
|
ret = -ENODEV;
|
2012-05-24 17:45:46 +02:00
|
|
|
}
|
2012-05-24 23:31:24 +02:00
|
|
|
#endif
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
/* De-select the LCD */
|
|
|
|
|
|
|
|
lcd->deselect(lcd);
|
2012-09-26 21:41:54 +02:00
|
|
|
return ret;
|
2012-05-24 17:45:46 +02:00
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Public Functions
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_lcdinitialize
|
|
|
|
*
|
|
|
|
* Description:
|
2021-03-04 08:02:21 +01:00
|
|
|
* Initialize the LCD video hardware.
|
|
|
|
* The initial state of the LCD is fully initialized, display memory
|
|
|
|
* cleared, and the LCD ready to use, but with the power setting at 0
|
|
|
|
* (full off).
|
2012-05-24 17:45:46 +02:00
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
FAR struct lcd_dev_s *ssd1289_lcdinitialize(FAR struct ssd1289_lcd_s *lcd)
|
|
|
|
{
|
2012-05-30 20:46:40 +02:00
|
|
|
int ret;
|
|
|
|
|
2016-06-11 19:59:51 +02:00
|
|
|
lcdinfo("Initializing\n");
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2022-06-17 12:17:18 +02:00
|
|
|
/* If we support multiple SSD1289 devices, this is where we would allocate
|
|
|
|
* a new driver data structure.
|
2012-05-24 17:45:46 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
FAR struct ssd1289_dev_s *priv = &g_lcddev;
|
|
|
|
|
|
|
|
/* Initialize the driver data structure */
|
|
|
|
|
|
|
|
priv->dev.getvideoinfo = ssd1289_getvideoinfo;
|
|
|
|
priv->dev.getplaneinfo = ssd1289_getplaneinfo;
|
|
|
|
priv->dev.getpower = ssd1289_getpower;
|
|
|
|
priv->dev.setpower = ssd1289_setpower;
|
|
|
|
priv->dev.getcontrast = ssd1289_getcontrast;
|
|
|
|
priv->dev.setcontrast = ssd1289_setcontrast;
|
|
|
|
priv->lcd = lcd;
|
|
|
|
|
|
|
|
/* Configure and enable LCD */
|
|
|
|
|
2012-05-30 20:46:40 +02:00
|
|
|
ret = ssd1289_hwinitialize(priv);
|
|
|
|
if (ret == OK)
|
|
|
|
{
|
|
|
|
/* Clear the display (setting it to the color 0=black) */
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2012-05-30 20:46:40 +02:00
|
|
|
ssd1289_clear(&priv->dev, 0);
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2012-05-30 20:46:40 +02:00
|
|
|
/* Turn the display off */
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2012-05-30 20:46:40 +02:00
|
|
|
ssd1289_poweroff(lcd);
|
|
|
|
return &g_lcddev.dev;
|
|
|
|
}
|
2012-05-24 17:45:46 +02:00
|
|
|
|
2012-05-30 20:46:40 +02:00
|
|
|
return NULL;
|
2012-05-24 17:45:46 +02:00
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2012-05-24 17:45:46 +02:00
|
|
|
* Name: ssd1289_clear
|
|
|
|
*
|
|
|
|
* Description:
|
2021-03-04 08:02:21 +01:00
|
|
|
* This is a non-standard LCD interface just for the stm3240g-EVAL board.
|
|
|
|
* Because of the various rotations, clearing the display in the normal way
|
|
|
|
* by writing a sequences of runs that covers the entire display can be
|
|
|
|
* very slow. Here the display is cleared by simply setting all GRAM
|
|
|
|
* memory to the specified color.
|
2012-05-24 17:45:46 +02:00
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
void ssd1289_clear(FAR struct lcd_dev_s *dev, uint16_t color)
|
|
|
|
{
|
|
|
|
FAR struct ssd1289_dev_s *priv = (FAR struct ssd1289_dev_s *)dev;
|
|
|
|
FAR struct ssd1289_lcd_s *lcd = priv->lcd;
|
|
|
|
uint32_t i;
|
|
|
|
|
|
|
|
/* Select the LCD and home the cursor position */
|
|
|
|
|
|
|
|
lcd->select(lcd);
|
|
|
|
ssd1289_setcursor(lcd, 0, 0);
|
|
|
|
|
|
|
|
/* Prepare to write GRAM data */
|
|
|
|
|
|
|
|
ssd1289_gramselect(lcd);
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/* Copy color into all of GRAM.
|
|
|
|
* Orientation does not matter in this case.
|
|
|
|
*/
|
2012-05-24 17:45:46 +02:00
|
|
|
|
|
|
|
for (i = 0; i < SSD1289_XRES * SSD1289_YRES; i++)
|
|
|
|
{
|
|
|
|
ssd1289_gramwrite(lcd, color);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* De-select the LCD */
|
|
|
|
|
|
|
|
lcd->deselect(lcd);
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* CONFIG_LCD_SSD1289 */
|