2022-03-02 15:11:19 +01:00
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/****************************************************************************
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* arch/xtensa/src/esp32s3/esp32s3_freerun.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <assert.h>
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#include <debug.h>
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#include <errno.h>
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#include <inttypes.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include <sys/types.h>
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#include <nuttx/irq.h>
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#include <nuttx/clock.h>
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2022-03-08 18:03:25 +01:00
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#include <nuttx/spinlock.h>
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2022-03-02 15:11:19 +01:00
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#include "esp32s3_clockconfig.h"
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2022-03-08 18:03:25 +01:00
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#include "esp32s3_freerun.h"
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2022-03-02 15:11:19 +01:00
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#include "esp32s3_gpio.h"
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#ifdef CONFIG_ESP32S3_FREERUN
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define MAX_TIMERS 2
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/* Definition for maximum resolution value in microseconds.
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* Calculated according to the following algorithm:
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* (PREmax * USEC_PER_SEC) / CLKmin
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* where:
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* PREmax == 65536, maximum supported divider in HW
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* CLKmin == 80 MHz, lowest clock frequency (from APB)
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*/
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#define MAX_US_RESOLUTION 819
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#define TIMER_WIDTH 54 /* ESP32-S3 timer has 54-bit counter */
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2022-03-08 18:03:25 +01:00
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static spinlock_t g_lock; /* Device specific lock */
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2022-03-02 15:11:19 +01:00
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: freerun_handler
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*
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* Description:
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* Timer interrupt callback. When the freerun timer counter overflows,
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* this interrupt will occur. We will just increment an overflow counter.
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*
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* Input Parameters:
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* irq - CPU interrupt index.
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* context - Context data from the ISR.
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* arg - Opaque pointer to the internal driver state structure.
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*
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* Returned Value:
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* OK
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*
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****************************************************************************/
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#ifndef CONFIG_CLOCK_TIMEKEEPING
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static int freerun_handler(int irq, void *context, void *arg)
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{
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struct esp32s3_freerun_s *freerun = (struct esp32s3_freerun_s *) arg;
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DEBUGASSERT(freerun != NULL);
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freerun->overflow++;
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ESP32S3_TIM_SETALRM(freerun->tch, true); /* Re-enables the alarm */
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ESP32S3_TIM_ACKINT(freerun->tch); /* Clear the Interrupt */
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return OK;
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}
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#endif /* CONFIG_CLOCK_TIMEKEEPING */
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: esp32s3_freerun_initialize
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*
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* Description:
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* Initialize the freerun timer wrapper.
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*
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* Input Parameters:
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* freerun - Caller allocated instance of the freerun state structure.
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* chan - Timer counter channel to be used.
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* resolution - The required resolution of the timer in units of
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* microseconds. NOTE that the range is restricted to the
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* range of uint16_t (excluding zero).
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*
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* Returned Value:
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* Zero (OK) is returned on success; a negated errno value is returned
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* on failure.
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*
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****************************************************************************/
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int esp32s3_freerun_initialize(struct esp32s3_freerun_s *freerun, int chan,
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uint16_t resolution)
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{
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uint16_t pre;
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int ret = OK;
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tmrinfo("chan=%d resolution=%d usecs\n", chan, resolution);
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DEBUGASSERT(freerun != NULL);
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DEBUGASSERT(chan >= 0);
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DEBUGASSERT(chan < MAX_TIMERS);
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DEBUGASSERT(resolution > 0);
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/* We can't have a resolution bigger than this.
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* The ESP32-S3 prescaler doesn't support.
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* max resolution = (max prescaler * USEC_PER_SEC) / esp_clk_apb_freq()
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*/
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DEBUGASSERT(resolution <= MAX_US_RESOLUTION);
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freerun->tch = esp32s3_tim_init(chan);
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if (freerun->tch == NULL)
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{
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tmrerr("ERROR: Failed to allocate TIM %d\n", chan);
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ret = -EBUSY;
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}
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else
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{
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/* Initialize the remaining fields in the state structure. */
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freerun->chan = chan;
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freerun->resolution = resolution;
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freerun->max_timeout = (UINT64_C(1) << (TIMER_WIDTH - 1));
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/* Ensure timer is disabled.
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* Change the prescaler divider with the timer enabled can lead to
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* unpredictable results.
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*/
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ESP32S3_TIM_STOP(freerun->tch);
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/* Configure clock source */
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ESP32S3_TIM_CLK_SRC(freerun->tch, ESP32S3_TIM_APB_CLK);
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/* Calculate the suitable prescaler for a period for the requested
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* resolution.
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*/
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pre = esp_clk_apb_freq() * resolution / USEC_PER_SEC;
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tmrinfo("pre=%" PRIu16 " clk=%d\n", pre, esp_clk_apb_freq());
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/* Configure TIMER prescaler */
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ESP32S3_TIM_SETPRE(freerun->tch, pre);
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/* Configure TIMER mode */
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ESP32S3_TIM_SETMODE(freerun->tch, ESP32S3_TIM_MODE_UP);
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/* Clear TIMER counter value */
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ESP32S3_TIM_CLEAR(freerun->tch);
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/* Set the maximum timeout */
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ESP32S3_TIM_SETALRVL(freerun->tch, freerun->max_timeout);
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#ifndef CONFIG_CLOCK_TIMEKEEPING
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/* Set the interrupt */
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freerun->overflow = 0;
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/* Enable autoreload */
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ESP32S3_TIM_SETARLD(freerun->tch, true);
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/* Enable TIMER alarm */
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ESP32S3_TIM_SETALRM(freerun->tch, true);
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/* Clear Interrupt Bits Status */
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ESP32S3_TIM_ACKINT(freerun->tch);
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/* Register the handler */
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{
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irqstate_t flags = spin_lock_irqsave(&g_lock);
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ret = ESP32S3_TIM_SETISR(freerun->tch, freerun_handler, freerun);
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spin_unlock_irqrestore(&g_lock, flags);
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2022-03-02 15:11:19 +01:00
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}
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if (ret == OK)
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{
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ESP32S3_TIM_ENABLEINT(freerun->tch);
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}
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#endif
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/* Finally, start the TIMER */
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ESP32S3_TIM_START(freerun->tch);
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}
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return ret;
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}
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/****************************************************************************
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* Name: esp32s3_freerun_counter
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*
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* Description:
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* Read the counter register of the free-running timer.
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*
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* Input Parameters:
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* freerun - Caller allocated instance of the freerun state structure.
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* This structure must have been previously initialized via a
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* call to esp32s3_freerun_initialize().
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* ts - The location in which to return the time from the
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* free-running timer.
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*
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* Returned Value:
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* Zero (OK) is returned on success; a negated errno value is returned
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* on failure.
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*
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****************************************************************************/
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#ifndef CONFIG_CLOCK_TIMEKEEPING
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int esp32s3_freerun_counter(struct esp32s3_freerun_s *freerun,
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struct timespec *ts)
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{
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uint64_t usec;
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uint64_t counter;
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uint64_t verify;
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uint32_t overflow;
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uint32_t sec;
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int pending;
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irqstate_t flags;
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DEBUGASSERT(freerun != NULL);
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DEBUGASSERT(ts != NULL);
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DEBUGASSERT(freerun->tch != NULL);
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/* Temporarily disable the overflow counter. */
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2022-03-08 18:03:25 +01:00
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flags = spin_lock_irqsave(&g_lock);
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2022-03-02 15:11:19 +01:00
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overflow = freerun->overflow;
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ESP32S3_TIM_GETCTR(freerun->tch, &counter);
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pending = ESP32S3_TIM_CHECKINT(freerun->tch);
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ESP32S3_TIM_GETCTR(freerun->tch, &verify);
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/* If an interrupt was pending before we re-enabled interrupts, then the
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* overflow needs to be incremented.
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*/
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if (pending)
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{
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ESP32S3_TIM_ACKINT(freerun->tch);
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/* Increment the overflow count and use the value of the guaranteed to
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* be AFTER the overflow occurred.
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*/
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overflow++;
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counter = verify;
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/* Update freerun overflow counter. */
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freerun->overflow = overflow;
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}
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2022-03-08 18:03:25 +01:00
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spin_unlock_irqrestore(&g_lock, flags);
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tmrinfo("counter=%" PRIu64 " (%" PRIu64 ") overflow=%" PRIu32
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", pending=%i\n",
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counter, verify, overflow, pending);
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usec = (uint64_t)(((overflow * freerun->max_timeout) + counter)
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* freerun->resolution);
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/* And return the value of the timer */
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sec = (uint32_t)(usec / USEC_PER_SEC);
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ts->tv_sec = sec;
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ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
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tmrinfo(" usec=%" PRIu64 " ts=(%lu, %lu)\n",
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usec, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
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return OK;
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}
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#endif /* CONFIG_CLOCK_TIMEKEEPING */
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/****************************************************************************
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* Name: esp32s3_freerun_uninitialize
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*
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* Description:
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* Stop the free-running timer and release all resources that it uses.
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*
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* Input Parameters:
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* freerun - Caller allocated instance of the freerun state structure.
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* This structure must have been previously initialized via a
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* call to esp32s3_freerun_initialize().
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*
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* Returned Value:
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* Zero (OK) is returned on success; a negated errno value is returned
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* on failure.
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*
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****************************************************************************/
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int esp32s3_freerun_uninitialize(struct esp32s3_freerun_s *freerun)
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{
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int ret;
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DEBUGASSERT(freerun != NULL);
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DEBUGASSERT(freerun->tch != NULL);
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tmrinfo("chan=%d\n", freerun->chan);
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/* Stop timer */
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ESP32S3_TIM_STOP(freerun->tch);
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/* Disable timer interrupt */
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ESP32S3_TIM_DISABLEINT(freerun->tch);
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/* Detach handler */
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ret = ESP32S3_TIM_SETISR(freerun->tch, NULL, NULL);
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/* Free the timer */
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esp32s3_tim_deinit(freerun->tch);
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freerun->tch = NULL;
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return ret;
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}
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#endif /* CONFIG_ESP32S3_FREERUN */
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