2020-07-18 10:05:46 +02:00
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/****************************************************************************
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* arch/arm/src/nrf52/nrf52_rtc.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_NRF52_NRF52_RTC_H
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#define __ARCH_ARM_SRC_NRF52_NRF52_RTC_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Helpers ******************************************************************/
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#define NRF52_RTC_START(d) ((d)->ops->start(d))
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#define NRF52_RTC_STOP(d) ((d)->ops->stop(d))
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#define NRF52_RTC_CLEAR(d) ((d)->ops->clear(d))
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#define NRF52_RTC_TRGOVRFLW(d) ((d)->ops->trgovrflw(d))
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2020-09-06 04:27:29 +02:00
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#define NRF52_RTC_GETCOUNTER(d, c) ((d)->ops->getcounter(d, c))
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2020-07-18 10:05:46 +02:00
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#define NRF52_RTC_SETCC(d, i, cc) ((d)->ops->setcc(d, i, cc))
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#define NRF52_RTC_GETCC(d, i, cc) ((d)->ops->setcc(d, i, cc))
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#define NRF52_RTC_SETPRE(d, pre) ((d)->ops->setpre(d, pre))
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2020-07-25 03:59:05 +02:00
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#define NRF52_RTC_SETISR(d, hnd, arg) ((d)->ops->setisr(d, hnd, arg))
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2020-07-18 10:05:46 +02:00
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#define NRF52_RTC_ENABLEINT(d, s) ((d)->ops->enableint(d, s))
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#define NRF52_RTC_DISABLEINT(d, s) ((d)->ops->disableint(d, s))
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#define NRF52_RTC_CHECKINT(d, s) ((d)->ops->checkint(d, s))
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#define NRF52_RTC_ACKINT(d, s) ((d)->ops->ackint(d, s))
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2020-07-25 03:59:05 +02:00
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#define NRF52_RTC_ENABLEEVT(d, s) ((d)->ops->enableevt(d, s))
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#define NRF52_RTC_DISABLEEVT(d, s) ((d)->ops->disableevt(d, s))
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2021-01-30 21:31:30 +01:00
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#define NRF52_RTC_GETBASE(d) ((d)->ops->getbase(d))
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/* These are defined for direct access to registers, which is needed in some
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* critical parts where access speed is important
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*/
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#define NRF52_RTC_GETCOUNTER_REG(base) (getreg32(base + NRF52_RTC_COUNTER_OFFSET))
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#define NRF52_RTC_SETCC_REG(base, ch, cc) (putreg32(cc, base + NRF52_RTC_CC_OFFSET(ch)))
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#define NRF52_RTC_GETCC_REG(base, ch) (getreg32(base + NRF52_RTC_CC_OFFSET(ch)))
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2020-07-18 10:05:46 +02:00
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* RTC CC index */
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enum nrf52_rtc_cc_e
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{
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NRF52_RTC_CC0 = 0,
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NRF52_RTC_CC1 = 1,
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NRF52_RTC_CC2 = 2,
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NRF52_RTC_CC3 = 3,
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};
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2020-08-24 19:19:41 +02:00
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/* RTC Interrupts/Events */
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2020-07-25 03:59:05 +02:00
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enum nrf52_rtc_evt_e
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{
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NRF52_RTC_EVT_TICK = 0,
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NRF52_RTC_EVT_OVRFLW = 1,
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NRF52_RTC_EVT_COMPARE0 = 2,
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NRF52_RTC_EVT_COMPARE1 = 3,
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NRF52_RTC_EVT_COMPARE2 = 4,
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NRF52_RTC_EVT_COMPARE3 = 5,
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};
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2020-07-18 10:05:46 +02:00
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/* NRF52 RTC device */
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struct nrf52_rtc_dev_s
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{
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struct nrf52_rtc_ops_s *ops;
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};
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/* NRF52 RTC ops */
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struct nrf52_rtc_ops_s
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{
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/* RTC tasks */
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2022-04-17 08:01:48 +02:00
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int (*start)(struct nrf52_rtc_dev_s *dev);
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int (*stop)(struct nrf52_rtc_dev_s *dev);
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int (*clear)(struct nrf52_rtc_dev_s *dev);
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int (*trgovrflw)(struct nrf52_rtc_dev_s *dev);
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2020-07-18 10:05:46 +02:00
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/* RTC operations */
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2022-04-17 08:01:48 +02:00
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int (*getcounter)(struct nrf52_rtc_dev_s *dev, uint32_t *cc);
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int (*setcc)(struct nrf52_rtc_dev_s *dev, uint8_t i, uint32_t cc);
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int (*getcc)(struct nrf52_rtc_dev_s *dev, uint8_t i, uint32_t *cc);
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int (*setpre)(struct nrf52_rtc_dev_s *dev, uint16_t pre);
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2020-07-18 10:05:46 +02:00
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/* RTC interrupts */
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2022-04-17 08:01:48 +02:00
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int (*setisr)(struct nrf52_rtc_dev_s *dev, xcpt_t handler, void *arg);
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int (*enableint)(struct nrf52_rtc_dev_s *dev, uint8_t source);
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int (*disableint)(struct nrf52_rtc_dev_s *dev, uint8_t source);
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int (*checkint)(struct nrf52_rtc_dev_s *dev, uint8_t source);
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int (*ackint)(struct nrf52_rtc_dev_s *dev, uint8_t source);
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2020-07-25 03:59:05 +02:00
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/* RTC events */
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2022-04-17 08:01:48 +02:00
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int (*enableevt)(struct nrf52_rtc_dev_s *dev, uint8_t evt);
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int (*disableevt)(struct nrf52_rtc_dev_s *dev, uint8_t evt);
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2021-01-30 21:31:30 +01:00
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/* Utility */
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2022-04-17 08:01:48 +02:00
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uint32_t (*getbase)(struct nrf52_rtc_dev_s *dev);
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2020-07-18 10:05:46 +02:00
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};
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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2022-04-17 08:01:48 +02:00
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struct nrf52_rtc_dev_s *nrf52_rtc_init(int rtc);
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int nrf52_rtc_deinit(struct nrf52_rtc_dev_s *dev);
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2020-07-18 10:05:46 +02:00
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#endif /* __ARCH_ARM_SRC_NRF52_NRF52_RTC_H */
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