131 lines
4.5 KiB
C
131 lines
4.5 KiB
C
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/****************************************************************************
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* boards/arm/nrf53/thingy53/include/board.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_NRF53_THINGY53_INCLUDE_BOARD_H
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#define __BOARDS_ARM_NRF53_THINGY53_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_NRF53_GPIOTE)
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# include <nuttx/irq.h>
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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#define BOARD_SYSTICK_CLOCK (64000000)
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#define BOARD_OSC_XOSC32KI_INTCAP (OSC_XOSC32KI_INTCAP_C7PF)
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/* Button definitions *******************************************************/
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/* Board supports four buttons. */
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#define BUTTON_BTN1 0
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#define BUTTON_BTN2 1
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#define BUTTON_BTN1_BIT (1 << BUTTON_BTN1)
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#define BUTTON_BTN2_BIT (1 << BUTTON_BTN2)
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/* UART Pins ****************************************************************/
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/* UART0 APP:
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* UART0_RX - P0-12
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* UART0_TX - P0-11
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*
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* UART0 NET:
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* UART0_RX - P0-10
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* UART0_TX - P0-09
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*/
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#ifdef CONFIG_ARCH_CHIP_NRF5340_CPUAPP
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# define BOARD_UART0_RX_PIN (GPIO_MCUSEL_APP | GPIO_INPUT | \
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GPIO_PORT0 | GPIO_PIN(12))
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# define BOARD_UART0_TX_PIN (GPIO_MCUSEL_APP | GPIO_OUTPUT | \
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GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN(11))
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/* Declarations for the Net core */
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# define BOARD_NET_UART0_RX_PIN (GPIO_MCUSEL_NET | GPIO_INPUT | \
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GPIO_PORT0 | GPIO_PIN(10))
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# define BOARD_NET_UART0_TX_PIN (GPIO_MCUSEL_NET | GPIO_OUTPUT | \
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GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN(9))
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#endif
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#ifdef CONFIG_ARCH_CHIP_NRF5340_CPUNET
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# define BOARD_UART0_RX_PIN (GPIO_MCUSEL_NET | GPIO_INPUT | \
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GPIO_PORT0 | GPIO_PIN(10))
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# define BOARD_UART0_TX_PIN (GPIO_MCUSEL_NET | GPIO_OUTPUT | \
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GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN(9))
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#endif
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/* SPI Pins *****************************************************************/
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/* SPI0
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* SPI0_SCK - P0.29
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* SPI0_MOSI - P0.28
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* SPI0_MISO - P0.26
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*/
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#define BOARD_SPI0_SCK_PIN (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN(29))
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#define BOARD_SPI0_MOSI_PIN (GPIO_OUTPUT | GPIO_PORT0 | GPIO_PIN(28))
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#define BOARD_SPI0_MISO_PIN (GPIO_INPUT | GPIO_PORT0 | GPIO_PIN(26))
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/* I2C Pins *****************************************************************/
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/* I2C0 (TWI0)
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* I2C0_SCL - P1.02
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* I2C0_SDA - P1.03
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*/
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#define BOARD_I2C0_SCL_PIN (GPIO_OUTPUT | GPIO_PORT1 | GPIO_PIN(2))
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#define BOARD_I2C0_SDA_PIN (GPIO_INPUT | GPIO_PORT1 | GPIO_PIN(3))
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/* ADC Pins *****************************************************************/
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/* ADC
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* ADC CH0 - P0.06 - AIN2 - BAT_MEAS
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*/
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#define NRF52_ADC_CH0_PIN (GPIO_INPUT | GPIO_PORT0 | GPIO_PIN(6))
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/* QSPI Pins ****************************************************************/
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/* QSPI0
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* QSPI CS - P0.18
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* QSPI SCK - P0.17
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* QSPI IO0 - P0.13
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* QSPI IO1 - P0.14
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*/
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#define NRF52_QSPI0_CSN_PIN (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN(18))
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#define NRF52_QSPI0_SCK_PIN (GPIO_OUTPUT | GPIO_PORT0 | GPIO_PIN(17))
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#define NRF52_QSPI0_IO0_PIN (GPIO_OUTPUT | GPIO_PORT0 | GPIO_PIN(13))
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#define NRF52_QSPI0_IO1_PIN (GPIO_OUTPUT | GPIO_PORT0 | GPIO_PIN(14))
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#endif /* __BOARDS_ARM_NRF53_THINGY53_INCLUDE_BOARD_H */
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