2021-03-24 09:19:50 +01:00
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/****************************************************************************
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2015-01-23 22:25:10 +01:00
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* arch/arm/src/efm32/efm32_rmu.c
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*
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2021-03-31 14:00:42 +02:00
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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2015-01-23 22:25:10 +01:00
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*
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2021-03-31 14:00:42 +02:00
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* http://www.apache.org/licenses/LICENSE-2.0
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2015-01-23 22:25:10 +01:00
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*
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2021-03-31 14:00:42 +02:00
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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2015-01-23 22:25:10 +01:00
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*
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2021-03-24 09:19:50 +01:00
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****************************************************************************/
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2015-01-23 22:25:10 +01:00
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2021-03-24 09:19:50 +01:00
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/****************************************************************************
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2015-01-23 22:25:10 +01:00
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* Included Files
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2021-03-24 09:19:50 +01:00
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****************************************************************************/
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2015-01-23 22:25:10 +01:00
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#include <nuttx/config.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <errno.h>
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#include <nuttx/arch.h>
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#include <arch/board/board.h>
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2022-03-11 17:41:15 +01:00
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#include "arm_internal.h"
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2019-05-25 02:51:49 +02:00
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#include "hardware/efm32_emu.h"
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#include "hardware/efm32_rmu.h"
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2015-01-23 22:25:10 +01:00
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2015-02-01 13:19:53 +01:00
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#include "efm32_rmu.h"
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2015-01-23 22:25:10 +01:00
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2021-03-24 09:19:50 +01:00
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/****************************************************************************
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2015-01-23 22:25:10 +01:00
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* Pre-processor Definitions
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2021-03-24 09:19:50 +01:00
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****************************************************************************/
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2015-01-23 22:25:10 +01:00
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2021-03-24 09:19:50 +01:00
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/****************************************************************************
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2015-01-23 22:25:10 +01:00
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* Private Types
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2021-03-24 09:19:50 +01:00
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****************************************************************************/
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2015-01-23 22:25:10 +01:00
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2016-06-17 20:50:18 +02:00
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#if defined(CONFIG_EFM32_RMU_DEBUG) && defined(CONFIG_DEBUG_WARN)
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2015-02-01 13:19:53 +01:00
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typedef struct
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{
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2015-03-08 14:12:47 +01:00
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const uint32_t val;
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const uint32_t mask;
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2015-10-07 01:28:32 +02:00
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const char *str;
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2015-03-08 14:12:47 +01:00
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} efm32_reset_cause_list_t;
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2015-02-01 13:19:53 +01:00
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#endif
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2021-03-24 09:19:50 +01:00
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/****************************************************************************
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2015-01-23 22:25:10 +01:00
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* Private Data
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2021-03-24 09:19:50 +01:00
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****************************************************************************/
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2015-01-23 22:25:10 +01:00
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2016-06-17 20:50:18 +02:00
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#if defined(CONFIG_EFM32_RMU_DEBUG) && defined(CONFIG_DEBUG_WARN)
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2015-02-01 13:19:53 +01:00
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static efm32_reset_cause_list_t efm32_reset_cause_list[] =
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{
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{
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2015-09-05 15:50:02 +02:00
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0x0001, /* 0bXXXX XXXX XXXX XXX1 */
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0x0001, /* 0bXXXX XXXX XXXX XXX1 */
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2015-02-01 13:19:53 +01:00
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"A Power-on Reset has been performed. X bits are don't care."
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},
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{
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2015-09-05 15:50:02 +02:00
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0x0002, /* 0bXXXX XXXX 0XXX XX10 */
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0x0003, /* 0bXXXX XXXX 1XXX XX11 */
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2015-02-01 13:19:53 +01:00
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"A Brown-out has been detected on the unregulated power."
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},
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{
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2015-09-05 15:50:02 +02:00
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0x0004, /* 0bXXXX XXXX XXX0 0100 */
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2021-03-24 09:19:50 +01:00
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0x001f, /* 0bXXXX XXXX XXX1 1111 */
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2015-02-01 13:19:53 +01:00
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"A Brown-out has been detected on the regulated power."
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},
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{
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2015-09-05 15:50:02 +02:00
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0x0008, /* 0bXXXX XXXX XXXX 1X00 */
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2021-03-24 09:19:50 +01:00
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0x000b, /* 0bXXXX XXXX XXXX 1X11 */
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2015-02-01 13:19:53 +01:00
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"An external reset has been applied."
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},
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{
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2015-09-05 15:50:02 +02:00
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0x0010, /* 0bXXXX XXXX XXX1 XX00 */
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0x0013, /* 0bXXXX XXXX XXX1 XX11 */
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2015-02-01 13:19:53 +01:00
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"A watchdog reset has occurred."
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},
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{
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2015-09-05 15:50:02 +02:00
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0x0020, /* 0bXXXX X000 0010 0000 */
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2021-03-24 09:19:50 +01:00
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0x07ff, /* 0bXXXX X111 1111 1111 */
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2015-02-01 13:19:53 +01:00
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"A lockup reset has occurred."
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},
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{
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2015-09-05 15:50:02 +02:00
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0x0040, /* 0bXXXX X000 01X0 0000 */
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2021-03-24 09:19:50 +01:00
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0x07df, /* 0bXXXX X111 11X1 1111 */
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2015-02-01 13:19:53 +01:00
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"A system request reset has occurred."
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},
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{
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2015-09-05 15:50:02 +02:00
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0x0080, /* 0bXXXX X000 1XX0 0XX0 */
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0x0799, /* 0bXXXX X111 1XX1 1XX1 */
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2015-02-01 13:19:53 +01:00
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"The system has woken up from EM4."
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},
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{
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2015-09-05 15:50:02 +02:00
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0x0180, /* 0bXXXX X001 1XX0 0XX0 */
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0x0799, /* 0bXXXX X111 1XX1 1XX1 */
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2021-03-24 09:19:50 +01:00
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"The system woke up from EM4 on an EM4 wakeup reset request from pin."
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2015-02-01 13:19:53 +01:00
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},
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{
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2015-09-05 15:50:02 +02:00
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0x0200, /* 0bXXXX X01X XXX0 0000 */
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2021-03-24 09:19:50 +01:00
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0x061f, /* 0bXXXX X11X XXX1 1111 */
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2015-02-01 13:19:53 +01:00
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"A Brown-out has been detected on Analog Power Domain 0 (AVDD0)."
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},
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{
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2015-09-05 15:50:02 +02:00
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0x0400, /* 0bXXXX X10X XXX0 0000 */
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2021-03-24 09:19:50 +01:00
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0x061f, /* 0bXXXX X11X XXX1 1111 */
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2015-02-01 13:19:53 +01:00
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"A Brown-out has been detected on Analog Power Domain 1 (AVDD1)."
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},
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{
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2015-09-05 15:50:02 +02:00
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0x0800, /* 0bXXXX 1XXX XXXX 0XX0 */
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0x0809, /* 0bXXXX 1XXX XXXX 1XX1 */
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2015-02-01 13:19:53 +01:00
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"A Brown-out has been detected by the Backup BOD on VDD_DREG."
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},
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{
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2015-09-05 15:50:02 +02:00
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0x1000, /* 0bXXX1 XXXX XXXX 0XX0 */
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0x1009, /* 0bXXX1 XXXX XXXX 1XX1 */
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2015-02-01 13:19:53 +01:00
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"A Brown-out has been detected by the Backup BOD on BU_VIN."
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},
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{
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2015-09-05 15:50:02 +02:00
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0x2000, /* 0bXX1X XXXX XXXX 0XX0 */
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0x2009, /* 0bXX1X XXXX XXXX 1XX1 */
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2015-02-01 13:19:53 +01:00
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"A Brown-out has been detected by the Backup BOD on unregulated power"
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},
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{
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2015-09-05 15:50:02 +02:00
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0x4000, /* 0bX1XX XXXX XXXX 0XX0 */
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0x4009, /* 0bX1XX XXXX XXXX 1XX1 */
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2015-02-01 13:19:53 +01:00
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"A Brown-out has been detected by the Backup BOD on regulated power."
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},
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{
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2015-09-05 15:50:02 +02:00
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0x8000, /* 0b1XXX XXXX XXXX XXX0 */
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0x8001, /* 0b1XXX XXXX XXXX XXX1 */
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2015-02-01 13:19:53 +01:00
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"The system has been in Backup mode."
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}
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};
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#endif
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2021-03-24 09:19:50 +01:00
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/****************************************************************************
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2015-01-23 22:25:10 +01:00
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* Public Data
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2021-03-24 09:19:50 +01:00
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****************************************************************************/
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2015-01-23 22:25:10 +01:00
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/* Variable old last reset cause of cpu. */
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uint32_t g_efm32_rstcause;
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2021-03-24 09:19:50 +01:00
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/****************************************************************************
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2015-01-23 22:25:10 +01:00
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* Private Functions
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2021-03-24 09:19:50 +01:00
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****************************************************************************/
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2015-01-23 22:25:10 +01:00
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2021-03-24 09:19:50 +01:00
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/****************************************************************************
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2015-01-23 22:25:10 +01:00
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* Public Functions
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2021-03-24 09:19:50 +01:00
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****************************************************************************/
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2015-01-23 22:25:10 +01:00
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2021-03-24 09:19:50 +01:00
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/****************************************************************************
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2015-02-01 13:19:53 +01:00
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* Name: efm32_reset_cause_list_str
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*
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* Description:
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* Return next reset cause string, NULL if no more reset cause.
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*
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2018-02-01 17:00:02 +01:00
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* Input Parameters:
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2015-02-01 13:19:53 +01:00
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* reg: reset cause register to decode (like g_efm32_rstcause)
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* idx: Use to keep in maind reset cause decoding position.
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* set *idx to zero before first call.
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*
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2021-03-24 09:19:50 +01:00
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****************************************************************************/
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2015-02-01 13:19:53 +01:00
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2016-06-17 20:50:18 +02:00
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#if defined(CONFIG_EFM32_RMU_DEBUG) && defined(CONFIG_DEBUG_WARN)
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2015-02-01 13:19:53 +01:00
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const char *efm32_reset_cause_list_str(uint32_t reg, unsigned int *idx)
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{
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2021-03-24 09:19:50 +01:00
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int len = sizeof(efm32_reset_cause_list) /
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sizeof(efm32_reset_cause_list[0]);
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2015-02-01 13:19:53 +01:00
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efm32_reset_cause_list_t *ptr = NULL;
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do
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{
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if (*idx >= len)
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{
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return NULL;
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}
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ptr = &efm32_reset_cause_list[*idx];
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(*idx)++;
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}
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while ((ptr->mask & reg) != ptr->val);
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if (ptr != NULL)
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{
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return ptr->str;
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}
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return NULL;
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}
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#endif
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2021-03-24 09:19:50 +01:00
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/****************************************************************************
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2015-01-23 22:25:10 +01:00
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* Name: efm32_rmu_initialize
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*
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* Description:
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2021-03-24 09:19:50 +01:00
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* Store reset cause into g_efm32_rstcause then clear reset cause
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* register.
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2015-01-23 22:25:10 +01:00
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*
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2021-03-24 09:19:50 +01:00
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****************************************************************************/
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2015-01-23 22:25:10 +01:00
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void efm32_rmu_initialize(void)
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{
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2015-02-01 13:19:53 +01:00
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#ifdef CONFIG_EFM32_RMU_DEBUG
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unsigned int idx = 0;
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#endif
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2015-01-23 22:25:10 +01:00
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uint32_t locked;
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2015-02-01 13:19:53 +01:00
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2015-01-23 22:25:10 +01:00
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g_efm32_rstcause = getreg32(EFM32_RMU_RSTCAUSE);
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/* Now clear reset cause */
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2015-10-07 19:39:06 +02:00
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putreg32(RMU_CMD_RCCLR, EFM32_RMU_CMD);
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2015-01-23 22:25:10 +01:00
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2015-02-01 13:19:53 +01:00
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/* Clear some reset causes not cleared with RMU CMD register
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* (If EMU registers locked, they must be unlocked first)
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2015-01-23 22:25:10 +01:00
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*/
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locked = getreg32(EFM32_EMU_LOCK) & EMU_LOCK_LOCKKEY_LOCKED;
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if (locked)
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{
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/* EMU unlock */
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2015-10-07 19:39:06 +02:00
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putreg32(EMU_LOCK_LOCKKEY_LOCK, EMU_LOCK_LOCKKEY_UNLOCK);
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2015-01-23 22:25:10 +01:00
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}
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2015-10-07 19:39:06 +02:00
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modifyreg32(EFM32_EMU_AUXCTRL, 0, EMU_AUXCTRL_HRCCLR);
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modifyreg32(EFM32_EMU_AUXCTRL, EMU_AUXCTRL_HRCCLR, 0);
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2015-01-23 22:25:10 +01:00
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if (locked)
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{
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/* EMU lock */
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2015-10-07 19:39:06 +02:00
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putreg32(EMU_LOCK_LOCKKEY_LOCK, EMU_LOCK_LOCKKEY_LOCK);
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2015-01-23 22:25:10 +01:00
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}
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2015-02-01 13:19:53 +01:00
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2016-06-17 20:50:18 +02:00
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#if defined(CONFIG_EFM32_RMU_DEBUG) && defined(CONFIG_DEBUG_WARN)
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rmuwarn("RMU => reg = 0x%08X\n", g_efm32_rstcause);
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2015-10-07 19:39:06 +02:00
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for (; ; )
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2015-02-01 13:19:53 +01:00
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{
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2015-10-07 01:28:32 +02:00
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const char *str;
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2015-02-01 13:19:53 +01:00
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str = efm32_reset_cause_list_str(g_efm32_rstcause, &idx);
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if (str == NULL)
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{
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break;
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}
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|
2016-06-17 20:50:18 +02:00
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rmuwarn("RMU => %s\n", str);
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2015-02-01 13:19:53 +01:00
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}
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#endif
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2015-01-23 22:25:10 +01:00
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}
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