2014-11-26 22:18:24 +01:00
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/****************************************************************************
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2019-08-14 14:34:18 +02:00
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* boards/arm/lpc43xx/lpc4357-evb/include/board.h
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2014-11-26 22:18:24 +01:00
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*
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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2019-08-14 14:34:18 +02:00
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#ifndef __BOARDS_ARM_LPC43XX_LPC4357_EVB_INCLUDE_BOARD_H
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#define __BOARDS_ARM_LPC43XX_LPC4357_EVB_INCLUDE_BOARD_H
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2014-11-26 22:18:24 +01:00
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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2016-07-22 22:55:39 +02:00
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#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ)
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2014-11-26 22:18:24 +01:00
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# include <nuttx/irq.h>
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking ****************************************************************/
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2019-08-14 14:34:18 +02:00
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2014-11-26 22:18:24 +01:00
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/* NOTE: The following definitions require lpc43_cgu.h. It is not included
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* here because the including C file may not have that file in its include
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* path.
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*
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* The Xplorer board has four crystals on board:
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*
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* Y1 - RTC 32.768 MHz oscillator input,
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* Y2 - 24.576 MHz input to the UDA 1380 audio codec,
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* Y3 - 12.000 MHz LPC43xx crystal oscillator input
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* Y4 - 50 MHz input for Ethernet
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*/
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#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency (Y3) */
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#define BOARD_RTCCLK_FREQUENCY (32768) /* RTC oscillator frequency (Y1) */
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#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */
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/* Integer and direct modes are supported:
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*
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* In integer mode (Fclkout < 156000000):
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* Fclkin = BOARD_XTAL_FREQUENCY
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* Fclkout = Msel * FClkin / Nsel
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* Fcco = 2 * Psel * Fclkout
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* In direct mode (Fclkout > 156000000):
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* Fclkin = BOARD_XTAL_FREQUENCY
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* Fclkout = Msel * FClkin / Nsel
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* Fcco = Fclkout
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*/
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#ifdef CONFIG_LPC43_72MHz
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/* NOTE: At 72MHz, the calibrated value of CONFIG_BOARD_LOOPSPERMSEC was
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* determined to be:
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*
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* CONFIG_BOARD_LOOPSPERMSEC=7191
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*
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* executing from SRAM.
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*/
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/* Final clocking (Integer mode with no ramp-up)
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*
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* Fclkout = 6 * 12MHz / 1 = 72MHz
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* Fcco = 2 * 2 * 72MHz = 216MHz
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*/
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# define BOARD_PLL_MSEL (6) /* Msel = 6 */
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# define BOARD_PLL_NSEL (1) /* Nsel = 1 */
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# define BOARD_PLL_PSEL (2) /* Psel = 2 */
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# define BOARD_FCLKOUT_FREQUENCY (72000000) /* 6 * 12,000,000 / 1 */
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# define BOARD_FCCO_FREQUENCY (244000000) /* 2 * 2 * Fclkout */
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#else
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/* NOTE: At 72MHz, the calibrated value of CONFIG_BOARD_LOOPSPERMSEC was
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* determined to be:
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*
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* CONFIG_BOARD_LOOPSPERMSEC=18535
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*
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* executing from SRAM.
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*/
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/* Intermediate ramp-up clocking (Integer mode). If BOARD_PLL_RAMP_MSEL
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* is not defined, there will be no ramp-up.
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*
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* Fclkout = 9 * 12MHz / 1 = 108MHz
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* Fcco = 2 * 1 * 108MHz = 216MHz
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*/
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# define BOARD_PLL_RAMP_MSEL (9) /* Msel = 9 */
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# define BOARD_PLL_RAMP_NSEL (1) /* Nsel = 1 */
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# define BOARD_PLL_RAMP_PSEL (1) /* Psel = 1 */
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# define BOARD_RAMP_FCLKOUT (108000000) /* 9 * 12,000,000 / 1 */
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# define BOARD_RAMP_FCCO (216000000) /* 2 * 1 * Fclkout */
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/* Final clocking (Direct mode).
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*
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* Fclkout = 17 * 12MHz / 1 = 204MHz
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* Fcco = Fclockout = 204MHz
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*/
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# define BOARD_PLL_MSEL (17) /* Msel = 17 */
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# define BOARD_PLL_NSEL (1) /* Nsel = 1 */
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# define BOARD_FCLKOUT_FREQUENCY (204000000) /* 17 * 12,000,000 / 1 */
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# define BOARD_FCCO_FREQUENCY (204000000) /* Fclockout */
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#endif
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/* This is the clock setup we configure for:
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*
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2019-08-14 14:34:18 +02:00
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* SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source
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* PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20, pre-divider=1
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* CCLCK = 480MHz / 6 = 80MHz -> CCLK divider = 6
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2014-11-26 22:18:24 +01:00
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*/
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#define LPC43_CCLK BOARD_FCLKOUT_FREQUENCY
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2015-09-10 16:15:21 +02:00
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/* USB0 ********************************************************************/
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2019-08-14 14:34:18 +02:00
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2015-09-10 16:15:21 +02:00
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/* Settings needed in lpc43_cpu.c */
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2015-10-01 19:08:07 +02:00
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#define BOARD_USB0_CLKSRC PLL0USB_CLKSEL_XTAL
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#define BOARD_USB0_MDIV 0x06167ffa /* Table 149 datsheet, valid for 12Mhz Fclkin */
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#define BOARD_USB0_NP_DIV 0x00302062 /* Table 149 datsheet, valid for 12Mhz Fclkin */
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2015-09-10 16:15:21 +02:00
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2014-11-26 22:18:24 +01:00
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/* SPIFI clocking **********************************************************/
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2019-08-14 14:34:18 +02:00
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2014-11-26 22:18:24 +01:00
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/* The SPIFI will receive clocking from a divider per the settings provided
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* in this file. The NuttX code will configure PLL1 as the input clock
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* for the selected divider
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*/
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#undef BOARD_SPIFI_PLL1 /* No division */
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#undef BOARD_SPIFI_DIVA /* Supports division by 1-4 */
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#undef BOARD_SPIFI_DIVB /* Supports division by 1-16 */
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#undef BOARD_SPIFI_DIVC /* Supports division by 1-16 */
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#undef BOARD_SPIFI_DIVD /* Supports division by 1-16 */
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#undef BOARD_SPIFI_DIVE /* Supports division by 1-256 */
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#if BOARD_FCLKOUT_FREQUENCY < 20000000
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# define BOARD_SPIFI_PLL1 1 /* Use PLL1 directly */
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#else
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# define BOARD_SPIFI_DIVB 1 /* Use IDIVB */
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#endif
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/* We need to configure the divider so that its output is as close to the
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* desired SCLK value. The peak data transfer rate will be about half of
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* this frequency in bytes per second.
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*/
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#if BOARD_FCLKOUT_FREQUENCY < 20000000
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# define BOARD_SPIFI_FREQUENCY BOARD_FCLKOUT_FREQUENCY /* 72Mhz? */
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#else
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# define BOARD_SPIFI_DIVIDER (14) /* 204MHz / 14 = 14.57MHz */
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# define BOARD_SPIFI_FREQUENCY (102000000) /* 204MHz / 14 = 14.57MHz */
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#endif
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/* UART clocking ***********************************************************/
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2019-08-14 14:34:18 +02:00
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2014-11-26 22:18:24 +01:00
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/* Configure all U[S]ARTs to use the XTAL input frequency */
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#define BOARD_USART0_CLKSRC BASE_USART0_CLKSEL_XTAL
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#define BOARD_USART0_BASEFREQ BOARD_XTAL_FREQUENCY
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#define BOARD_UART1_CLKSRC BASE_UART1_CLKSEL_XTAL
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#define BOARD_UART1_BASEFREQ BOARD_XTAL_FREQUENCY
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#define BOARD_USART2_CLKSRC BASE_USART2_CLKSEL_XTAL
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#define BOARD_USART2_BASEFREQ BOARD_XTAL_FREQUENCY
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#define BOARD_USART3_CLKSRC BASE_USART3_CLKSEL_XTAL
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#define BOARD_USART3_BASEFREQ BOARD_XTAL_FREQUENCY
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/* LED definitions *********************************************************/
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2019-08-14 14:34:18 +02:00
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2014-11-27 17:28:32 +01:00
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/* The LPC4357-EVB has one user-controllable LED labelled D6 controlled
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* by the signal LED_3V3:
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2014-11-26 22:18:24 +01:00
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*
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2014-11-27 17:28:32 +01:00
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* ---- ------- -------------
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* LED SIGNAL MCU
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* ---- ------- -------------
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* D6 LED_3V3 PE_7 GPIO7[7]
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* ---- ------- -------------
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2014-11-26 22:18:24 +01:00
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*
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2014-11-27 19:38:04 +01:00
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* A low output illuminates the LED.
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2014-11-26 22:18:24 +01:00
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*
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2015-11-01 17:53:34 +01:00
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* LED index values for use with board_userled()
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2014-11-26 22:18:24 +01:00
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*/
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2014-11-27 17:28:32 +01:00
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#define BOARD_LED 0
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#define BOARD_NLEDS 1
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2014-11-26 22:18:24 +01:00
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2015-11-01 17:53:34 +01:00
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/* LED bits for use with board_userled_all() */
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2014-11-26 22:18:24 +01:00
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2014-11-27 17:28:32 +01:00
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#define BOARD_LED _BIT (1 << BOARD_LED)
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2014-11-26 22:18:24 +01:00
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2014-11-27 17:28:32 +01:00
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/* If CONFIG_ARCH_LEDS is defined, the LED will be controlled as follows
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* for NuttX debug functionality (where NC means "No Change").
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*/
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/* LED */
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#define LED_STARTED 0 /* OFF */
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#define LED_HEAPALLOCATE 0 /* OFF */
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#define LED_IRQSENABLED 0 /* OFF */
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#define LED_STACKCREATED 1 /* ON */
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#define LED_INIRQ 2 /* NC */
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#define LED_SIGNAL 2 /* NC */
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#define LED_ASSERTION 2 /* NC */
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#define LED_PANIC 3 /* Flashing */
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/* If CONFIG_ARCH_LEDS is not defined, then the LEDs are completely under
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2014-11-26 22:18:24 +01:00
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* control of the application. The following interfaces are then available
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* for application control of the LEDs:
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*
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2015-11-01 17:53:34 +01:00
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* void board_userled_initialize(void);
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* void board_userled(int led, bool ledon);
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* void board_userled_all(uint8_t ledset);
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2014-11-26 22:18:24 +01:00
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*/
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2014-11-27 17:28:32 +01:00
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/* Button definitions *******************************************************/
|
2019-08-14 14:34:18 +02:00
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2014-11-27 17:28:32 +01:00
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/* To be provided */
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2014-11-26 22:18:24 +01:00
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/* UART Pins ****************************************************************/
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2019-08-14 14:34:18 +02:00
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2014-11-27 17:28:32 +01:00
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/* REVISIT: Thee are most likely left over from the LPC4330-Xplorer */
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2019-08-14 14:34:18 +02:00
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2014-11-26 22:18:24 +01:00
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/* The LPC4357-EVB does not have RS-232 drivers or serial connectors on
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* board. USART0 and UART1 are available on J8 as follows:
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*
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* ------ ------ -----------------------
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* SIGNAL J8 PIN LPC4357FET256 PIN
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* (TFBGA100 package)
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* ------ ------ -----------------------
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* U0_TXD pin 9 F6 P6_4 U0_TXD=Alt 2
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* U0_RXD pin 10 F9 P6_5 U0_RXD=Alt 2
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* U1_TXD pin 13 H8 P1_13 U1_TXD=Alt 1
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* U1_RXD pin 14 J8 P1_14 U1_RXD=Alt 1
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* ------ ------ -----------------------
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*
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* The following definitions must be provided so that the LPC43 serial
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* driver can set up the U[S]ART for the serial console properly (see the
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* file arch/arc/src/lpc43xx/lpc4310203050_pinconf.h for more info).
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*/
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#define PINCONF_U0_TXD PINCONF_U0_TXD_4
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#define PINCONF_U0_RXD PINCONF_U0_RXD_4
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#define PINCONF_U0_DIR PINCONF_U0_DIR_3
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#define PINCONF_U1_TXD PINCONF_U1_TXD_1
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#define PINCONF_U1_RXD PINCONF_U1_RXD_1
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2015-01-26 14:33:22 +01:00
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#define PINCONF_U2_TXD PINCONF_U2_TXD_3
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#define PINCONF_U2_RXD PINCONF_U2_RXD_3
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#define PINCONF_U2_DIR PINCONF_U2_DIR_2
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2014-11-26 22:18:24 +01:00
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2015-01-26 14:33:22 +01:00
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#define PINCONF_U3_TXD PINCONF_U3_TXD_4
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#define PINCONF_U3_RXD PINCONF_U3_RXD_4
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#define PINCONF_U3_DIR PINCONF_U3_DIR_3
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2014-11-26 22:18:24 +01:00
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2020-01-31 19:07:39 +01:00
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#endif /* __BOARDS_ARM_LPC43XX_LPC4357_EVB_INCLUDE_BOARD_H */
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