This is the initial commit the port to the SAMD5x/E5x MCU family and also support for the Adafruit Metro M4 board. It port is untested and unfinished. It currently will not even link due to some missing clock related logic.
Squashed commit of the following:
arch/arm/src/samd5e5: Clean-up EIC logic.
arch/arm/src/samd5e5: Fix some compilation issues; Still issues with the EIC logic from samd2x.
arch/arm/src/samd5e5: Fix some compilation issues; bring in some EIC logic from samd2x.
arch/arm/src/samd5e5: Add NVMCTRL header file, fix some compiler problems, misc. clean-up.
configs/metro-m4: Add LED support.
arch/arm/src/samd5e5: Bring in SAML21 clock configuration. This is a WIP; it cannot possible even compile yet.
arch/arm/src/samd5e5: Leverage Cortex-M4 interrupt and SysTick logic from the SAM3/4.
arch/arm/src/samd5e5: Add SERCOM utility function.
arch/arm/src/samd5e5: Bring all SERCOM USART logic from SAMD2L2 to SAMD5E5. This is a brute coy with nothing more than more that name changes and extension from 5 to 7 SERCOMs.
arch/arm/src/samd5e5: Add sam_config.h header file
arch/arm/src/samd5e5/: Add Generic Clock (GCLK) utility functions.
arch/arm/src/samd5e5: Add EVSYS register definition file
arch/arm/src/samd5e5 and configs/metro-m4: Use SERCOM3 for the Arduino serial shield as console.
arch/arm/src/samd5e5/chip: Add SERCOM USART, SPI, I2C master, and slave register defintions header files
arch/arm/src/samd5e5/chip: Add AES, PM, TRNG, and WDT header files.
arch/arm/src/samd5e5/chip: Add pin multiplexing header files.
Various fixes to configuration system; fix metro-m4/nsh defconfig file.
configs/metro-m4: Add initial support for the Adafruit Metro M4 board.
arch/arm/src/samd5e5: Add peripheral clock helpers.
arch/arm/src/samd5e5/chip: Add PAC register definition header file. Fix some errors in the memory map header file.
arch/arm/src/samd5e5: Add chip.h headerf file.
arch/arm/src/samd5e5: Add PORT register definitions and support from SAML21.
arch/arm/include/samd5e5: Add interrupt vector definitions.
arch/arm/src/samd5e5: Add some boilerplate files. Correct some typos.
arch/arm/src/samd5e5/chip/sam_eic.h: Add EIC register definitions.
arch/arm/src/samd5e5/chip: Add OSC32KCTRL and OSCCTRL register definitions.
arch/arm/src/samd5e5/chip: Add GCLK, MCLK, and RSTC header files.
arch/arm/src/samd5e5/chip/sam_cmcc.h: Add CMCC register definitions
arch/arm/src/samd5e5/chip/sam_supc.h: Add SUPC header file.
arch/arm/src/samd5e5: Add start-up logic.
arch/arm/src/samd5e5: Add Make.defs file
arch/arm/src/samd5e5/chip: Add memory map header file.
arch/arm/include/samd5e5: Add chip.h header file.
arch/arm/Kconfig and arch/arm/src/samd5e5/Kconfig: Add configuration logic for the SAMD5x/Ex family.
2018-07-26 20:08:58 +02:00
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#
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# For a description of the syntax of this configuration file,
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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if ARCH_BOARD_METRO_M4
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2018-08-03 23:26:44 +02:00
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choice
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prompt "Execution memory"
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default METRO_M4_RUNFROMFLASH
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config METRO_M4_RUNFROMFLASH
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bool "Run from FLASH"
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2023-02-09 09:01:01 +01:00
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depends on BOOT_RUNFROMFLASH
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2018-08-03 23:26:44 +02:00
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---help---
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This is the normal configuration for building METRO M4 code.
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config METRO_M4_RUNFROMSRAM
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bool "Run from SRAM"
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2023-02-09 09:01:01 +01:00
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depends on BOOT_RUNFROMISRAM
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2018-08-03 23:26:44 +02:00
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---help---
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During early bring-up, it is safer to execute entirely from
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SRAM until you are confident in the initialization logic.
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Then you can safely switch to FLASH.
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REVISIT: This auto-selects CONFIG_BOOT_RUNFROMISRAM but I have
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found, with some difficulty, that that choice still defaults to
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CONFIG_BOOT_RUNFROMFLASH, causing link-time failures when running
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from SRAM.
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endchoice # Execution memory
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2018-09-01 22:38:19 +02:00
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config METRO_M4_32KHZXTAL
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bool "32.768 KHz XTAL"
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default n
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---help---
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According to the schematic, a 32.768 KHz crystal is installed on
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board. However, I have been unable to use this crystal and thought
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perhaps it is missing or defective on my board (there is a metal
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package that could be a crystal on board, but I am not certain).
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Another, more likely option is that there is a coding error on my
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part that prevents the 32.768 KHz crystal from usable(?)
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The configuration defaults to using the always-on OSCULP32 as the
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slow clock source. This option will select instead XOSC32 as the
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slow clock source.
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2020-08-20 06:07:22 +02:00
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config METRO_M4_AT24_BLOCKMOUNT
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bool "AT24 Serial EEPROM auto-mount"
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default n
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depends on MTD_AT24XX
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---help---
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Automatically initialize the AT24 I2C EEPROM driver when NSH starts.
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choice
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prompt "AT24 serial EPPROM configuration"
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default METRO_M4_AT24_FTL
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depends on METRO_M4_AT24_BLOCKMOUNT
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config METRO_M4_AT24_FTL
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bool "Create AT24 block driver"
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---help---
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Create the MTD driver for the AT24 and "wrap" the AT24 as a standard
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block driver that could then, for example, be mounted using FAT or
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any other file system. Any file system may be used, but there will
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be no wear-leveling.
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config METRO_M4_AT24_NXFFS
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bool "Create AT24 NXFFS file system"
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depends on FS_NXFFS
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---help---
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Create the MTD driver for the AT24 and mount the AT24 device as
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a wear-leveling, NuttX FLASH file system (NXFFS). The downside of
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NXFFS is that it can be very slow.
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endchoice # AT24 serial EPPROM configuration
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2020-08-10 22:11:34 +02:00
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if FS_AUTOMOUNTER
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config METRO_M4_USB_AUTOMOUNT
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bool "USB automounter"
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default n
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if METRO_M4_USB_AUTOMOUNT
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config METRO_M4_USB_AUTOMOUNT_FSTYPE
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string "USB file system type"
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default "vfat"
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config METRO_M4_USB_AUTOMOUNT_BLKDEV
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string "USB block device"
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default "/dev/sda"
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config METRO_M4_USB_AUTOMOUNT_MOUNTPOINT
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string "USB mount point"
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default "/mnt/usb"
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config METRO_M4_USB_AUTOMOUNT_DDELAY
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int "USB debounce delay (milliseconds)"
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default 1000
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config METRO_M4_USB_AUTOMOUNT_UDELAY
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int "USB unmount retry delay (milliseconds)"
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default 2000
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endif # METRO_M4_USB_AUTOMOUNT
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endif # FS_AUTOMOUNTER
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2018-09-01 22:38:19 +02:00
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2018-08-03 23:26:44 +02:00
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endif # ARCH_BOARD_METRO_M4
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