2017-08-30 10:40:58 +02:00
|
|
|
CONFIG_ADC=y
|
2017-07-10 03:25:19 +02:00
|
|
|
CONFIG_ANALOG=y
|
2017-08-30 10:40:58 +02:00
|
|
|
CONFIG_ARCH="arm"
|
2017-05-04 13:45:37 +02:00
|
|
|
CONFIG_ARCH_BOARD="nucleo-l452re"
|
2017-08-30 10:40:58 +02:00
|
|
|
CONFIG_ARCH_BOARD_NUCLEO_L452RE=y
|
2017-05-04 13:45:37 +02:00
|
|
|
CONFIG_ARCH_BUTTONS=y
|
2017-07-10 03:25:19 +02:00
|
|
|
CONFIG_ARCH_CHIP_STM32L452RE=y
|
2017-08-30 10:40:58 +02:00
|
|
|
CONFIG_ARCH_CHIP_STM32L4=y
|
|
|
|
|
# CONFIG_ARCH_FPU is not set
|
2017-07-10 03:25:19 +02:00
|
|
|
CONFIG_ARCH_INTERRUPTSTACK=2048
|
2017-05-04 13:45:37 +02:00
|
|
|
CONFIG_ARCH_IRQBUTTONS=y
|
2017-07-10 03:25:19 +02:00
|
|
|
CONFIG_ARCH_STACKDUMP=y
|
|
|
|
|
CONFIG_ARMV7M_STACKCHECK=y
|
|
|
|
|
CONFIG_BOARD_LOOPSPERMSEC=8499
|
2017-05-04 13:45:37 +02:00
|
|
|
CONFIG_BUILTIN=y
|
2017-08-30 10:40:58 +02:00
|
|
|
CONFIG_DAC=y
|
2017-07-10 03:25:19 +02:00
|
|
|
CONFIG_DEBUG_ASSERTIONS=y
|
|
|
|
|
CONFIG_DEBUG_ERROR=y
|
|
|
|
|
CONFIG_DEBUG_FEATURES=y
|
|
|
|
|
CONFIG_DEBUG_INFO=y
|
|
|
|
|
CONFIG_DEBUG_SYMBOLS=y
|
|
|
|
|
CONFIG_DEBUG_WARN=y
|
2017-08-30 10:40:58 +02:00
|
|
|
CONFIG_EXAMPLES_ADC_SWTRIG=y
|
|
|
|
|
CONFIG_EXAMPLES_ADC=y
|
2017-05-04 13:45:37 +02:00
|
|
|
CONFIG_EXAMPLES_ALARM=y
|
|
|
|
|
CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
|
2017-07-10 03:25:19 +02:00
|
|
|
CONFIG_EXAMPLES_NSH=y
|
2017-05-04 13:45:37 +02:00
|
|
|
CONFIG_EXAMPLES_OSTEST=y
|
|
|
|
|
CONFIG_EXAMPLES_RANDOM=y
|
2017-07-10 03:25:19 +02:00
|
|
|
CONFIG_FS_PROCFS_REGISTER=y
|
|
|
|
|
CONFIG_FS_PROCFS=y
|
|
|
|
|
CONFIG_HAVE_CXXINITIALIZE=y
|
2017-08-30 10:40:58 +02:00
|
|
|
CONFIG_HAVE_CXX=y
|
2017-07-10 03:25:19 +02:00
|
|
|
CONFIG_I2C_RESET=y
|
|
|
|
|
CONFIG_I2C=y
|
|
|
|
|
CONFIG_MAX_TASKS=16
|
|
|
|
|
CONFIG_MAX_WDOGPARMS=2
|
|
|
|
|
CONFIG_MM_REGIONS=2
|
|
|
|
|
CONFIG_NFILE_DESCRIPTORS=8
|
|
|
|
|
CONFIG_NFILE_STREAMS=8
|
|
|
|
|
CONFIG_NSH_ARCHINIT=y
|
2017-08-30 10:40:58 +02:00
|
|
|
# CONFIG_NSH_ARGCAT is not set
|
2017-05-04 13:45:37 +02:00
|
|
|
CONFIG_NSH_BUILTIN_APPS=y
|
2017-08-30 10:40:58 +02:00
|
|
|
# CONFIG_NSH_CMDOPT_DF_H is not set
|
|
|
|
|
# CONFIG_NSH_CMDPARMS is not set
|
2017-05-04 13:45:37 +02:00
|
|
|
CONFIG_NSH_DISABLE_IFUPDOWN=y
|
|
|
|
|
CONFIG_NSH_FILEIOSIZE=512
|
2017-07-10 03:25:19 +02:00
|
|
|
CONFIG_NSH_LINELEN=64
|
|
|
|
|
CONFIG_NSH_READLINE=y
|
|
|
|
|
CONFIG_PREALLOC_MQ_MSGS=4
|
|
|
|
|
CONFIG_PREALLOC_TIMERS=4
|
|
|
|
|
CONFIG_PREALLOC_WDOGS=8
|
|
|
|
|
CONFIG_RAM_SIZE=131072
|
|
|
|
|
CONFIG_RAM_START=0x20000000
|
|
|
|
|
CONFIG_RAW_BINARY=y
|
2017-05-04 13:45:37 +02:00
|
|
|
CONFIG_READLINE_CMD_HISTORY=y
|
2017-07-10 03:25:19 +02:00
|
|
|
CONFIG_READLINE_TABCOMPLETION=y
|
|
|
|
|
CONFIG_RR_INTERVAL=200
|
|
|
|
|
CONFIG_RTC_ALARM=y
|
|
|
|
|
CONFIG_RTC_DATETIME=y
|
|
|
|
|
CONFIG_RTC_DRIVER=y
|
|
|
|
|
CONFIG_RTC_IOCTL=y
|
|
|
|
|
CONFIG_RTC_NALARMS=2
|
|
|
|
|
CONFIG_RTC=y
|
|
|
|
|
CONFIG_SCHED_WAITPID=y
|
|
|
|
|
CONFIG_SDCLONE_DISABLE=y
|
|
|
|
|
CONFIG_SERIAL_TERMIOS=y
|
|
|
|
|
CONFIG_STACK_COLORATION=y
|
2017-08-30 10:40:58 +02:00
|
|
|
CONFIG_STM32L4_ADC1_DMA=y
|
|
|
|
|
CONFIG_STM32L4_ADC1=y
|
|
|
|
|
CONFIG_STM32L4_DAC1=y
|
2017-07-10 03:25:19 +02:00
|
|
|
CONFIG_STM32L4_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
|
|
|
|
|
CONFIG_STM32L4_DMA1=y
|
|
|
|
|
CONFIG_STM32L4_DMA2=y
|
|
|
|
|
CONFIG_STM32L4_I2C1=y
|
|
|
|
|
CONFIG_STM32L4_PWR=y
|
|
|
|
|
CONFIG_STM32L4_RNG=y
|
|
|
|
|
CONFIG_STM32L4_SAI1PLL=y
|
|
|
|
|
CONFIG_STM32L4_SPI1=y
|
|
|
|
|
CONFIG_STM32L4_SRAM2_HEAP=y
|
|
|
|
|
CONFIG_STM32L4_USART2=y
|
|
|
|
|
CONFIG_SYSTEM_I2CTOOL=y
|
2017-05-04 13:45:37 +02:00
|
|
|
CONFIG_SYSTEM_STACKMONITOR=y
|
|
|
|
|
CONFIG_SYSTEM_TEE=y
|
2017-07-10 03:25:19 +02:00
|
|
|
CONFIG_TASK_NAME_SIZE=0
|
|
|
|
|
CONFIG_USART2_RXBUFSIZE=128
|
|
|
|
|
CONFIG_USART2_SERIAL_CONSOLE=y
|
|
|
|
|
CONFIG_USART2_TXBUFSIZE=128
|
|
|
|
|
CONFIG_USER_ENTRYPOINT="nsh_main"
|
|
|
|
|
CONFIG_WDOG_INTRESERVE=1
|
