2018-04-26 19:22:28 +02:00
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/****************************************************************************
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* arch/or1k/include/mor1kx/irq.h
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*
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* Copyright (C) 2018 Extent3D. All rights reserved.
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* Author: Matt Thompson <matt@extent3d.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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2020-04-05 23:00:04 +02:00
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/* This file should never be included directly but, rather, only indirectly
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2018-04-26 19:22:28 +02:00
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_OR1K_INCLUDE_MOR1KX_IRQ_H
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#define __ARCH_OR1K_INCLUDE_MOR1KX_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/irq.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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#include <arch/spr.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define OR1K_NR_EXT_IRQ (32)
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#define OR1K_NR_INT_IRQ (1)
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#define NR_IRQS (OR1K_NR_EXT_IRQ + OR1K_NR_INT_IRQ)
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/* External interrupts are numbered 0-31. These can be used directly
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* as bit shift offsets in the programmable interrupt controller register.
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*/
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#define OR1K_IRQ_EXT0 (0)
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#define OR1K_IRQ_EXT1 (1)
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#define OR1K_IRQ_EXT2 (2)
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#define OR1K_IRQ_EXT3 (3)
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#define OR1K_IRQ_EXT4 (4)
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#define OR1K_IRQ_EXT5 (5)
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#define OR1K_IRQ_EXT6 (6)
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#define OR1K_IRQ_EXT7 (7)
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#define OR1K_IRQ_EXT8 (8)
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#define OR1K_IRQ_EXT9 (9)
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#define OR1K_IRQ_EXT10 (10)
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#define OR1K_IRQ_EXT11 (11)
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#define OR1K_IRQ_EXT12 (12)
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#define OR1K_IRQ_EXT13 (13)
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#define OR1K_IRQ_EXT14 (14)
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#define OR1K_IRQ_EXT15 (15)
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#define OR1K_IRQ_EXT16 (16)
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#define OR1K_IRQ_EXT17 (17)
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#define OR1K_IRQ_EXT18 (18)
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#define OR1K_IRQ_EXT19 (19)
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#define OR1K_IRQ_EXT20 (20)
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#define OR1K_IRQ_EXT21 (21)
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#define OR1K_IRQ_EXT22 (22)
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#define OR1K_IRQ_EXT23 (23)
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#define OR1K_IRQ_EXT24 (24)
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#define OR1K_IRQ_EXT25 (25)
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#define OR1K_IRQ_EXT26 (26)
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#define OR1K_IRQ_EXT27 (27)
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#define OR1K_IRQ_EXT28 (28)
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#define OR1K_IRQ_EXT29 (29)
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#define OR1K_IRQ_EXT30 (30)
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#define OR1K_IRQ_EXT31 (31)
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/* Internal interrupts are numbered 32-xx */
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#define OR1K_IRQ_TICK (32)
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/* IRQ Stack Frame Format:
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*
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* We're going to store [r1..r31], pc and sr
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* into a register set for context switches
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* and exception handlers.
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*
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* Note that the PC and SR can be removed once
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* context switches are done through syscall exceptions.
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*
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* We should rely on EPCR[0-15], ESR[0-15] and shadow regs.
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*
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* Indices into the xcp.regs array:
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*/
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#define REG_R1 (0)
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#define REG_R2 (1)
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#define REG_R3 (2)
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#define REG_R4 (3)
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#define REG_R5 (4)
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#define REG_R6 (5)
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#define REG_R7 (6)
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#define REG_R8 (7)
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#define REG_R9 (8)
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#define REG_R10 (9)
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#define REG_R11 (10)
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#define REG_R12 (11)
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#define REG_R13 (12)
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#define REG_R14 (13)
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#define REG_R15 (14)
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#define REG_R16 (15)
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#define REG_R17 (16)
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#define REG_R18 (17)
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#define REG_R19 (18)
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#define REG_R20 (19)
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#define REG_R21 (20)
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#define REG_R22 (21)
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#define REG_R23 (22)
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#define REG_R24 (23)
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#define REG_R25 (24)
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#define REG_R26 (25)
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#define REG_R27 (26)
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#define REG_R28 (27)
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#define REG_R29 (28)
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#define REG_R30 (29)
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#define REG_R31 (30)
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#define REG_PC (31)
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#define REG_SR (32)
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#define XCPTCONTEXT_REGS (33)
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#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS)
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* The exception context structure defines how state is stored
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* for interrupt handlers and context switches
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*
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* All general purpose registers, the re-entry point (PC), and SR
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* are stored in the regs array.
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*/
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#ifndef __ASSEMBLY__
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struct xcptcontext
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{
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/* Register save area */
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uint32_t regs[XCPTCONTEXT_REGS];
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/* These are saved copies of LR and CPSR used during
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* signal processing.
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2019-02-04 15:35:03 +01:00
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*
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* REVISIT: Because there is only one copy of these save areas,
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* only a single signal handler can be active. This precludes
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* queuing of signal actions. As a result, signals received while
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* another signal handler is executing will be ignored!
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2018-04-26 19:22:28 +02:00
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*/
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uint32_t saved_pc;
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uint32_t saved_flags;
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};
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#endif
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* Name: up_irq_save, up_irq_restore, and friends.
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*
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* NOTE: This function should never be called from application code and,
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* as a general rule unless you really know what you are doing, this
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* function should not be called directly from operating system code either:
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* Typically, the wrapper functions, enter_critical_section() and
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* leave_critical section(), are probably what you really want.
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*/
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/* Save the current interrupt enable state & disable IRQs. */
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static inline irqstate_t up_irq_save(void)
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{
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irqstate_t flags;
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irqstate_t x;
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mfspr(SPR_SYS_SR, flags);
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/* Disable IRQs */
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2021-03-30 13:21:20 +02:00
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2018-04-26 19:22:28 +02:00
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x = flags & ~(SPR_SR_IEE | SPR_SR_TEE);
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mtspr(SPR_SYS_SR, x);
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return flags;
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}
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/* Restore saved state */
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static inline void up_irq_restore(irqstate_t flags)
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{
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uint32_t x;
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mfspr(SPR_SYS_SR, x);
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x |= flags & (SPR_SR_IEE | SPR_SR_TEE);
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mtspr(SPR_SYS_SR, x);
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}
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/* Enable IRQs */
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2022-08-31 12:03:24 +02:00
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static inline void up_irq_enable(void) always_inline_function;
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2018-04-26 19:22:28 +02:00
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static inline void up_irq_enable(void)
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{
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irqstate_t flags;
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mfspr(SPR_SYS_SR, flags);
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flags |= (SPR_SR_IEE | SPR_SR_TEE);
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mtspr(SPR_SYS_SR, flags);
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}
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#endif /* __ASSEMBLY__ */
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_OR1K_INCLUDE_MOR1KX_IRQ_H */
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