2020-03-04 00:29:13 +01:00
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/****************************************************************************
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* arch/x86_64/include/irq.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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2020-04-05 23:00:04 +02:00
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/* This file should never be included directly but, rather, only indirectly
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2020-03-04 00:29:13 +01:00
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_X86_64_INCLUDE_IRQ_H
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#define __ARCH_X86_64_INCLUDE_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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/* Include NuttX-specific IRQ definitions */
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#include <nuttx/irq.h>
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/* Include chip-specific IRQ definitions (including IRQ numbers) */
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#include <arch/chip/irq.h>
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/* Include architecture-specific IRQ definitions (including register save
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* structure and up_irq_save()/up_irq_restore() macros).
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*/
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#ifdef CONFIG_ARCH_INTEL64
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2023-05-13 10:33:29 +02:00
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# include <arch/intel64/irq.h>
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2020-03-04 00:29:13 +01:00
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#endif
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/****************************************************************************
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* Public Data
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****************************************************************************/
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2022-05-17 06:16:29 +02:00
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#ifndef __ASSEMBLY__
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2024-04-22 12:52:55 +02:00
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/* CPU private data */
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struct intel64_cpu_s
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{
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int id;
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uint8_t loapic_id;
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bool ready;
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/* current_regs holds a references to the current interrupt level
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* register storage structure. If is non-NULL only during interrupt
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* processing. Access to current_regs must be through
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* up_current_regs() and up_set_current_regs() functions
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2022-05-17 06:16:29 +02:00
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*/
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2024-04-22 12:52:55 +02:00
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uint64_t *current_regs;
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};
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2022-05-17 06:16:29 +02:00
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2020-03-04 00:29:13 +01:00
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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2022-05-17 06:16:29 +02:00
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/****************************************************************************
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* Name: up_cpu_index
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*
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* Description:
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* Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
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* corresponds to the currently executing CPU.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
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* corresponds to the currently executing CPU.
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*
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****************************************************************************/
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2024-04-03 11:53:46 +02:00
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#ifdef CONFIG_SMP
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static inline_function int up_cpu_index(void)
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{
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2024-06-29 21:01:10 +02:00
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int cpu;
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2024-04-03 11:53:46 +02:00
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2024-08-20 14:23:01 +02:00
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__asm__ volatile(
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2024-06-29 21:01:10 +02:00
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"\tmovl %%gs:(%c1), %0\n"
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: "=r" (cpu)
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2024-04-03 11:53:46 +02:00
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: "i" (offsetof(struct intel64_cpu_s, id))
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:);
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return cpu;
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}
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#else
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# define up_cpu_index() (0)
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#endif
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2022-05-17 06:16:29 +02:00
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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2024-04-22 12:52:55 +02:00
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static inline_function uint64_t *up_current_regs(void)
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{
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uint64_t *regs;
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2024-08-20 14:23:01 +02:00
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__asm__ volatile("movq %%gs:(%c1), %0"
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: "=rm" (regs)
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: "i" (offsetof(struct intel64_cpu_s, current_regs)));
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2024-04-22 12:52:55 +02:00
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return regs;
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}
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static inline_function void up_set_current_regs(uint64_t *regs)
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{
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2024-08-20 14:23:01 +02:00
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__asm__ volatile("movq %0, %%gs:(%c1)"
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:: "r" (regs), "i" (offsetof(struct intel64_cpu_s,
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current_regs)));
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2024-04-22 12:52:55 +02:00
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}
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2022-05-17 06:16:29 +02:00
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/****************************************************************************
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* Name: up_interrupt_context
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*
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* Description:
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* Return true is we are currently executing in the interrupt handler
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* context.
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*
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****************************************************************************/
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2024-04-22 12:52:55 +02:00
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noinstrument_function
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static inline_function bool up_interrupt_context(void)
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{
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return up_current_regs() != NULL;
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}
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2022-05-17 06:16:29 +02:00
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2020-03-04 00:29:13 +01:00
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_X86_64_INCLUDE_IRQ_H */
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