2020-11-06 11:01:03 +01:00
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/****************************************************************************
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* drivers/analog/max1161x.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* This driver is for a whole family of I2C ADC chips:
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* +--------------+-----+----+--------+---------+
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* | Type | VCC | In | Pkg | I2C Addr|
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* +--------------+-----+----+--------+---------+
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* | MAX11612EUA+ | 5V0 | 4 | 8μMAX | 0110100 |
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* | MAX11613EUA+ | 3V3 | 4 | 8μMAX | 0110100 |
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* | MAX11613EWC+ | 3V3 | 4 | 12WLP | 0110100 |
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* | MAX11614EEE+ | 5V0 | 8 | 16QSOP | 0110011 |
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* | MAX11615EEE+ | 3V3 | 8 | 16QSOP | 0110011 |
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* | MAX11615EWE+ | 3V3 | 8 | 16WLP | 0110011 |
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* | MAX11616EEE+ | 5V0 | 12 | 16QSOP | 0110101 |
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* | MAX11617EEE+ | 3V3 | 12 | 16QSOP | 0110101 |
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* | MAX11617EWE+ | 3V3 | 12 | 16WLP | 0110101 |
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* +--------------+-----+----+--------+---------+
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdio.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <semaphore.h>
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#include <errno.h>
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#include <assert.h>
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#include <debug.h>
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#include <endian.h>
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#include <nuttx/arch.h>
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#include <nuttx/i2c/i2c_master.h>
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#include <nuttx/analog/adc.h>
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#include <nuttx/analog/ioctl.h>
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#include <nuttx/analog/max1161x.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#if defined(CONFIG_ADC_MAX1161X)
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#if defined(CONFIG_MAX1161X_4CHAN)
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#define MAX1161X_NUM_CHANNELS 4
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#define MAX1161X_CHANNELSTROBED 0x000f
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#define MAX1161X_I2C_ADDR 0x34u
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#elif defined(CONFIG_MAX1161X_8CHAN)
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#define MAX1161X_NUM_CHANNELS 8
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#define MAX1161X_CHANNELSTROBED 0x00ff
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#define MAX1161X_I2C_ADDR 0x33u
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#elif defined(CONFIG_MAX1161X_12CHAN)
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#define MAX1161X_NUM_CHANNELS 12
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#define MAX1161X_CHANNELSTROBED 0x0fff
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#define MAX1161X_I2C_ADDR 0x35u
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#else
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#error "MAX1161X Chip Type not defined"
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#endif
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#define MAX1161X_SETUP_MARKER (1 << 7)
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#define MAX1161X_SETUP_REF_SHIFT 4
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#define MAX1161X_SETUP_REF_MASK (7 << MAX1161X_SETUP_REF_SHIFT)
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#define MAX1161X_SETUP_CLK (1 << 3)
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#define MAX1161X_SETUP_UNIBIP (1 << 2)
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#define MAX1161X_SETUP_RESET (1 << 1)
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#define MAX1161X_CMD_MARKER (0 << 7)
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#define MAX1161X_CMD_SCAN_SHIFT 5
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#define MAX1161X_CMD_SCAN_MASK (3 << MAX1161X_CMD_SCAN_SHIFT)
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#define MAX1161X_CMD_CHANNEL_SHIFT 1
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#define MAX1161X_CMD_CHANNEL_MASK (15 << MAX1161X_CMD_CHANNEL_SHIFT)
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#define MAX1161X_CMD_SNGDIF (1 << 0)
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct max1161x_dev_s
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{
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FAR struct i2c_master_s *i2c;
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FAR const struct adc_callback_s *cb;
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uint8_t addr;
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/* List of channels to read on every convert trigger.
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* Bit position corresponds to channel. i.e. bit0 = 1 to read channel 0.
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*/
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uint16_t chanstrobed;
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/* Current configuration of the ADC. There are two bytes holding
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* the complete configuration - the Setup Byte has Bit 7 always set,
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2021-02-25 14:34:37 +01:00
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* while the command byte has bit 7 always reset
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2020-11-06 11:01:03 +01:00
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*/
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uint8_t setupbyte;
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uint8_t cmdbyte;
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* max1161x helpers */
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static int max1161x_readchannel(FAR struct max1161x_dev_s *priv,
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FAR struct adc_msg_s *msg);
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/* ADC methods */
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static int max1161x_bind(FAR struct adc_dev_s *dev,
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FAR const struct adc_callback_s *callback);
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static void max1161x_reset(FAR struct adc_dev_s *dev);
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static int max1161x_setup(FAR struct adc_dev_s *dev);
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static void max1161x_shutdown(FAR struct adc_dev_s *dev);
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static void max1161x_rxint(FAR struct adc_dev_s *dev, bool enable);
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static int max1161x_ioctl(FAR struct adc_dev_s *dev, int cmd,
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unsigned long arg);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static const struct adc_ops_s g_adcops =
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{
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2022-03-26 21:51:22 +01:00
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max1161x_bind, /* ao_bind */
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max1161x_reset, /* ao_reset */
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max1161x_setup, /* ao_setup */
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max1161x_shutdown, /* ao_shutdown */
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max1161x_rxint, /* ao_rxint */
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max1161x_ioctl /* ao_read */
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2020-11-06 11:01:03 +01:00
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};
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static struct max1161x_dev_s g_adcpriv;
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static struct adc_dev_s g_adcdev =
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{
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2022-03-26 21:51:22 +01:00
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&g_adcops, /* ad_ops */
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&g_adcpriv /* ad_priv */
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2020-11-06 11:01:03 +01:00
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: max1161x_manage_strobe
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*
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* Description:
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* Controls which channels are read on ANIOC_TRIGGER. By default all
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* channels are read.
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*
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* Returned Value:
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* 0 on success. Negated errno on failure.
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*
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****************************************************************************/
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static int max1161x_manage_strobe(FAR struct max1161x_dev_s *priv,
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uint8_t channel, bool add_nremove)
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{
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int ret = OK;
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if (priv == NULL || channel >= MAX1161X_NUM_CHANNELS)
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{
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ret = -EINVAL;
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}
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else
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{
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uint16_t flag = 1U << channel;
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if (add_nremove)
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{
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priv->chanstrobed |= flag;
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}
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else
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{
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priv->chanstrobed &= ~flag;
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}
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}
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return ret;
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}
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/****************************************************************************
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* Name: max1161x_readchannel
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*
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* Description:
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* Reads a conversion from the ADC.
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*
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* Input Parameters:
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* msg - msg->am_channel should be set to the channel to be read.
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* msg->am_data will store the result of the read.
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*
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* Returned Value:
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* 0 on success. Negated errno on failure.
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*
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* Assumptions/Limitations:
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* NOTE: When used in single-ended mode, msg->am_channel will be converted
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* to the corresponding channel selection bits in the command byte.
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* In differential mode, msg->am_channel is used as the channel
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* selection bits. The corresponding "channels" are as follows:
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*
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* msg->am_channel Analog Source
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* 0 +CH0, -CH1
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* 1 +CH1, -CH0
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* 2 +CH2, -CH3
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* 3 +CH3, -CH2
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* 4 +CH4, -CH5
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* 5 +CH5, -CH4
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* 6 +CH6, -CH7
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* 7 +CH7, -CH6
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*
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****************************************************************************/
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static int max1161x_readchannel(FAR struct max1161x_dev_s *priv,
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FAR struct adc_msg_s *msg)
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{
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int ret = OK;
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if (priv == NULL || msg == NULL)
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{
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ret = -EINVAL;
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}
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else
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{
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struct i2c_msg_s i2cmsg[3];
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uint8_t channel = msg->am_channel & ~(MAX1161X_CMD_CHANNEL_MASK);
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uint8_t setupbyte = priv->setupbyte;
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uint8_t cmdbyte = priv->cmdbyte & ~(MAX1161X_CMD_CHANNEL_MASK);
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cmdbyte |= channel << MAX1161X_CMD_CHANNEL_SHIFT;
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i2cmsg[0].frequency = CONFIG_MAX1161X_FREQUENCY;
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i2cmsg[0].addr = priv->addr;
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i2cmsg[0].flags = I2C_M_NOSTOP;
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i2cmsg[0].buffer = &setupbyte;
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i2cmsg[0].length = sizeof(setupbyte);
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i2cmsg[1].frequency = CONFIG_MAX1161X_FREQUENCY;
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i2cmsg[1].addr = priv->addr;
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i2cmsg[1].flags = I2C_M_NOSTOP;
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i2cmsg[1].buffer = &cmdbyte;
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i2cmsg[1].length = sizeof(cmdbyte);
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i2cmsg[2].frequency = CONFIG_MAX1161X_FREQUENCY;
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i2cmsg[2].addr = priv->addr;
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i2cmsg[2].flags = I2C_M_READ;
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uint16_t buf;
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2024-08-25 01:21:12 +02:00
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i2cmsg[2].buffer = (FAR uint8_t *)(&buf);
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2020-11-06 11:01:03 +01:00
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i2cmsg[2].length = sizeof(buf);
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ret = I2C_TRANSFER(priv->i2c, i2cmsg, 3);
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if (ret < 0)
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{
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aerr("MAX1161X I2C transfer failed: %d", ret);
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}
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msg->am_data = be16toh(buf) & 0x0fffu;
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}
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return ret;
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}
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/****************************************************************************
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* Name: max1161x_bind
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*
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* Description:
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* Bind the upper-half driver callbacks to the lower-half implementation.
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* This must be called early in order to receive ADC event notifications.
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*
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****************************************************************************/
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static int max1161x_bind(FAR struct adc_dev_s *dev,
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FAR const struct adc_callback_s *callback)
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{
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FAR struct max1161x_dev_s *priv =
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(FAR struct max1161x_dev_s *)dev->ad_priv;
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DEBUGASSERT(priv != NULL);
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priv->cb = callback;
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return OK;
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}
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/****************************************************************************
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* Name: max1161x_reset
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*
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* Description:
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* Reset the ADC device. Called early to initialize the hardware. This
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* is called, before ao_setup() and on error conditions.
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*
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****************************************************************************/
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static void max1161x_reset(FAR struct adc_dev_s *dev)
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{
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FAR struct max1161x_dev_s *priv =
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(FAR struct max1161x_dev_s *)dev->ad_priv;
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priv->setupbyte = MAX1161X_SETUP_MARKER;
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priv->cmdbyte = MAX1161X_CMD_MARKER;
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priv->chanstrobed = MAX1161X_CHANNELSTROBED;
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#ifndef MAX1161X_ENABLE_SCAN
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priv->cmdbyte &= ~(MAX1161X_CMD_SCAN_MASK);
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priv->cmdbyte |= (MAX1161X_SCAN_NONE << MAX1161X_CMD_SCAN_SHIFT);
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#endif
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}
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/****************************************************************************
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* Name: max1161x_setup
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*
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* Description:
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* Configure the ADC. This method is called the first time that the ADC
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* device is opened. The MAX1161X is quite simple and nothing special is
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* needed to be done.
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*
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****************************************************************************/
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static int max1161x_setup(FAR struct adc_dev_s *dev)
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{
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return OK;
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}
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/****************************************************************************
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* Name: max1161x_shutdown
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*
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* Description:
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* Disable the ADC. This method is called when the ADC device is closed.
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* This method should reverse the operation of the setup method, but as
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* the MAX1161X is quite simple does not need to do anything.
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*
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****************************************************************************/
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static void max1161x_shutdown(FAR struct adc_dev_s *dev)
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{
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}
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/****************************************************************************
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* Name: max1161x_rxint
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*
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* Description:
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* Needed for ADC upper-half compatibility but conversion interrupts
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* are not supported by the MAX1161X.
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*
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****************************************************************************/
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static void max1161x_rxint(FAR struct adc_dev_s *dev, bool enable)
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{
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}
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/****************************************************************************
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* Name: max1161x_ioctl
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*
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* Description:
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* All ioctl calls will be routed through this method
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*
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****************************************************************************/
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static int max1161x_ioctl(FAR struct adc_dev_s *dev, int cmd,
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unsigned long arg)
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{
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FAR struct max1161x_dev_s *priv =
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(FAR struct max1161x_dev_s *)dev->ad_priv;
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int ret = OK;
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switch (cmd)
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{
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case ANIOC_TRIGGER:
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{
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struct adc_msg_s msg;
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int i;
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for (i = 0; (i < MAX1161X_NUM_CHANNELS) && (ret == OK); i++)
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{
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if ((priv->chanstrobed >> i) & 1u)
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{
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msg.am_channel = i;
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ret = max1161x_readchannel(priv, &msg);
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if (ret == OK)
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{
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priv->cb->au_receive(&g_adcdev, i, msg.am_data);
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}
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}
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}
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}
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break;
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/* Add a channel to list of channels read on ANIOC_TRIGGER */
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case ANIOC_MAX1161X_ADD_CHAN:
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{
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ret = max1161x_manage_strobe(priv, (uint8_t)arg, true);
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}
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break;
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/* Remove a channel from list of channels read on ANIOC_TRIGGER */
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case ANIOC_MAX1161X_REMOVE_CHAN:
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{
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ret = max1161x_manage_strobe(priv, (uint8_t)arg, false);
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}
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break;
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/* Read a single channel from the ADC */
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case ANIOC_MAX1161X_READ_CHANNEL:
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{
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FAR struct adc_msg_s *msg = (FAR struct adc_msg_s *)arg;
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ret = max1161x_readchannel(priv, msg);
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}
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break;
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/* Set the ADC reference source and pin function */
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case ANIOC_MAX1161X_SET_REF:
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{
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switch (arg)
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{
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case MAX1161X_REF_VDD_AIN_NC_OFF:
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case MAX1161X_REF_EXT_RIN_IN_OFF:
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case MAX1161X_REF_INT_AIN_NC_OFF:
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case MAX1161X_REF_INT_AIN_NC_ON:
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case MAX1161X_REF_INT_ROUT_OUT_OFF:
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case MAX1161X_REF_INT_ROUT_OUT_ON:
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{
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priv->setupbyte &= ~(MAX1161X_SETUP_REF_MASK);
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priv->setupbyte |= (arg << MAX1161X_SETUP_REF_SHIFT);
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}
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break;
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default:
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{
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ret = -EINVAL;
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}
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break;
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}
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}
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break;
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/* Set clock source */
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case ANIOC_MAX1161X_SET_CLOCK:
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{
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if (arg == MAX1161X_CLOCK_EXT)
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{
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priv->setupbyte |= MAX1161X_SETUP_CLK;
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}
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else if (arg == MAX1161X_CLOCK_INT)
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{
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priv->setupbyte &= ~MAX1161X_SETUP_CLK;
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}
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else
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{
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ret = -EINVAL;
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}
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}
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break;
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/* Set the ADC Unipolar/Bipolar Mode */
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case ANIOC_MAX1161X_SET_UNIBIP:
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{
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if (arg == MAX1161X_BIPOLAR)
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{
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priv->setupbyte |= MAX1161X_SETUP_UNIBIP;
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}
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else if (arg == MAX1161X_UNIPOLAR)
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{
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priv->setupbyte &= ~MAX1161X_SETUP_UNIBIP;
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}
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else
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{
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ret = -EINVAL;
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}
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}
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break;
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/* Set the ADC Scan Mode */
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case ANIOC_MAX1161X_SET_SCAN:
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{
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#ifdef MAX1161X_ENABLE_SCAN
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switch (arg)
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{
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case MAX1161X_SCAN_FROM_ZERO :
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case MAX1161X_SCAN_EIGHT_TIMES:
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case MAX1161X_SCAN_UPPER:
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case MAX1161X_SCAN_NONE:
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{
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priv->cmdbyte &= ~(MAX1161X_CMD_SCAN_MASK);
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priv->cmdbyte |= (arg << MAX1161X_CMD_SCAN_SHIFT);
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}
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break;
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default:
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{
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ret = -EINVAL;
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}
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break;
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}
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#endif
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}
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break;
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/* Set the ADC Single Ended/Differential Mode */
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case ANIOC_MAX1161X_SET_SNGDIF:
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{
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if (arg == MAX1161X_SINGLE_ENDED)
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{
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priv->cmdbyte |= MAX1161X_CMD_SNGDIF;
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}
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else if (arg == MAX1161X_DIFFERENTIAL)
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{
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priv->cmdbyte &= ~MAX1161X_CMD_SNGDIF;
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}
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else
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{
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ret = -EINVAL;
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}
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}
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break;
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/* Command was not recognized */
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default:
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ret = -ENOTTY;
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aerr("MAX1161X ERROR: Unrecognized cmd: %d\n", cmd);
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break;
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}
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return ret;
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}
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/****************************************************************************
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* Public Functions
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|
|
****************************************************************************/
|
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/****************************************************************************
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|
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|
* Name: max1161x_initialize
|
|
|
|
*
|
|
|
|
* Description:
|
|
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|
* Initialize the selected adc
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*
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* Input Parameters:
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* i2c - Pointer to a I2C master struct for the bus the ADC resides on.
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*
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* Returned Value:
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* Valid ADC device structure reference on success; a NULL on failure
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*
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****************************************************************************/
|
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FAR struct adc_dev_s *max1161x_initialize(FAR struct i2c_master_s *i2c)
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{
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DEBUGASSERT(i2c != NULL);
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/* Driver state data */
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FAR struct max1161x_dev_s *priv;
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priv = (FAR struct max1161x_dev_s *)g_adcdev.ad_priv;
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priv->cb = NULL;
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priv->i2c = i2c;
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priv->addr = MAX1161X_I2C_ADDR;
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priv->setupbyte = MAX1161X_SETUP_MARKER;
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priv->cmdbyte = MAX1161X_CMD_MARKER;
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priv->chanstrobed = MAX1161X_CHANNELSTROBED;
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#ifndef MAX1161X_ENABLE_SCAN
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priv->cmdbyte &= ~(MAX1161X_CMD_SCAN_MASK);
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priv->cmdbyte |= (MAX1161X_SCAN_NONE << MAX1161X_CMD_SCAN_SHIFT);
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#endif
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return &g_adcdev;
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}
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#endif
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