104 lines
5.3 KiB
C
104 lines
5.3 KiB
C
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/****************************************************************************************
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* arch/arm/src/sam3u/sam3u_pdc.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAM3U_SAM3U_PDC_H
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#define __ARCH_ARM_SRC_SAM3U_SAM3U_PDC_H
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/****************************************************************************************
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* Included Files
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****************************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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#include "sam3u_memorymap.h"
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/****************************************************************************************
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* Pre-processor Definitions
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****************************************************************************************/
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/* PDC register offsets *****************************************************************/
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#define SAM3U_PDC_RPR_OFFSET 0x100 /* Receive Pointer Register */
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#define SAM3U_PDC_RCR_OFFSET 0x104 /* Receive Counter Register */
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#define SAM3U_PDC_TPR_OFFSET 0x108 /* Transmit Pointer Register */
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#define SAM3U_PDC_TCR_OFFSET 0x10c /* Transmit Counter Register */
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#define SAM3U_PDC_RNPR_OFFSET 0x110 /* Receive Next Pointer Register */
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#define SAM3U_PDC_RNCR_OFFSET 0x114 /* Receive Next Counter Register */
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#define SAM3U_PDC_TNPR_OFFSET 0x118 /* Transmit Next Pointer Register */
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#define SAM3U_PDC_TNCR_OFFSET 0x11c /* Transmit Next Counter Register */
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#define SAM3U_PDC_PTCR_OFFSET 0x120 /* Transfer Control Register */
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#define SAM3U_PDC_PTSR_OFFSET 0x124 /* Transfer Status Register */
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/* PDC register adresses ****************************************************************/
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/* These 10 registers are mapped in the peripheral memory space at the same offset. */
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/* PDC register bit definitions *********************************************************/
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#define PDC_RCR_RXCTR_SHIFT (0) /* Bits 0-15: Receive Counter Register */
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#define PDC_RCR_RXCTR_MASK (0xffff << PDC_RCR_RXCTR_SHIFT)
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#define PDC_TCR_TXCTR_SHIFT (0) /* Bits 0-15: Transmit Counter Register */
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#define PDC_TCR_TXCTR_MASK (0xffff << PDC_TCR_TXCTR_SHIFT)
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#define PDC_RNCR_RXNCTR_SHIFT (0) /* Bits 0-15: Receive Next Counter */
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#define PDC_RNCR_RXNCTR_MASK (0xffff << PDC_RNCR_RXNCTR_SHIFT)
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#define PDC_TNCR_TXNCTR_SHIFT (0) /* Bits 0-15: Transmit Counter Next */
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#define PDC_TNCR_TXNCTR_MASK (0xffff << PDC_TNCR_TXNCTR_SHIFT)
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#define PDC_PTCR_RXTEN (1 << 0) /* Bit 0: Receiver Transfer Enable */
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#define PDC_PTCR_RXTDIS (1 << 1) /* Bit 1: Receiver Transfer Disable */
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#define PDC_PTCR_TXTEN (1 << 8) /* Bit 8: Transmitter Transfer Enable */
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#define PDC_PTCR_TXTDIS (1 << 9) /* Bit 9: Transmitter Transfer Disable */
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#define PDC_PTSR_RXTEN (1 << 0) /* Bit 0: Receiver Transfer Enable */
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#define PDC_PTSR_TXTEN (1 << 8) /* Bit 8: Transmitter Transfer Enable */
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/****************************************************************************************
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* Public Types
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****************************************************************************************/
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/****************************************************************************************
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* Public Data
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****************************************************************************************/
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/****************************************************************************************
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* Public Functions
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****************************************************************************************/
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#endif /* __ARCH_ARM_SRC_SAM3U_SAM3U_PDC_H */
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