2012-05-06 01:17:25 +02:00
|
|
|
/****************************************************************************
|
2012-05-29 03:43:51 +02:00
|
|
|
* drivers/input/stmpe811_gpio.c
|
2012-05-06 01:17:25 +02:00
|
|
|
*
|
2020-09-17 18:25:34 +02:00
|
|
|
* Licensed to the Apache Software Foundation (ASF) under one or more
|
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|
|
* contributor license agreements. See the NOTICE file distributed with
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|
* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
|
2012-05-06 01:17:25 +02:00
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|
*
|
2020-09-17 18:25:34 +02:00
|
|
|
* http://www.apache.org/licenses/LICENSE-2.0
|
2012-05-06 01:17:25 +02:00
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*
|
2020-09-17 18:25:34 +02:00
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
|
2012-05-06 01:17:25 +02:00
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*
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|
****************************************************************************/
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|
2020-09-17 18:25:34 +02:00
|
|
|
/* References:
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|
|
* "STMPE811 S-Touch advanced resistive touchscreen controller with 8-bit
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|
|
* GPIO expander," Doc ID 14489 Rev 6, CD00186725, STMicroelectronics"
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|
|
*/
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|
|
|
2012-05-06 01:17:25 +02:00
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|
/****************************************************************************
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|
|
|
* Included Files
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|
****************************************************************************/
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|
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|
|
#include <nuttx/config.h>
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|
2012-05-06 03:37:47 +02:00
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|
#include <assert.h>
|
2012-05-06 01:17:25 +02:00
|
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|
#include <errno.h>
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|
|
#include <debug.h>
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|
2012-05-29 03:43:51 +02:00
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|
#include <nuttx/input/stmpe811.h>
|
2012-05-06 01:17:25 +02:00
|
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|
|
2012-05-29 03:43:51 +02:00
|
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|
#include "stmpe811.h"
|
2012-05-06 01:17:25 +02:00
|
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|
|
2012-05-29 03:43:51 +02:00
|
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|
#if defined(CONFIG_INPUT) && defined(CONFIG_INPUT_STMPE811) && !defined(CONFIG_STMPE811_GPIO_DISABLE)
|
2012-05-06 01:17:25 +02:00
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|
|
/****************************************************************************
|
|
|
|
* Private Types
|
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|
|
****************************************************************************/
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|
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|
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|
|
/****************************************************************************
|
|
|
|
* Private Data
|
|
|
|
****************************************************************************/
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|
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|
/****************************************************************************
|
|
|
|
* Private Functions
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|
|
|
****************************************************************************/
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/****************************************************************************
|
2012-05-29 03:43:51 +02:00
|
|
|
* Name: stmpe811_gpioinit
|
2012-05-06 01:17:25 +02:00
|
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|
*
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|
|
|
* Description:
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|
|
* Initialize the GPIO interrupt subsystem
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*
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* Input Parameters:
|
2012-05-29 03:43:51 +02:00
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* handle - The handle previously returned by stmpe811_instantiate
|
2012-05-06 01:17:25 +02:00
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|
*
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|
* Returned Value:
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* Zero is returned on success. Otherwise, a negated errno value is
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|
* returned to indicate the nature of the failure.
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|
|
*
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|
|
|
****************************************************************************/
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|
2012-05-29 03:43:51 +02:00
|
|
|
static void stmpe811_gpioinit(FAR struct stmpe811_dev_s *priv)
|
2012-05-06 01:17:25 +02:00
|
|
|
{
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|
|
|
uint8_t regval;
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|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
if ((priv->flags & STMPE811_FLAGS_GPIO_INITIALIZED) == 0)
|
2012-05-06 01:17:25 +02:00
|
|
|
{
|
2012-05-06 03:37:47 +02:00
|
|
|
/* Enable Clocking for GPIO */
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|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
regval = stmpe811_getreg8(priv, STMPE811_SYS_CTRL2);
|
2012-05-06 03:37:47 +02:00
|
|
|
regval &= ~SYS_CTRL2_GPIO_OFF;
|
2012-05-29 03:43:51 +02:00
|
|
|
stmpe811_putreg8(priv, STMPE811_SYS_CTRL2, regval);
|
2012-05-06 03:37:47 +02:00
|
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|
2012-05-06 01:17:25 +02:00
|
|
|
/* Disable all GPIO interrupts */
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|
2012-05-29 03:43:51 +02:00
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_EN, 0);
|
2012-05-06 01:17:25 +02:00
|
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|
/* Enable global GPIO interrupts */
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|
2012-05-29 03:43:51 +02:00
|
|
|
#ifndef CONFIG_STMPE811_GPIOINT_DISABLE
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|
|
regval = stmpe811_getreg8(priv, STMPE811_INT_EN);
|
2012-05-06 01:17:25 +02:00
|
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|
regval |= INT_GPIO;
|
2012-05-29 03:43:51 +02:00
|
|
|
stmpe811_putreg8(priv, STMPE811_INT_EN, regval);
|
2012-05-06 03:37:47 +02:00
|
|
|
#endif
|
2012-05-06 01:17:25 +02:00
|
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|
|
2012-05-29 03:43:51 +02:00
|
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|
priv->flags |= STMPE811_FLAGS_GPIO_INITIALIZED;
|
2012-05-06 01:17:25 +02:00
|
|
|
}
|
|
|
|
}
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|
|
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|
|
|
/****************************************************************************
|
|
|
|
* Public Functions
|
|
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|
****************************************************************************/
|
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|
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|
|
/****************************************************************************
|
2012-05-29 03:43:51 +02:00
|
|
|
* Name: stmpe811_gpioconfig
|
2012-05-06 01:17:25 +02:00
|
|
|
*
|
|
|
|
* Description:
|
2012-05-29 03:43:51 +02:00
|
|
|
* Configure an STMPE811 GPIO pin
|
2012-05-06 01:17:25 +02:00
|
|
|
*
|
|
|
|
* Input Parameters:
|
2012-05-29 03:43:51 +02:00
|
|
|
* handle - The handle previously returned by stmpe811_instantiate
|
2012-05-06 01:17:25 +02:00
|
|
|
* pinconfig - Bit-encoded pin configuration
|
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|
|
*
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|
|
|
* Returned Value:
|
|
|
|
* Zero is returned on success. Otherwise, a negated errno value is
|
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|
|
* returned to indicate the nature of the failure.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
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|
|
2012-05-29 03:43:51 +02:00
|
|
|
int stmpe811_gpioconfig(STMPE811_HANDLE handle, uint8_t pinconfig)
|
2012-05-06 01:17:25 +02:00
|
|
|
{
|
2012-05-29 03:43:51 +02:00
|
|
|
FAR struct stmpe811_dev_s *priv = (FAR struct stmpe811_dev_s *)handle;
|
|
|
|
int pin = (pinconfig & STMPE811_GPIO_PIN_MASK) >> STMPE811_GPIO_PIN_SHIFT;
|
2012-05-06 01:17:25 +02:00
|
|
|
uint8_t pinmask = (1 << pin);
|
|
|
|
uint8_t regval;
|
|
|
|
int ret;
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|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
DEBUGASSERT(handle && (unsigned)pin < STMPE811_GPIO_NPINS);
|
2012-05-06 01:17:25 +02:00
|
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|
|
/* Get exclusive access to the device structure */
|
|
|
|
|
2022-09-06 08:18:45 +02:00
|
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|
ret = nxmutex_lock(&priv->lock);
|
2012-05-06 01:17:25 +02:00
|
|
|
if (ret < 0)
|
|
|
|
{
|
2022-09-06 08:18:45 +02:00
|
|
|
ierr("ERROR: nxmutex_lock failed: %d\n", ret);
|
2017-10-04 23:22:27 +02:00
|
|
|
return ret;
|
2012-05-06 01:17:25 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Make sure that the pin is not already in use */
|
|
|
|
|
|
|
|
if ((priv->inuse & pinmask) != 0)
|
|
|
|
{
|
2016-06-12 17:26:00 +02:00
|
|
|
ierr("ERROR: PIN%d is already in-use\n", pin);
|
2022-09-06 08:18:45 +02:00
|
|
|
nxmutex_unlock(&priv->lock);
|
2012-05-06 01:17:25 +02:00
|
|
|
return -EBUSY;
|
|
|
|
}
|
|
|
|
|
2012-05-06 03:37:47 +02:00
|
|
|
/* Make sure that the GPIO block has been initialized */
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
stmpe811_gpioinit(priv);
|
2012-05-06 03:37:47 +02:00
|
|
|
|
|
|
|
/* Set the alternate function bit for the pin, making it a GPIO */
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
regval = stmpe811_getreg8(priv, STMPE811_GPIO_AF);
|
2012-05-06 03:37:47 +02:00
|
|
|
regval |= pinmask;
|
2012-05-29 03:43:51 +02:00
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_AF, regval);
|
2012-05-06 03:37:47 +02:00
|
|
|
|
2012-05-06 01:17:25 +02:00
|
|
|
/* Is the pin an input or an output? */
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
if ((pinconfig & STMPE811_GPIO_DIR) == STMPE811_GPIO_OUTPUT)
|
2012-05-06 01:17:25 +02:00
|
|
|
{
|
|
|
|
/* The pin is an output */
|
|
|
|
|
2017-10-31 17:54:28 +01:00
|
|
|
regval = stmpe811_getreg8(priv, STMPE811_GPIO_DIR_REG);
|
|
|
|
regval |= pinmask;
|
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_DIR_REG, regval);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
|
|
|
/* Set its initial output value */
|
2020-09-17 18:25:34 +02:00
|
|
|
|
2017-10-31 17:54:28 +01:00
|
|
|
if ((pinconfig & STMPE811_GPIO_VALUE) != STMPE811_GPIO_ZERO)
|
|
|
|
{
|
2020-02-23 09:50:23 +01:00
|
|
|
/* Set the output value(s)e by writing to the SET register */
|
2020-09-17 18:25:34 +02:00
|
|
|
|
2017-10-31 17:54:28 +01:00
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_SETPIN, (1 << pin));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* Clear the output value(s) by writing to the CLR register */
|
2020-09-17 18:25:34 +02:00
|
|
|
|
2017-10-31 17:54:28 +01:00
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_CLRPIN, (1 << pin));
|
|
|
|
}
|
2012-05-06 01:17:25 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* It is an input */
|
|
|
|
|
2017-10-31 17:54:28 +01:00
|
|
|
regval = stmpe811_getreg8(priv, STMPE811_GPIO_DIR_REG);
|
|
|
|
regval &= ~pinmask;
|
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_DIR_REG, regval);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
|
|
|
/* Set up the falling edge detection */
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
regval = stmpe811_getreg8(priv, STMPE811_GPIO_FE);
|
|
|
|
if ((pinconfig & STMPE811_GPIO_FALLING) != 0)
|
2012-05-06 01:17:25 +02:00
|
|
|
{
|
|
|
|
regval |= pinmask;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2020-09-18 03:31:00 +02:00
|
|
|
regval &= ~pinmask;
|
2012-05-06 01:17:25 +02:00
|
|
|
}
|
2020-09-17 18:25:34 +02:00
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_FE, regval);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
|
|
|
/* Set up the rising edge detection */
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
regval = stmpe811_getreg8(priv, STMPE811_GPIO_RE);
|
2020-09-18 03:31:00 +02:00
|
|
|
if ((pinconfig & STMPE811_GPIO_RISING) != 0)
|
2012-05-06 01:17:25 +02:00
|
|
|
{
|
|
|
|
regval |= pinmask;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2020-09-18 03:31:00 +02:00
|
|
|
regval &= ~pinmask;
|
2012-05-06 01:17:25 +02:00
|
|
|
}
|
2020-09-17 18:25:34 +02:00
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_RE, regval);
|
2014-04-13 22:32:20 +02:00
|
|
|
|
2012-05-06 01:17:25 +02:00
|
|
|
/* Disable interrupts for now */
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
regval = stmpe811_getreg8(priv, STMPE811_GPIO_EN);
|
2012-05-06 01:17:25 +02:00
|
|
|
regval &= ~pinmask;
|
2012-05-29 03:43:51 +02:00
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_EN, regval);
|
2012-05-06 01:17:25 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Mark the pin as 'in use' */
|
|
|
|
|
|
|
|
priv->inuse |= pinmask;
|
2022-09-06 08:18:45 +02:00
|
|
|
nxmutex_unlock(&priv->lock);
|
2012-05-06 01:17:25 +02:00
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
2012-05-29 03:43:51 +02:00
|
|
|
* Name: stmpe811_gpiowrite
|
2012-05-06 01:17:25 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Set or clear the GPIO output
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
2012-05-29 03:43:51 +02:00
|
|
|
* handle - The handle previously returned by stmpe811_instantiate
|
2012-05-06 01:17:25 +02:00
|
|
|
* pinconfig - Bit-encoded pin configuration
|
|
|
|
* value = true: write logic '1'; false: write logic '0;
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* None
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2020-09-17 18:25:34 +02:00
|
|
|
void stmpe811_gpiowrite(STMPE811_HANDLE handle, uint8_t pinconfig,
|
|
|
|
bool value)
|
2012-05-06 01:17:25 +02:00
|
|
|
{
|
2012-05-29 03:43:51 +02:00
|
|
|
FAR struct stmpe811_dev_s *priv = (FAR struct stmpe811_dev_s *)handle;
|
|
|
|
int pin = (pinconfig & STMPE811_GPIO_PIN_MASK) >> STMPE811_GPIO_PIN_SHIFT;
|
2012-05-06 01:17:25 +02:00
|
|
|
int ret;
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
DEBUGASSERT(handle && (unsigned)pin < STMPE811_GPIO_NPINS);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
|
|
|
/* Get exclusive access to the device structure */
|
|
|
|
|
2022-09-06 08:18:45 +02:00
|
|
|
ret = nxmutex_lock(&priv->lock);
|
2012-05-06 01:17:25 +02:00
|
|
|
if (ret < 0)
|
|
|
|
{
|
2022-09-06 08:18:45 +02:00
|
|
|
ierr("ERROR: nxmutex_lock failed: %d\n", ret);
|
2012-05-06 01:17:25 +02:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Are we setting or clearing outputs? */
|
|
|
|
|
|
|
|
if (value)
|
|
|
|
{
|
2020-02-23 09:50:23 +01:00
|
|
|
/* Set the output value(s)e by writing to the SET register */
|
2012-05-06 01:17:25 +02:00
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_SETPIN, (1 << pin));
|
2012-05-06 01:17:25 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* Clear the output value(s) by writing to the CLR register */
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_CLRPIN, (1 << pin));
|
2012-05-06 01:17:25 +02:00
|
|
|
}
|
|
|
|
|
2022-09-06 08:18:45 +02:00
|
|
|
nxmutex_unlock(&priv->lock);
|
2012-05-06 01:17:25 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
2012-05-29 03:43:51 +02:00
|
|
|
* Name: stmpe811_gpioread
|
2012-05-06 01:17:25 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Set or clear the GPIO output
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
2012-05-29 03:43:51 +02:00
|
|
|
* handle - The handle previously returned by stmpe811_instantiate
|
2012-05-06 01:17:25 +02:00
|
|
|
* pinconfig - Bit-encoded pin configuration
|
|
|
|
* value - The location to return the state of the GPIO pin
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero is returned on success. Otherwise, a negated errno value is
|
|
|
|
* returned to indicate the nature of the failure.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
int stmpe811_gpioread(STMPE811_HANDLE handle, uint8_t pinconfig, bool *value)
|
2012-05-06 01:17:25 +02:00
|
|
|
{
|
2012-05-29 03:43:51 +02:00
|
|
|
FAR struct stmpe811_dev_s *priv = (FAR struct stmpe811_dev_s *)handle;
|
|
|
|
int pin = (pinconfig & STMPE811_GPIO_PIN_MASK) >> STMPE811_GPIO_PIN_SHIFT;
|
2012-05-06 01:17:25 +02:00
|
|
|
uint8_t regval;
|
|
|
|
int ret;
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
DEBUGASSERT(handle && (unsigned)pin < STMPE811_GPIO_NPINS);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
|
|
|
/* Get exclusive access to the device structure */
|
|
|
|
|
2022-09-06 08:18:45 +02:00
|
|
|
ret = nxmutex_lock(&priv->lock);
|
2012-05-06 01:17:25 +02:00
|
|
|
if (ret < 0)
|
|
|
|
{
|
2022-09-06 08:18:45 +02:00
|
|
|
ierr("ERROR: nxmutex_lock failed: %d\n", ret);
|
2017-10-04 23:22:27 +02:00
|
|
|
return ret;
|
2012-05-06 01:17:25 +02:00
|
|
|
}
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
regval = stmpe811_getreg8(priv, STMPE811_GPIO_MPSTA);
|
2020-09-17 18:25:34 +02:00
|
|
|
*value = ((regval & STMPE811_GPIO_PIN(pin)) != 0);
|
2022-09-06 08:18:45 +02:00
|
|
|
nxmutex_unlock(&priv->lock);
|
2012-05-06 01:17:25 +02:00
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
2020-09-17 18:25:34 +02:00
|
|
|
/****************************************************************************
|
2012-05-29 03:43:51 +02:00
|
|
|
* Name: stmpe811_gpioattach
|
2012-05-06 01:17:25 +02:00
|
|
|
*
|
|
|
|
* Description:
|
2020-09-17 18:25:34 +02:00
|
|
|
* Attach to a GPIO interrupt input pin and enable interrupts on the pin.
|
|
|
|
* Using the value NULL for the handler address will disable interrupts
|
|
|
|
* from the pin anddetach the handler.
|
2012-05-06 01:17:25 +02:00
|
|
|
*
|
2020-09-17 18:25:34 +02:00
|
|
|
* NOTE: Callbacks do not occur from an interrupt handler but rather
|
|
|
|
* from the context of the worker thread.
|
2012-05-06 01:17:25 +02:00
|
|
|
*
|
|
|
|
* Input Parameters:
|
2012-05-29 03:43:51 +02:00
|
|
|
* handle - The handle previously returned by stmpe811_instantiate
|
2012-05-06 01:17:25 +02:00
|
|
|
* pinconfig - Bit-encoded pin configuration
|
|
|
|
* handler - The handler that will be called when the interrupt occurs.
|
|
|
|
*
|
|
|
|
* Returned Value:
|
2020-09-17 18:25:34 +02:00
|
|
|
* Zero is returned on success. Otherwise, a negated errno value is
|
|
|
|
* returned to indicate the nature of the failure.
|
2012-05-06 01:17:25 +02:00
|
|
|
*
|
2020-09-17 18:25:34 +02:00
|
|
|
****************************************************************************/
|
2012-05-06 01:17:25 +02:00
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
#ifndef CONFIG_STMPE811_GPIOINT_DISABLE
|
|
|
|
int stmpe811_gpioattach(STMPE811_HANDLE handle, uint8_t pinconfig,
|
|
|
|
stmpe811_handler_t handler)
|
2012-05-06 01:17:25 +02:00
|
|
|
{
|
2012-05-29 03:43:51 +02:00
|
|
|
FAR struct stmpe811_dev_s *priv = (FAR struct stmpe811_dev_s *)handle;
|
|
|
|
int pin = (pinconfig & STMPE811_GPIO_PIN_MASK) >> STMPE811_GPIO_PIN_SHIFT;
|
2012-05-06 01:17:25 +02:00
|
|
|
uint8_t regval;
|
|
|
|
int ret;
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
DEBUGASSERT(handle && (unsigned)pin < STMPE811_GPIO_NPINS);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
|
|
|
/* Get exclusive access to the device structure */
|
|
|
|
|
2022-09-06 08:18:45 +02:00
|
|
|
ret = nxmutex_lock(&priv->lock);
|
2012-05-06 01:17:25 +02:00
|
|
|
if (ret < 0)
|
|
|
|
{
|
2022-09-06 08:18:45 +02:00
|
|
|
ierr("ERROR: nxmutex_lock failed: %d\n", ret);
|
2017-10-04 23:22:27 +02:00
|
|
|
return ret;
|
2012-05-06 01:17:25 +02:00
|
|
|
}
|
|
|
|
|
2012-05-06 03:37:47 +02:00
|
|
|
/* Make sure that the GPIO interrupt system has been gpioinitialized */
|
2012-05-06 01:17:25 +02:00
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
stmpe811_gpioinit(priv);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
|
|
|
/* Set/clear the handler */
|
|
|
|
|
|
|
|
priv->handlers[pin] = handler;
|
|
|
|
|
|
|
|
/* If an handler has provided, then we are enabling interrupts */
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
regval = stmpe811_getreg8(priv, STMPE811_GPIO_EN);
|
2012-05-06 01:17:25 +02:00
|
|
|
if (handler)
|
|
|
|
{
|
|
|
|
/* Enable interrupts for this GPIO */
|
|
|
|
|
2020-09-17 18:25:34 +02:00
|
|
|
regval |= STMPE811_GPIO_PIN(pin);
|
2012-05-06 01:17:25 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* Disable interrupts for this GPIO */
|
|
|
|
|
2020-09-17 18:25:34 +02:00
|
|
|
regval &= ~STMPE811_GPIO_PIN(pin);
|
2012-05-06 01:17:25 +02:00
|
|
|
}
|
2014-02-11 01:08:49 +01:00
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_EN, regval);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
2022-09-06 08:18:45 +02:00
|
|
|
nxmutex_unlock(&priv->lock);
|
2012-05-06 01:17:25 +02:00
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/****************************************************************************
|
2012-05-29 03:43:51 +02:00
|
|
|
* Name: stmpe811_gpioworker
|
2012-05-06 01:17:25 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Handle GPIO interrupt events (this function actually executes in the
|
|
|
|
* context of the worker thread).
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
#ifndef CONFIG_STMPE811_GPIOINT_DISABLE
|
|
|
|
void stmpe811_gpioworker(FAR struct stmpe811_dev_s *priv)
|
2012-05-06 01:17:25 +02:00
|
|
|
{
|
|
|
|
uint8_t regval;
|
|
|
|
uint8_t pinmask;
|
|
|
|
int pin;
|
|
|
|
|
|
|
|
/* Get the set of pending GPIO interrupts */
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
regval = stmpe811_getreg8(priv, STMPE811_GPIO_INTSTA);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
|
|
|
/* Look at each pin */
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
for (pin = 0; pin < STMPE811_GPIO_NPINS; pin++)
|
2012-05-06 01:17:25 +02:00
|
|
|
{
|
|
|
|
pinmask = GPIO_INT(pin);
|
|
|
|
if ((regval & pinmask) != 0)
|
|
|
|
{
|
|
|
|
/* Check if we have a handler for this interrupt (there should
|
|
|
|
* be one)
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (priv->handlers[pin])
|
|
|
|
{
|
|
|
|
/* Interrupt is pending... dispatch the interrupt to the
|
|
|
|
* callback
|
|
|
|
*/
|
|
|
|
|
|
|
|
priv->handlers[pin](pin);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2020-09-17 18:25:34 +02:00
|
|
|
ierr("ERROR: No handler for PIN%d, GPIO_INTSTA: %02x\n",
|
|
|
|
pin, regval);
|
2012-05-06 01:17:25 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Clear the pending GPIO interrupt by writing a '1' to the
|
|
|
|
* pin position in the status register.
|
|
|
|
*/
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_INTSTA, pinmask);
|
2020-09-18 03:31:00 +02:00
|
|
|
|
|
|
|
/* Must also clear the edge detection status bit
|
|
|
|
* this is _not documented_ as being required but is used in
|
|
|
|
* the SDK and without it a second interrupt will never trigger.
|
|
|
|
* Yep you have to "clear" _both_ the edge detection status and
|
|
|
|
* GPIO interrupt status register even in level mode.
|
|
|
|
*/
|
|
|
|
|
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_ED, pinmask);
|
2012-05-06 01:17:25 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
#endif /* CONFIG_INPUT && CONFIG_INPUT_STMPE811 && !CONFIG_STMPE811_GPIO_DISABLE */
|