2018-11-17 20:23:03 +01:00
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README
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======
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This directory holds NuttX board support for the Maxim Integrated
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MAX32660-EVSYS board. That board features:
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o MAX32660 Microcontroller
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- Arm Cortex-M4F, 96MHz
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- 256KB Flash Memory
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- 96KB SRAM
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- 16KB Instruction Cache
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- Two SPIs
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- Two I2Cs
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- Two UARTs
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- 14 GPIOs
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o DIP Breakout Board
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- 100mil Pitch Dual Inline Pin Headers
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- Breadboard Compatible
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o Integrated Peripherals
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- Red Indicator LED
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- User Pushbutton
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o MAX32625PICO-Based Debug Adapter
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- CMSIS-DAP SWD Debugger
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- Virtual UART Console
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Contents
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========
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2018-11-22 22:01:18 +01:00
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o Status
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2018-11-17 20:23:03 +01:00
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o Serial Console
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o LEDs and Buttons
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2018-11-26 15:01:11 +01:00
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o OpenOCD
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2018-11-17 20:23:03 +01:00
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2018-11-22 22:01:18 +01:00
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Status
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======
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2018-11-21: The port is code complete but completely untested. I am
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still waiting to receive hardware to perform the bringup. This initial
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port will support an NSH console: Clock configuration, timer, GPIO
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pin configuration, ICC, and UART. Additional untested drivers are
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complete and ready for testing: DMA, GPIO interrupts, RTC, WDT. The
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following drivers are not implemented: I2C, SPI, I2S.
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2018-11-27 23:50:59 +01:00
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2018-11-27: I received the MAX32660-EVSYS today and made a little debug
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progress. Added a run-from-SRAM configuration to keep from locking
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up the board on bad configurations. The rest of the bring-up will
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use this SRAM configuration.
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2018-11-29 14:50:45 +01:00
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The NSH prompt comes up, but there is some interrupt-related problem
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that makes the console unusable.
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2018-11-28 18:20:31 +01:00
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2018-11-28: Found that the WFI instruction in the IDLE loop was causing
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instability. System ran OK until it was in IDLE then it became
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2018-11-29 14:50:45 +01:00
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unstable. Commenting out the WIF restores stability. The port now
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runs safely from FLASH although still with missing UART interrupts.
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2018-11-28 20:01:20 +01:00
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Also fixed the on-board LED which now currently reflects the state.
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2018-11-29 14:50:45 +01:00
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2018-11-29: Resolved the UART interrupt issue. The NSH configuration
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now appears fully functional. Removed EXPERIMENTAL from configuration.
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2018-11-29 19:12:56 +01:00
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Brought in the STM32 SPI driver as a starting point. It still does
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not build correctly. Due to conflicts, only SPI0 will be available.
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2018-11-30 22:12:38 +01:00
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2018-11-30: Completed coding of the SPI driver. Added board support
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for SPI and for and SPI-based micro-SD card. Initial testing with no
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device attached shows that the first single byte SPI transfer hangs
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with 1 byte in the Tx FIFO and nothing in the Rx FIFO. Data is not
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moving.
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2018-11-22 22:01:18 +01:00
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2018-11-17 20:23:03 +01:00
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Serial Console
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==============
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2018-11-19 17:47:28 +01:00
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UART1 Tx and Rx signals at port P0.10 and P0.11 are connected to the
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programming and debug header JH2 pins 2 and 3 through 1kΩ resistors.
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This provides a convenient way to communicate with a PC though the
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virtual serial port available in Maxim’s CMSIS-DAP debug adapter. The
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series resistors allow for these signals to be overdriven by other
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circuits without modifying the board.
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2018-11-17 20:23:03 +01:00
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LEDs and Buttons
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================
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LEDs
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----
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A single red LED is available driven by GPIO P0.13.
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This LED is not used by the board port unless CONFIG_ARCH_LEDS is
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defined. In that case, the usage by the board port is defined in
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include/board.h and src/sam_autoleds.c. The LED is used to encode
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OS-related events as follows:
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------------------- ----------------------- ------
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SYMBOL Meaning LED
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------------------- ----------------------- ------
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LED_STARTED NuttX has been started OFF
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LED_HEAPALLOCATE Heap has been allocated OFF
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LED_IRQSENABLED Interrupts enabled OFF
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LED_STACKCREATED Idle stack created ON
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LED_INIRQ In an interrupt N/C
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LED_SIGNAL In a signal handler N/C
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LED_ASSERTION An assertion failed N/C
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LED_PANIC The system has crashed FLASH
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Thus if the LED is statically on, NuttX has successfully booted and is,
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apparently, running normally. If the LED is flashing at approximately
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2Hz, then a fatal error has been detected and the system has halted.
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Buttons
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-------
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An single button is available on GPIO P0.12 for use by software.
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2018-11-26 15:01:11 +01:00
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OpenOCD
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=======
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2018-11-27 21:47:49 +01:00
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Starting OpenOCD
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----------------
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2018-11-26 15:01:11 +01:00
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An Eclipse based toolchain is available for download from Maxim Integrated.
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If you (like me) are not an IDE user then the good news is the OpenOCD for
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the MAX32660 is available within that toolchain.
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As of this writing, the OpenOCD changes for the MAX32660 are not yet
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incorporated into the mainline OpenOCD code so the Maxim Integrated version
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within the Eclipse-based toolchain is the only show in town. Patches for
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the MAX32660 have been submitted and this will most likely no longer be true
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as you read this.
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The Eclipse-based toolchain installs by default at C:\Maxim under Windows.
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The following script tracks tracks down OpenOCD in that installation
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(assuming Cygwin, hence the /cygdrive/c for the C: drive:
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#!/bin/sh
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set -x
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OPENOCD=/cygdrive/c/Maxim/Toolchain/bin/openocd.exe
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IFCFG="C:\Maxim\Toolchain\share\openocd\scripts\interface\max32660_hdk.cfg"
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MCUCFG="C:\Maxim\Toolchain\share\openocd\scripts\target\max32660.cfg"
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2018-11-27 21:47:49 +01:00
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${OPENOCD} ${1} -f ${IFCFG} # -f ${MCUCFG}
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Loading Code:
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Code can be loaded into FLASH using the convenient ARM MBED drag'n'drop
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2018-11-27 23:50:59 +01:00
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interface. Or it can be loaded into FLASH (or SRAM) using GDB as follows:
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2018-11-27 21:47:49 +01:00
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$ arm-none-eabi-gdb
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(gdb) target remote localhost:3333
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(gdb) mon reset
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(gdb) mon halt
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(gdb) load nuttx
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This does not work so reliably for me, however.
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2018-11-27 23:50:59 +01:00
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Debugging from FLASH:
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2018-11-27 21:47:49 +01:00
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$ arm-none-eabi-gdb
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(gdb) target remote localhost:3333
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(gdb) mon reset
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2018-11-28 18:20:31 +01:00
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(gdb) mon reg pc __start # Set PC to __start entry point
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2018-11-27 21:47:49 +01:00
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(gdb) file nuttx
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(gdb) b os_start
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(gdb) c
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Also not very reliable.
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2018-11-27 23:50:59 +01:00
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Debugging from SRAM:
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2018-11-28 18:20:31 +01:00
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Same except (1) that the __start entry point is 0x2000011c, not 0x11c, and
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the code needs to be reloaded into SRAM each time:
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(gdb) target remote localhost:3333
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(gdb) mon reset
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(gdb) mon halt
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(gdb) load nuttx # Re-load code into SRAM
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(gdb) mon reg pc __start # Set PC to __start entry point
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(gdb) file nuttx
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(gdb) b os_start
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(gdb) c
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2018-11-27 23:50:59 +01:00
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Recovering from bad code in FLASH:
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In my initial debug effort, I had a lethal bug that I thought had bricked
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the board. It appears that initialization logic put the MAX32660 in a bad
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state so that every time that I reset the board, I would re-enter this
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same bad state and I could not connect the CMSIS-DAP debugger.
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I was able to recover. I jumpered GND to RSTn the used the MBED MSC
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interface to copy a known safe 'SysTick' demo program. The copy hung and
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timed out with an error message. I yanked the jumper off RSTn and asked
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to re-try copy. It continued to burn the safe code demo! I fixed it!
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too much drama.
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