2011-12-14 15:47:42 +01:00
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/************************************************************************************
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* arch/arm/src/stm32/stm32f40xxx_rtc.c
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/arch.h>
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#include <nuttx/irq.h>
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#include <nuttx/rtc.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "stm32_rtc.h"
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#ifdef CONFIG_RTC
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Configuration ********************************************************************/
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/* This RTC implementation supports only date/time RTC hardware */
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#ifndef CONFIG_RTC_DATETIME
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# error "CONFIG_RTC_DATETIME must be set to use this driver"
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#endif
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#ifndef CONFIG_RTC_HIRES
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# error "CONFIG_RTC_HIRES must NOT be set with this driver"
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#endif
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2011-12-14 20:12:00 +01:00
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/* Constants ************************************************************************/
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#define SYNCHRO_TIMEOUT (0x00020000)
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#define INITMODE_TIMEOUT (0x00010000)
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#define RTC_MAGIC (0xfacefeed)
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#define RTC_PREDIV_S (0xff)
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#define RTC_PREDIV_A (0x7f)
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2011-12-14 15:47:42 +01:00
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/************************************************************************************
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* Private Types
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************************************************************************************/
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/************************************************************************************
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* Private Data
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************************************************************************************/
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/* Callback to use when the alarm expires */
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#ifdef CONFIG_RTC_ALARM
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static alarmcb_t g_alarmcb;
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#endif
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/* g_rtc_enabled is set true after the RTC has successfully initialized */
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volatile bool g_rtc_enabled = false;
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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2011-12-14 20:12:00 +01:00
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/************************************************************************************
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* Name: rtc_wprunlock
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*
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* Description:
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* Disable RTC write protection
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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static void rtc_wprunlock(void)
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{
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/* The following steps are required to unlock the write protection on all the
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* RTC registers (except for RTC_ISR[13:8], RTC_TAFCR, and RTC_BKPxR).
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*
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* 1. Write 0xCA into the RTC_WPR register.
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* 2. Write 0x53 into the RTC_WPR register.
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*
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* Writing a wrong key reactivates the write protection.
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*/
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putreg32(0xca, STM32_RTC_WPR);
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putreg32(0x53, STM32_RTC_WPR);
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}
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/************************************************************************************
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* Name: rtc_wprunlock
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*
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* Description:
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* Enable RTC write protection
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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static inline void rtc_wprlock(void)
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{
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/* Writing any wrong key reactivates the write protection. */
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putreg32(0xff, STM32_RTC_WPR);
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}
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/************************************************************************************
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* Name: rtc_synchwait
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*
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* Description:
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* Waits until the RTC Time and Date registers (RTC_TR and RTC_DR) are
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* synchronized with RTC APB clock.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno on failure
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*
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************************************************************************************/
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static int rtc_synchwait(void)
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{
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volatile uint32_t timeout;
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uint32_t regval;
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int ret;
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/* Disable the write protection for RTC registers */
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rtc_wprunlock();
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/* Clear Registers synchronization flag (RSF) */
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regval = getreg32(STM32_RTC_ISR);
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regval &= ~RTC_ISR_RSF;
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putreg32(regval, STM32_RTC_ISR);
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/* Now wait the registers to become synchronised */
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ret = -ETIMEDOUT;
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for (timeout = 0; timeout < SYNCHRO_TIMEOUT; timeout++)
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{
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regval = getreg32(STM32_RTC_ISR);
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if ((regval & RTC_ISR_RSF) != 0)
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{
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/* Synchronized */
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ret = OK;
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break;
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}
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}
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/* Re-enable the write protection for RTC registers */
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rtc_wprlock();
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return ret;
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}
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/************************************************************************************
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* Name: rtc_enterinit
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*
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* Description:
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* Enter RTC initialization mode.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno on failure
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*
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************************************************************************************/
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static int rtc_enterinit(void)
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{
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volatile uint32_t timeout;
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uint32_t regval;
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int ret;
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/* Check if the Initialization mode is already set */
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regval = getreg32(STM32_RTC_ISR);
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ret = OK;
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if ((regval & RTC_ISR_INITF) == 0)
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{
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/* Set the Initialization mode */
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putreg32(RTC_ISR_INIT, STM32_RTC_ISR);
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/* Wait until the RTC is in the INIT state (or a timeout occurs) */
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ret = -ETIMEDOUT;
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for (timeout = 0; timeout < INITMODE_TIMEOUT; timeout++)
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{
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regval = getreg32(STM32_RTC_ISR);
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if ((regval & RTC_ISR_INITF) != 0)
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{
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ret = OK;
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break;
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}
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}
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return ret;
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}
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/************************************************************************************
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* Name: rtc_exitinit
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*
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* Description:
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* Exit RTC initialization mode.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno on failure
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*
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************************************************************************************/
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static void rtc_exitinit(void)
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{
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uint32_t regval;
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regval = getreg32(STM32_RTC_ISR);
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regval &= ~(RTC_ISR_INIT);
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putreg32(regval, STM32_RTC_ISR);
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}
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/************************************************************************************
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* Name: rtc_bin2bcd
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*
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* Description:
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* Converts a 2 digit binary to BCD format
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*
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* Input Parameters:
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* value - The byte to be converted.
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*
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* Returned Value:
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* The value in BCD representation
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*
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************************************************************************************/
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static uint32_t rtc_bin2bcd(int value)
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{
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uint32_t msbcd = 0;
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while (value >= 10)
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{
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msbcd++;
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value -= 10;
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}
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return (msbcd << 4) | value;
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}
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/************************************************************************************
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* Name: rtc_bin2bcd
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*
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* Description:
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* Convert from 2 digit BCD to binary.
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*
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* Input Parameters:
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* value - The BCD value to be converted.
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*
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* Returned Value:
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* The value in binary representation
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*
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************************************************************************************/
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static int rtc_bcd2bin(uint32_t value)
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{
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uint32_t tens = (value >> 4) * 10;
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return (int)(tens + (value & 0x0f));
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}
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2011-12-14 15:47:42 +01:00
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/************************************************************************************
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2011-12-14 20:12:00 +01:00
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* Name: rtc_setup
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*
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* Description:
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* Performs first time configuration of the RTC. A special value written into
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* back-up register 0 will prevent this function from being called on sub-sequent
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* resets or power up.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno on failure
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*
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************************************************************************************/
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static int rtc_setup(void)
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{
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uint32_t regval;
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int ret;
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/* Enable the External Low-Speed (LSE) Oscillator setup the LSE as the RTC clock\
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* source, and enable the RTC.
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*/
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stm32_rcc_enablelse();
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/* Wait for the RTC Time and Date registers to be synchronized with RTC APB
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* clock.
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*/
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ret = rtc_synchwait();
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if (ret == OK)
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{
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/* Disable the write protection for RTC registers */
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rtc_wprunlock();
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/* Set Initialization mode */
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ret = rtc_enterinit()
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if (ret == OK)
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{
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/* Set the 24 hour format by clearing the FMT bit in the RTC
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* control register
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*/
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regval = getreg32(STM32_RTC_CR);
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regval &= ~RTC_CR_FMT
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putreg32(regval, STM32_RTC_CR);
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/* Configure RTC pre-scaler to the required, default values for
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* use with the 32.768 KHz LSE clock:
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*/
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putreg32(((uint32_t)0xff << RTC_PRER_PREDIV_S_SHIFT) |
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((uint32_t)0x7f << RTC_PRER_PREDIV_A_SHIFT),
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STM32_RTC_PRER);
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/* Exit RTC initialization mode */
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rtc_exitinit();
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}
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/* Re-enable the write protection for RTC registers */
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rtc_wprlock();
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}
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return ret;
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}
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/************************************************************************************
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* Name: rtc_resume
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*
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* Description:
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* Called when the RTC was already initialized on a previous power cycle. This
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* just brings the RTC back into full operation.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno on failure
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*
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************************************************************************************/
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static int rtc_resume(void)
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{
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uint32_t regval;
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int ret;
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/* Wait for the RTC Time and Date registers to be syncrhonized with RTC APB
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* clock.
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*/
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ret = rtc_synchwait();
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/* Clear the RTC alarm flags */
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#ifdef CONFIG_RTC_ALARM
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|
|
regval = getreg32(STM32_RTC_ISR);
|
|
|
|
regval &= ~(RTC_ISR_ALRAF|RTC_ISR_ALRBF);
|
|
|
|
putreg32(regval, STM32_RTC_ISR);
|
|
|
|
|
|
|
|
/* Clear the EXTI Line 17 Pending bit (Connected internally to RTC Alarm) */
|
|
|
|
|
|
|
|
putreg32((1 << 17), STM32_EXTI_PR);
|
|
|
|
#endif
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Name: rtc_interrupt
|
2011-12-14 15:47:42 +01:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* RTC interrupt service routine
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* irq - The IRQ number that generated the interrupt
|
|
|
|
* context - Architecture specific register save information.
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; A negated errno value on failure.
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
#if CONFIG_RTC_ALARM
|
2011-12-14 20:12:00 +01:00
|
|
|
static int rtc_interrupt(int irq, void *context)
|
2011-12-14 15:47:42 +01:00
|
|
|
{
|
|
|
|
#warning "Missing logic"
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Public Functions
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Name: up_rtcinitialize
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Initialize the hardware RTC per the selected configuration. This function is
|
|
|
|
* called once during the OS initialization sequence
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* None
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; a negated errno on failure
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
int up_rtcinitialize(void)
|
|
|
|
{
|
2011-12-14 20:12:00 +01:00
|
|
|
uint32_t regval;
|
|
|
|
|
|
|
|
/* Clocking for the PWR block must be provided. However, this is done
|
|
|
|
* unconditionally in stm32f40xxx_rcc.c on power up. This done unconditionally
|
|
|
|
* because the PWR block is also needed to set the internal voltage regulator for
|
|
|
|
* maximum performance.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* Enable access to the backup domain (RTC registers, RTC backup data registers
|
|
|
|
* and backup SRAM).
|
|
|
|
*/
|
|
|
|
|
|
|
|
stm32_pwr_enablebkp();
|
2011-12-14 15:47:42 +01:00
|
|
|
|
2011-12-14 20:12:00 +01:00
|
|
|
/* Check if the one-time initialization of the RTC has already been performed.
|
|
|
|
* We can determine this by checking if the magic number has been writing to
|
|
|
|
* to back-up date register DR0.
|
|
|
|
*/
|
|
|
|
|
|
|
|
regval = getreg32(STM32_RTC_BK0R);
|
|
|
|
if (regval != RTC_MAGIC)
|
|
|
|
{
|
|
|
|
/* Perform the one-time setup of the LSE clocking to the RTC */
|
|
|
|
|
|
|
|
ret = rtc_setup();
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* RTC already set-up, just resume normal operation */
|
|
|
|
|
|
|
|
ret = rtc_resume();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Configure RTC interrupt to catch alarm interrupts. All RTC interrupts are
|
|
|
|
* connected to the EXTI controller. To enable the RTC Alarm interrupt, the
|
|
|
|
* following sequence is required:
|
|
|
|
*
|
|
|
|
* 1. Configure and enable the EXTI Line 17 in interrupt mode and select the
|
|
|
|
* rising edge sensitivity.
|
|
|
|
* 2. Configure and enable the RTC_Alarm IRQ channel in the NVIC.
|
|
|
|
* 3. Configure the RTC to generate RTC alarms (Alarm A or Alarm B).
|
|
|
|
*/
|
2011-12-14 15:47:42 +01:00
|
|
|
|
|
|
|
#ifdef CONFIG_RTC_ALARM
|
2011-12-14 20:12:00 +01:00
|
|
|
# warning "Missing logic"
|
|
|
|
|
|
|
|
/* Then attach the ALARM interrupt handler */
|
|
|
|
|
|
|
|
irq_attach(STM32_IRQ_RTC, rtc_interrupt);
|
2011-12-14 15:47:42 +01:00
|
|
|
up_enable_irq(STM32_IRQ_RTC);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
g_rtc_enabled = true;
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Name: up_rtc_getdatetime
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Get the current date and time from the date/time RTC. This interface
|
|
|
|
* is only supported by the date/time RTC hardware implementation.
|
|
|
|
* It is used to replace the system timer. It is only used by the RTOS during
|
|
|
|
* intialization to set up the system time when CONFIG_RTC and CONFIG_RTC_DATETIME
|
|
|
|
* are selected (and CONFIG_RTC_HIRES is not).
|
|
|
|
*
|
|
|
|
* NOTE: Some date/time RTC hardware is capability of sub-second accuracy. That
|
|
|
|
* sub-second accuracy is lost in this interface. However, since the system time
|
|
|
|
* is reinitialized on each power-up/reset, there will be no timing inaccuracy in
|
|
|
|
* the long run.
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* tp - The location to return the high resolution time value.
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; a negated errno on failure
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
int up_rtc_getdatetime(FAR const struct tm *tp)
|
|
|
|
{
|
2011-12-14 20:12:00 +01:00
|
|
|
uint32_t dr;
|
|
|
|
uint32_t tr;
|
|
|
|
uint32_t tmp;
|
|
|
|
|
|
|
|
/* Sample the data time registers. There is a race condition here... If we sample
|
|
|
|
* the time just before midnight on December 31, the date could be wrong because
|
|
|
|
* the day rolled over while were sampling.
|
|
|
|
*/
|
|
|
|
|
|
|
|
do
|
|
|
|
{
|
|
|
|
dr = getreg32(STM32_RTC_DR);
|
|
|
|
tr = getreg32(STM32_RTC_TR);
|
|
|
|
tmp = getreg32(STM32_RTC_DR);
|
|
|
|
}
|
|
|
|
while (tmp != dr);
|
|
|
|
|
|
|
|
/* Convert the RTC time to fields in struct tm format. All of the STM32
|
|
|
|
* All of the ranges of values correspond between struct tm and the time
|
|
|
|
* register.
|
|
|
|
*/
|
|
|
|
|
|
|
|
tmp = (uint8_t)(tr & (RTC_TR_SU_MASK|RTC_TR_ST_MASK)) >> RTC_TR_SU_SHIFT;
|
|
|
|
tp->tm_sec = rtc_bcd2bin(tmp);
|
|
|
|
|
|
|
|
tmp = (tr & RTC_TR_MNU_MASK|RTC_TR_MNT_MASK) >> RTC_TR_MNU_SHIFT;
|
|
|
|
tp->tm_min = rtc_bcd2bin(tmp);
|
|
|
|
|
|
|
|
tmp = (tr & RTC_TR_HU_MASK|RTC_TR_HT_MASK) >> RTC_TR_HU_SHIFT;
|
|
|
|
tp->tm_hour = rtc_bcd2bin(tmp);
|
|
|
|
|
|
|
|
/* Now convert the RTC date to fields in struct tm format:
|
|
|
|
* Days: 1-31 match in both cases.
|
|
|
|
* Month: STM32 is 1-12, struct tm is 0-11.
|
|
|
|
* Years: STM32 is 00-99, struct tm is years since 1900.
|
|
|
|
*
|
|
|
|
* Issue: I am not sure what the STM32 years mean. Are these the
|
|
|
|
* years 2000-2099? I'll assume so.
|
|
|
|
*/
|
|
|
|
|
|
|
|
tmp = (dr & RTC_DR_DU_MASK|RTC_DR_DT_MASK) >> RTC_DR_DU_SHIFT;
|
|
|
|
tp->tm_mday = rtc_bcd2bin(tmp);
|
|
|
|
|
|
|
|
tmp = (dr & RTC_DR_MU_MASK|RTC_DR_MT) >> RTC_DR_MU_SHIFT;
|
|
|
|
tp->tm_mon = rtc_bcd2bin(tmp) - 1;
|
|
|
|
|
|
|
|
tmp = (dr & RTC_DR_YU_MASK|RTC_DR_YT_MASK) >> RTC_DR_YU_SHIFT; /* Year units, BCD 0-99 */
|
|
|
|
tp->tm_year = rtc_bcd2bin(tmp) + 100;
|
2011-12-14 15:47:42 +01:00
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Name: up_rtc_settime
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Set the RTC to the provided time. All RTC implementations must be able to
|
|
|
|
* set their time based on a standard timespec.
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* tp - the time to use
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; a negated errno on failure
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
int up_rtc_settime(FAR const struct timespec *tp)
|
|
|
|
{
|
2011-12-14 20:12:00 +01:00
|
|
|
FAR struct tm newtime;
|
|
|
|
uint32_t tr;
|
|
|
|
uint32_t dr;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* Break out the time values (not that the time is set only to units of seconds) */
|
|
|
|
|
|
|
|
(void)gmtime_r(&tp->tv_sec, &newtime);
|
2011-12-14 15:47:42 +01:00
|
|
|
|
|
|
|
/* Then write the broken out values to the RTC */
|
|
|
|
|
2011-12-14 20:12:00 +01:00
|
|
|
/* Convert the struct tm format to RTC time register fields. All of the STM32
|
|
|
|
* All of the ranges of values correspond between struct tm and the time
|
|
|
|
* register.
|
|
|
|
*/
|
|
|
|
|
|
|
|
tr = (rtc_bin2bcd(tp->tm_sec) << RTC_TR_SU_SHIFT) |
|
|
|
|
(rtc_bin2bcd(tp->tm_min) << RTC_TR_MNU_SHIFT) |
|
|
|
|
(rtc_bin2bcd(tp->tm_hour) << RTC_TR_HU_SHIFT);
|
|
|
|
tr &= ~RTC_TR_RESERVED_BITS;
|
|
|
|
|
|
|
|
/* Now convert the fields in struct tm format to the RTC date register fields:
|
|
|
|
* Days: 1-31 match in both cases.
|
|
|
|
* Month: STM32 is 1-12, struct tm is 0-11.
|
|
|
|
* Years: STM32 is 00-99, struct tm is years since 1900.
|
|
|
|
*
|
|
|
|
* Issue: I am not sure what the STM32 years mean. Are these the
|
|
|
|
* years 2000-2099? I'll assume so.
|
|
|
|
*/
|
|
|
|
|
|
|
|
dr = (rtc_bin2bcd(tp->tm_mday) << RTC_DR_DU_SHIFT) |
|
|
|
|
((rtc_bin2bcd(tp->tm_mon) + 1) << RTC_DR_MU_SHIFT) |
|
|
|
|
((rtc_bin2bcd(tp->tm_year) - 100) << RTC_DR_YU_SHIFT);
|
|
|
|
dr &= ~RTC_DR_RESERVED_BITS;
|
|
|
|
|
|
|
|
/* Disable the write protection for RTC registers */
|
|
|
|
|
|
|
|
rtc_wprunlock();
|
|
|
|
|
|
|
|
/* Set Initialization mode */
|
|
|
|
|
|
|
|
ret = rtc_enterinit()
|
|
|
|
if (ret == OK)
|
|
|
|
{
|
|
|
|
/* Set the RTC TR and DR registers */
|
|
|
|
|
|
|
|
putreg32(tr, STM32_RTC_TR);
|
|
|
|
putreg32(dr, STM32_RTC_DR);
|
|
|
|
|
|
|
|
/* Exit Initialization mode and wait for the RTC Time and Date
|
|
|
|
* registers to be synchronized with RTC APB clock.
|
|
|
|
*/
|
|
|
|
|
|
|
|
rtc_enterinit()
|
|
|
|
ret = rtc_synchwait();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Re-enable the write protection for RTC registers */
|
|
|
|
|
|
|
|
rtc_wprlock();
|
|
|
|
return ret;
|
2011-12-14 15:47:42 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Name: up_rtc_setalarm
|
|
|
|
*
|
|
|
|
* Description:
|
2011-12-14 20:12:00 +01:00
|
|
|
* Set up an alarm. Up to two alarms can be supported (ALARM A and ALARM B).
|
2011-12-14 15:47:42 +01:00
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* tp - the time to set the alarm
|
|
|
|
* callback - the function to call when the alarm expires.
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; a negated errno on failure
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
#ifdef CONFIG_RTC_ALARM
|
|
|
|
int up_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback);
|
|
|
|
{
|
|
|
|
irqstate_t flags;
|
|
|
|
int ret = -EBUSY;
|
|
|
|
|
|
|
|
/* Is there already something waiting on the ALARM? */
|
|
|
|
|
|
|
|
if (g_alarmcb == NULL)
|
|
|
|
{
|
|
|
|
/* No.. Save the callback function pointer */
|
|
|
|
|
|
|
|
g_alarmcb = callback;
|
|
|
|
|
|
|
|
/* Break out the time values */
|
|
|
|
#warning "Missing logic"
|
|
|
|
|
|
|
|
/* The set the alarm */
|
|
|
|
#warning "Missing logic"
|
|
|
|
|
|
|
|
ret = OK;
|
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#endif /* CONFIG_RTC */
|
|
|
|
|