nuttx/configs/demo9s12ne64/README.txt

README
^^^^^^

  This README discusses issues unique to NuttX configurations for the
  Freescale DEMO9S12NE64 development board.

MC9S12NE64 Features
^^^^^^^^^^^^^^^^^^^

  <20> 16-bit HCS12 core
    - HCS12 CPU
    - Upward compatible with M68HC11 instruction set
    - Interrupt stacking and programmer<65>s model identical to M68HC11
    - Instruction queue
    - Enhanced indexed addressing
    - Memory map and interface (MMC)
    - Interrupt control (INT)
    - Background debug mode (BDM)
    - Enhanced debug12 module, including breakpoints and change-of-flow
      trace buffer (DBG)
    - Multiplexed expansion bus interface (MEBI) - available only in
      112-pin package version
  <20> Wakeup interrupt inputs
    - Up to 21 port bits available for wakeup interrupt function with
      digital filtering
  <20> Memory
    - 64K bytes of FLASH EEPROM
    - 8K bytes of RAM
  <20> Analog-to-digital converter (ATD)
    - One 8-channel module with 10-bit resolution
    - External conversion trigger capability
  <20> Timer module (TIM)
    - 4-channel timer
    - Each channel configurable as either input capture or output
      compare
    - Simple PWM mode
    - Modulo reset of timer counter
    - 16-bit pulse accumulator
    - External event counting
    - Gated time accumulation
  <20> Serial interfaces
    - Two asynchronous serial communications interface (SCI)
    - One synchronous serial peripheral interface (SPI)
    - One inter-IC bus (IIC)
  <20> Ethernet Media access controller (EMAC)
    - IEEE 802.3 compliant
    - Medium-independent interface (MII)
    - Full-duplex and half-duplex modes
    - Flow control using pause frames
    - MII management function
    - Address recognition
    - Frames with broadcast address are always accepted or always
      rejected
    - Exact match for single 48-bit individual (unicast) address
    - Hash (64-bit hash) check of group (multicast) addresses
    - Promiscuous mode
  <20> Ethertype filter
  <20> Loopback mode
  <20> Two receive and one transmit Ethernet buffer interfaces
  <20> Ethernet 10/100 Mbps transceiver (EPHY)
    - IEEE 802.3 compliant
    - Digital adaptive equalization
    - Half-duplex and full-duplex
    - Auto-negotiation next page ability
    - Baseline wander (BLW) correction
    - 125-MHz clock generator and timing recovery
    - Integrated wave-shaping circuitry
    - Loopback modes
  <20> CRG (clock and reset generator module)
    - Windowed COP watchdog
    - Real-time interrupt
    - Clock monitor
    - Pierce oscillator
    - Phase-locked loop clock frequency multiplier
    - Limp home mode in absence of external clock
    - 25-MHz crystal oscillator reference clock
  <20> Operating frequency
    - 50 MHz equivalent to 25 MHz bus speed for single chip
    - 32 MHz equivalent to 16 MHz bus speed in expanded bus modes
  <20> Internal 2.5-V regulator
    - Supports an input voltage range from 3.3 V <20> 5%
    - Low-power mode capability
    - Includes low-voltage reset (LVR) circuitry
  <20> 80-pin TQFP-EP or 112-pin LQFP package
    - Up to 70 I/O pins with 3.3 V input and drive capability (112-pin
      package)
    - Up to two dedicated 3.3 V input only lines (IRQ, XIRQ)
  <20> Development support
    - Single-wire background debug<75> mode (BDM)
    - On-chip hardware breakpoints
    - Enhanced DBG debug features

Development Environment
^^^^^^^^^^^^^^^^^^^^^^^

  Either Linux or Cygwin on Windows can be used for the development
  environment. The source has been built only using the GNU toolchain
  (see below).  Other toolchains will likely cause problems.

NuttX buildroot Toolchain
^^^^^^^^^^^^^^^^^^^^^^^^^

  A GNU GCC-based toolchain is assumed.  The files */setenv.sh should
  be modified to point to the correct path to the HC12 GCC toolchain (if
  different from the default in your PATH variable).

  If you have no HC12 toolchain, one can be downloaded from the NuttX
  SourceForge download site (https://sourceforge.net/project/showfiles.php?group_id=189573).
  This GNU toolchain builds and executes in the Linux or Cygwin
  environments.

  1. You must have already configured Nuttx in <some-dir>/nuttx.

     cd tools
     ./configure.sh demo9s12nec64/<sub-dir>

  2. Download the latest buildroot package into <some-dir>

  3. unpack the buildroot tarball.  The resulting directory may
     have versioning information on it like buildroot-x.y.z.  If so,
     rename <some-dir>/buildroot-x.y.z to <some-dir>/buildroot.

  4. cd <some-dir>/buildroot

  5. cp configs/m68hc12-defconfig-3.4.6 .config

  6. make oldconfig

  7. make

  8. Edit setenv.h, if necessary, so that the PATH variable includes
     the path to the newly built binaries.

  See the file configs/README.txt in the buildroot source tree.  That has more
  detailed PLUS some special instructions that you will need to follow if you are
  building a Cortex-M3 toolchain for Cygwin under Windows.

FreeScale HCS12 Serial Monitor
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

  General:
    The NuttX HCS12 port is configured to use the Freescale HCS serial
    monitor.  This monitor supports primitive debug commands that allow
    FLASH/EEPROM programming and debugging through an RS-232 serial
    interface.  The serial monior is 2Kb in size and resides in FLASH at
    addresses 0xf800-0xffff.  The monitor does not use any RAM other than
    the stack itself.

  AN2458
    The serial monitor is described in detail in Freescale Application
    Note AN2458.pdf.

  COP:
    The serial monitor uses the COP for the cold reset function and should
    not be used by the application without some precautions (see AN2458).

  Clocking:
    The serial monitor sets the operating frequency to 24 MHz.  This is
    not altered by the NuttX start-up; doing so would interfere with the
    operation of the serial monitor.

  Memory Configuration:
    Registers:
    <20> Register space is located at 0x0000<30>0x03ff.
    FLASH:
    <20> FLASH memory is any address greater than 0x4000. All paged
      addresses are assumed to be FLASH memory.
    <20> Application code should exclude the 0xf780<38>0xff7f memory.
    SRAM:
    <20> RAM ends at 0x3FFF and builds down to the limit of the device<63>s
      available RAM.
    <20> The serial monitor's stack pointer is set to the end of RAM+1
      (0x4000).
    EEPROM:
    <20> EEPROM (if the target device has any) is limited to the available
      space between the registers and the RAM (0x0400<30>to start of RAM).
    External Devices:
    <20> External devices attached to the multiplexed external bus
      interface are not supported

  Serial Communications:
    The serial monitor uses RS-232 serial communications through SCI0 at
    115,200 baud. The monitor must have exclusive use of this interface.
    Access to the serial port is available through a monitor jump table.

  Interrrupts:
    The serial monitor redirects interrupt vectors to an unprotected
    portion of FLASH just before the protected monitor program
    (0xf780<38>0xf7fe).  The monitor will automatically redirect vector
    programming operations to these user vectors.  The user code should
    therefore keep the normal (non-monitor) vector locations
    (0xff80<38>0xfffe).

HCS12/DEMO9S12NEC64-specific Configuration Options
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

	CONFIG_ARCH - Identifies the arch/ subdirectory.  This should
	   be set to:

	   CONFIG_ARCH=hc

	CONFIG_ARCH_family - For use in C code:

	   CONFIG_ARCH_HC=y

	CONFIG_ARCH_architecture - For use in C code:

	   CONFIG_ARCH_HCS12=y

	CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory

	   CONFIG_ARCH_CHIP=mc92s12nec64

	CONFIG_ARCH_CHIP_name - For use in C code

	   CONFIG_ARCH_CHIP_MCS92S12NEC64

	CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
	   hence, the board that supports the particular chip or SoC.

	   CONFIG_ARCH_BOARD=demo9s12nec64

	CONFIG_ARCH_BOARD_name - For use in C code

	   CONFIG_ARCH_BOARD_DEMOS92S12NEC64 (for the Spectrum Digital C5471 EVM)

	CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
	   of delay loops

	CONFIG_ENDIAN_BIG - define if big endian (default is little
	   endian)

	CONFIG_DRAM_SIZE - Describes the installed RAM.

	CONFIG_DRAM_START - The start address of installed RAM

	CONFIG_DRAM_END - Should be (CONFIG_DRAM_START+CONFIG_DRAM_SIZE)

	CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
	   have LEDs

	CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
	   stack. If defined, this symbol is the size of the interrupt
	   stack in bytes.  If not defined, the user task stacks will be
	  used during interrupt handling.

	CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions

	CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
	   cause a 100 second delay during boot-up.  This 100 second delay
	   serves no purpose other than it allows you to calibratre
	   CONFIG_ARCH_LOOPSPERMSEC.  You simply use a stop watch to measure
	   the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
	   the delay actually is 100 seconds.

  HCS12 specific chip initialization

  HCS12 specific device driver settings

	CONFIG_HCS12_SERIALMON - Indicates that the target systems uses
	  the Freescale serial bootloader.

	CONFIG_SCIO_SERIAL_CONSOLE - selects the SCIO for the
	   console and ttys0 (default is the UART0).

	CONFIG_SCIO_RXBUFSIZE - Characters are buffered as received.
	   This specific the size of the receive buffer

	CONFIG_SCIO_TXBUFSIZE - Characters are buffered before
	   being sent.  This specific the size of the transmit buffer

	CONFIG_SCIO_BAUD - The configure BAUD of the UART.

	CONFIG_SCIO_BITS - The number of bits.  Must be either 7 or 8.

	CONFIG_SCIO_PARTIY - 0=no parity, 1=odd parity, 2=even parity, 3=mark 1, 4=space 0

	CONFIG_SCIO_2STOP - Two stop bits

Configurations
^^^^^^^^^^^^^^

Each Freescale HCS12 configuration is maintained in a sudirectory and
can be selected as follow:

	cd tools
	./configure.sh demo9s12nec64/<subdir>
	cd -
	. ./setenv.sh

Where <subdir> is one of the following:

ostest:
  This configuration directory, performs a simple OS test using
  examples/ostest.