2011-05-08 21:38:47 +00:00
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/****************************************************************************
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* arch/mips/include/pic32mx/irq.h
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*
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2021-03-28 16:10:05 +02:00
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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2011-05-08 21:38:47 +00:00
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*
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2021-03-28 16:10:05 +02:00
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* http://www.apache.org/licenses/LICENSE-2.0
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2011-05-08 21:38:47 +00:00
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*
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2021-03-28 16:10:05 +02:00
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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2011-05-08 21:38:47 +00:00
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*
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****************************************************************************/
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2020-04-05 17:00:04 -04:00
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/* This file should never be included directly but, rather, only indirectly
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2011-05-08 21:38:47 +00:00
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_MIPS_INCLUDE_PIC32MX_IRQ_H
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#define __ARCH_MIPS_INCLUDE_PIC32MX_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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2011-10-10 16:52:14 +00:00
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#include <arch/pic32mx/chip.h>
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2012-06-19 19:09:14 +00:00
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#if defined(CHIP_PIC32MX1) || defined(CHIP_PIC32MX2)
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# include <arch/pic32mx/irq_1xx2xx.h>
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#elif defined(CHIP_PIC32MX3) || defined(CHIP_PIC32MX4)
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2011-10-10 16:52:14 +00:00
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# include <arch/pic32mx/irq_3xx4xx.h>
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#elif defined(CHIP_PIC32MX5) || defined(CHIP_PIC32MX6) || defined(CHIP_PIC32MX7)
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# include <arch/pic32mx/irq_5xx6xx7xx.h>
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#else
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# error "Unknown PIC32MX family
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#endif
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2011-05-08 21:38:47 +00:00
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/****************************************************************************
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2011-05-10 23:20:39 +00:00
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* Pre-processor Definitions
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2011-05-08 21:38:47 +00:00
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****************************************************************************/
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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2011-11-03 01:50:57 +00:00
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/****************************************************************************
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* Name: cp0_getintctl
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*
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* Description:
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* Get the CP0 IntCtl register
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static inline uint32_t cp0_getintctl(void)
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{
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2011-11-03 01:58:55 +00:00
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register uint32_t intctl;
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2011-11-03 01:50:57 +00:00
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__asm__ __volatile__
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(
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"\t.set push\n"
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"\t.set noat\n"
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"\t mfc0 %0, $12, 1\n" /* Get CP0 IntCtl register */
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"\t.set pop\n"
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2011-11-03 01:58:55 +00:00
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: "=r" (intctl)
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2011-11-03 01:50:57 +00:00
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:
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: "memory"
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);
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2011-11-09 12:35:24 +00:00
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return intctl;
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2011-11-03 01:50:57 +00:00
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}
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/****************************************************************************
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* Name: cp0_putintctl
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*
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* Description:
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* Write the CP0 IntCtl register
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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2011-11-03 01:58:55 +00:00
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static inline void cp0_putintctl(uint32_t intctl)
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2011-11-03 01:50:57 +00:00
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{
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__asm__ __volatile__
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(
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"\t.set push\n"
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"\t.set noat\n"
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"\t.set noreorder\n"
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"\tmtc0 %0, $12, 1\n" /* Set the IntCtl to the provided value */
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"\t.set pop\n"
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2014-04-13 16:22:22 -06:00
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:
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2011-11-03 01:58:55 +00:00
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: "r" (intctl)
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2011-11-03 01:50:57 +00:00
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: "memory"
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);
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}
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/****************************************************************************
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* Name: cp0_getebase
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*
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* Description:
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* Get the CP0 EBASE register
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static inline uint32_t cp0_getebase(void)
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{
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2011-11-03 01:58:55 +00:00
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register uint32_t ebase;
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2011-11-03 01:50:57 +00:00
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__asm__ __volatile__
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(
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"\t.set push\n"
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"\t.set noat\n"
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"\t mfc0 %0, $15, 1\n" /* Get CP0 EBASE register */
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"\t.set pop\n"
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: "=r" (ebase)
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:
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: "memory"
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);
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2011-11-09 12:35:24 +00:00
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return ebase;
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2011-11-03 01:50:57 +00:00
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}
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/****************************************************************************
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* Name: cp0_putebase
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*
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* Description:
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* Write the CP0 EBASE register
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static inline void cp0_putebase(uint32_t ebase)
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{
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__asm__ __volatile__
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(
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"\t.set push\n"
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"\t.set noat\n"
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"\t.set noreorder\n"
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"\tmtc0 %0, $15, 1\n" /* Set the EBASE to the provided value */
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"\t.set pop\n"
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2014-04-13 16:22:22 -06:00
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:
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2011-11-03 01:50:57 +00:00
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: "r" (ebase)
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: "memory"
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);
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}
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2011-05-08 21:38:47 +00:00
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/****************************************************************************
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2015-10-02 17:42:29 -06:00
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* Public Data
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2011-05-08 21:38:47 +00:00
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifdef __cplusplus
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#define EXTERN extern "C"
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2015-06-12 19:26:01 -06:00
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extern "C"
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{
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2011-05-08 21:38:47 +00:00
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_MIPS_INCLUDE_PIC32MX_IRQ_H */
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