2011-05-08 23:38:47 +02:00
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configs/pic32mx README
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=====================
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2013-05-25 19:53:49 +02:00
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This README file discusses the port of NuttX to the PIC32MX board from
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PCB Logic Design Co. This board features the MicroChip PIC32MX460F512L.
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The board is a very simple -- little more than a carrier for the PIC32
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MCU plus voltage regulation, debug interface, and an OTG connector.
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2011-05-08 23:38:47 +02:00
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2011-05-12 00:47:59 +02:00
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Contents
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========
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2011-05-22 19:56:57 +02:00
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PIC32MX460F512L Pin Out
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MAX3232 Connection
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2011-05-12 00:47:59 +02:00
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Toolchains
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2011-05-22 23:10:51 +02:00
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Loading NuttX with PICkit2
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2013-05-25 19:53:49 +02:00
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LCD1602
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2011-05-17 00:20:26 +02:00
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PIC32MX Configuration Options
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Configurations
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2011-05-12 00:47:59 +02:00
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2011-05-22 19:56:57 +02:00
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PIC32MX460F512L Pin Out
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=======================
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PIC32MX460F512L 100-Pin TQFP (USB) Pin Out. The mapping to the pins on
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the PCL Logic board are very simple, each pin is brought out to a connector
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label with the PIC32MX460F512L pin number.
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On board logic only manages power, crystal, and USB signals.
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LEFT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left)
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PIN NAME
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---- ----------------------------
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1 RG15
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2 Vdd
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3 PMD5/RE5
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4 PMD6/RE6
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5 PMD7/RE7
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6 T2CK/RC1
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7 T3CK/RC2
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8 T4CK/RC3
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9 T5CK/SDI1/RC4
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10 SCK2/PMA5/CN8/RG6
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11 SDI2/PMA4/CN9/RG7
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12 SDO2/PMA3/CN10/RG8
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13 MCLR
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14 SS2/PMA2/CN11/RG9
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15 Vss
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16 Vdd
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17 TMS/RA0
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18 INT1/RE8
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19 INT2/RE9
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20 AN5/C1IN+/VBUSON/CN7/RB5
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21 AN4/C1IN-/CN6/RB4
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22 AN3/C2IN+/CN5/RB3
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23 AN2/C2IN-/CN4/RB2
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24 PGEC1/AN1/CN3/RB1
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25 PGED1/AN0/CN2/RB0
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BOTTOM SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left)
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PIN NAME
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---- ----------------------------
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26 PGEC2/AN6/OCFA/RB6
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27 PGED2/AN7/RB7
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28 VREF-/CVREF-/PMA7/RA9
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29 VREF+/CVREF+/PMA6/RA10
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30 AVdd
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31 AVss
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32 AN8/C1OUT/RB8
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33 AN9/C2OUT/RB9
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34 AN10/CVREFOUT/PMA13/RB10
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35 AN11/PMA12/RB11
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36 Vss
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37 Vdd
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38 TCK/RA1
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39 U2RTS/RF13
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40 U2CTS/RF12
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41 AN12/PMA11/RB12
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42 AN13/PMA10/RB13
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43 AN14/PMALH/PMA1/RB14
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44 AN15/OCFB/PMALL/PMA0/CN12/RB15
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45 Vss
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46 Vdd
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47 U1CTS/CN20/RD14
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48 U1RTS/CN21/RD15
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49 U2RX/PMA9/CN17/RF4
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50 U2TX/PMA8/CN18/RF5
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RIGHT SIDE, TOP-TO-BOTTOM (if pin 1 is in upper left)
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PIN NAME
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---- ----------------------------
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75 Vss
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74 SOSCO/T1CK/CN0/RC14
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73 SOSCI/CN1/RC13
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72 SDO1/OC1/INT0/RD0
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71 IC4/PMCS1/PMA14/RD11
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70 SCK1/IC3/PMCS2/PMA15/RD10
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69 SS1/IC2/RD9
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68 RTCC/IC1/RD8
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67 SDA1/INT4/RA15
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66 SCL1/INT3/RA14
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65 Vss
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64 OSC2/CLKO/RC15
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63 OSC1/CLKI/RC12
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62 Vdd
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61 TDO/RA5
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60 TDI/RA4
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59 SDA2/RA3
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58 SCL2/RA2
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57 D+/RG2
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56 D-/RG3
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55 VUSB
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54 VBUS
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53 U1TX/RF8
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52 U1RX/RF2
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51 USBID/RF3
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TOP SIDE, LEFT-TO-RIGHT (if pin 1 is in upper left)
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PIN NAME
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---- ----------------------------
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100 PMD4/RE4
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99 PMD3/RE3
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98 PMD2/RE2
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97 TRD0/RG13
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96 TRD1/RG12
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95 TRD2/RG14
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94 PMD1/RE1
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93 PMD0/RE0
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92 TRD3/RA7
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91 TRCLK/RA6
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90 PMD8/RG0
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89 PMD9/RG1
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88 PMD10/RF1
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87 PMD11/RF0
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86 ENVREG
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85 Vcap/Vddcore
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84 PMD15/CN16/RD7
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83 PMD14/CN15/RD6
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82 PMRD/CN14/RD5
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81 OC5/PMWR/CN13/RD4
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80 PMD13/CN19/RD13
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79 IC5/PMD12/RD12
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78 OC4/RD3
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77 OC3/RD2
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76 OC2/RD1
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Additional Signals available from the board:
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PROGRAM CONNECTOR: Vpp Vdd GND PGED1 PGEC1 NC PGED2 PGEC2
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POWER POINTS: +5Vin +3.3V AVdd AGND Vdd GND USB+5V
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MAX3232 Connection
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==================
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I use a tiny, MAX3232 board that I got from the eBay made by NKC
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Electronics (http://www.nkcelectronics.com/). As of this writing, it
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is also available here: http://www.nkcelectronics.com/rs232-to-ttl-3v--55v-convert232356.html
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CTS -- Not connected
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RTS -- Not connected
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TX -- Pin 53: U1TX/RF8
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RX -- Pin 52: U1RX/RF2
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GND -- POWER POINT: GND
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Vcc -- POWER POINT: Vdd (3.3V) -- Or P32_VBUS (+5V)
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2013-02-03 00:56:54 +01:00
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Or +5V from a USB PC port.
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2013-05-27 19:39:13 +02:00
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2011-05-12 00:47:59 +02:00
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Toolchains
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==========
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2012-06-22 20:35:25 +02:00
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MPLAB/C32
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---------
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I am using the free, "Lite" version of the PIC32MX toolchain available
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2011-05-12 00:47:59 +02:00
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for download from the microchip.com web site. I am using the Windows
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2012-06-22 20:35:25 +02:00
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version. The MicroChip toolchain is the only toolchain currently
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2011-05-17 00:20:26 +02:00
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supported in these configurations, but it should be a simple matter to
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adapt to other toolchains by modifying the Make.defs file include in
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each configuration.
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2012-06-22 20:35:25 +02:00
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C32 Toolchain Options:
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2015-02-22 19:14:20 +01:00
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CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW - MicroChip full toolchain for Windows
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CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL - MicroChip full toolchain for Linux
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CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE - MicroChip "Lite" toolchain for Windows
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CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_LITE - MicroChip "Lite" toolchain for Linux
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CONFIG_MIPS32_TOOLCHAIN_PINGUINOL - Pinquino toolchain for Linux
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CONFIG_MIPS32_TOOLCHAIN_PINGUINOW - Pinquino toolchain for Windows
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CONFIG_MIPS32_TOOLCHAIN_MICROCHIPOPENL - Microchip open toolchain for Linux
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CONFIG_MIPS32_TOOLCHAIN_GNU_ELF - General mips-elf toolchain for Linux
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2012-06-22 20:35:25 +02:00
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NOTE: The "Lite" versions of the toolchain does not support C++. Also
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certain optimization levels are not supported by the "Lite" toolchain.
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MicrochipOpen
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-------------
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An alternative, build-it-yourself toolchain is available here:
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http://sourceforge.net/projects/microchipopen/ . These tools were
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2012-06-22 23:28:15 +02:00
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last updated circa 2010. NOTE: C++ support still not available
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in this toolchain.
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2012-06-22 20:35:25 +02:00
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Building MicrochipOpen (on Linux)
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1) Get the build script from this location:
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2012-06-22 20:58:24 +02:00
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http://microchipopen.svn.sourceforge.net/viewvc/microchipopen/ccompiler4pic32/buildscripts/trunk/
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2012-06-22 20:35:25 +02:00
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2) Build the code using the build script, for example:
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2012-06-22 20:58:24 +02:00
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./build.sh -b v105_freeze
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This will check out the selected branch and build the tools.
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3) Binaries will then be available in a subdirectory with a name something like
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pic32-v105-freeze-20120622/install-image/bin (depending on the current data
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and the branch that you selected.
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Note that the tools will have the prefix, mypic32- so, for example, the
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compiler will be called mypic32-gcc.
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2012-06-22 20:35:25 +02:00
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2012-06-26 19:13:16 +02:00
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Pinguino mips-elf Toolchain
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2012-06-23 18:41:32 +02:00
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---------------------------
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2012-06-26 19:13:16 +02:00
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Another option is the mips-elf toolchain used with the Pinguino project. This
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2012-06-23 18:41:32 +02:00
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is a relatively current mips-elf GCC and should provide free C++ support as
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2012-06-26 19:13:16 +02:00
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well. This toolchain can be downloded from the Pinguino website:
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2012-06-23 18:41:32 +02:00
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http://wiki.pinguino.cc/index.php/Main_Page#Download . There is some general
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2012-06-26 19:13:16 +02:00
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information about using the Pinguino mips-elf toolchain in this thread:
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2014-10-30 16:39:23 +01:00
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https://groups.yahoo.com/neo/groups/nuttx/conversations/messages/1821
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2012-06-23 18:41:32 +02:00
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See also configs/mirtoo/README.txt. There is an experimental (untested)
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configuration for the Mirtoo platform in that directory.
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2012-06-22 20:35:25 +02:00
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MPLAB/C32 vs MPLABX/X32
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-----------------------
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It appears that Microchip is phasing out the MPLAB/C32 toolchain and replacing
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it with MPLABX and XC32. At present, the XC32 toolchain is *not* compatible
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with the NuttX build scripts. Here are some of the issues that I see when trying
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to build with XC32:
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1) Make.def changes: You have to change the tool prefix:
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CROSSDEV=xc32-
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2) debug.ld/release.ld: The like expect some things that are not present in
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the current linker scripts (or are expected with different names). Here
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are some partial fixes:
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Rename: kseg0_progmem to kseg0_program_mem
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Rename: kseg1_datamem to kseg1_data_mem
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2011-05-17 00:20:26 +02:00
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2012-06-22 20:35:25 +02:00
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Even then, there are more warnings from the linker and some undefined symbols
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for non-NuttX code that resides in the unused Microchip libraries. See this
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2014-10-30 16:39:23 +01:00
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email thread at https://groups.yahoo.com/neo/groups/nuttx/conversations/messages/1458 for more
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2012-06-22 20:35:25 +02:00
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information. You will have to solve at least this undefined symbol problem if
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you want to used the XC32 toolchain.
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2011-05-17 00:20:26 +02:00
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Windows Native Toolchains
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2012-06-22 20:35:25 +02:00
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-------------------------
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2013-05-27 19:39:13 +02:00
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2011-05-17 00:20:26 +02:00
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NOTE: There are several limitations to using a Windows based toolchain in a
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Cygwin environment. The three biggest are:
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1. The Windows toolchain cannot follow Cygwin paths. Path conversions are
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performed automatically in the Cygwin makefiles using the 'cygpath' utility
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but you might easily find some new path problems. If so, check out 'cygpath -w'
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2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links
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are used in Nuttx (e.g., include/arch). The make system works around these
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problems for the Windows tools by copying directories instead of linking them.
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But this can also cause some confusion for you: For example, you may edit
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2011-10-13 19:49:11 +02:00
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a file in a "linked" directory and find that your changes had no effect.
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2011-05-17 00:20:26 +02:00
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That is because you are building the copy of the file in the "fake" symbolic
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directory. If you use a Windows toolchain, you should get in the habit of
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making like this:
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make clean_context all
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An alias in your .bashrc file might make that less painful.
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2011-05-22 23:10:51 +02:00
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Loading NuttX with PICkit2
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==========================
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2011-07-03 18:31:10 +02:00
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NOTE: You need a PICKit3 if you plan to use the MPLAB debugger! The PICKit2
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2011-10-12 04:32:57 +02:00
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can, however, still be used to load programs. Instructions for the PICKit3
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2011-07-03 18:31:10 +02:00
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are similar.
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2011-05-22 23:10:51 +02:00
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Intel Hex Forma Files:
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----------------------
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When NuttX is built it will produce two files in the top-level NuttX
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directory:
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1) nuttx - This is an ELF file, and
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2012-02-27 20:50:35 +01:00
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2) nuttx.hex - This is an Intel Hex format file. This is controlled by
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2011-05-22 23:10:51 +02:00
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the setting CONFIG_INTELHEX_BINARY in the .config file.
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2012-02-27 20:50:35 +01:00
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The PICkit tool wants an Intel Hex format file to burn into FLASH. However,
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there is a problem with the generated nutt.hex: The tool expects the nuttx.hex
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file to contain physical addresses. But the nuttx.hex file generated from the
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top-level make will have address in the KSEG0 and KSEG1 regions.
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2011-05-22 23:10:51 +02:00
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2012-06-20 21:29:20 +02:00
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tools/pic32mx/mkpichex:
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----------------------
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2011-05-22 23:10:51 +02:00
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2012-06-20 21:29:20 +02:00
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There is a simple tool in the NuttX tools/pic32mx directory that can be
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used to solve both issues with the nuttx.hex file. But, first, you must
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build the tool:
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2011-05-22 23:10:51 +02:00
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2012-06-20 21:29:20 +02:00
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cd tools/pic32mx
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2011-05-22 23:10:51 +02:00
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make
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Now you will have an excecutable file call mkpichex (or mkpichex.exe on
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2012-02-27 20:50:35 +01:00
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Cygwin). This program will take the nutt.hex file as an input, it will
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2011-05-22 23:10:51 +02:00
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|
convert all of the KSEG0 and KSEG1 addresses to physical address, and
|
2012-02-27 20:50:35 +01:00
|
|
|
it will write the modified file, replacing the original nuttx.hex.
|
2011-05-22 23:10:51 +02:00
|
|
|
|
|
|
|
To use this file, you need to do the following things:
|
|
|
|
|
|
|
|
. ./setenv.sh # Source setenv.sh. Among other this, this script
|
2012-06-20 21:29:20 +02:00
|
|
|
# will add the NuttX tools/pic32mx directory to your
|
2011-05-22 23:10:51 +02:00
|
|
|
# PATH variable
|
2012-02-27 20:50:35 +01:00
|
|
|
make # Build nuttx and nuttx.hex
|
|
|
|
mkpichex $PWD # Convert addresses in nuttx.hex. $PWD is the path
|
2011-05-22 23:10:51 +02:00
|
|
|
# to the top-level build directory. It is the only
|
|
|
|
# required input to mkpichex.
|
2013-05-25 19:53:49 +02:00
|
|
|
LCD1602
|
|
|
|
=======
|
|
|
|
The LCD1602 is an HD4478OU-based LCD from Wave share. The function
|
|
|
|
up_lcd1602_initialize() initializes the LCD1602 hardware and registers the
|
|
|
|
SLCD character driver as /dev/lcd1602. See include/nuttx/lcd/hd4478ou.h
|
|
|
|
|
|
|
|
LCD pin mapping:
|
|
|
|
|
|
|
|
----------------------------------- ---------- ----------------------------------
|
|
|
|
PIC32 LCD1602 PCBLogic PIN
|
|
|
|
PIN SIGNAL NAME PIN NAME(s)
|
|
|
|
----------------------------------- ---------- ----------------------------------
|
|
|
|
1. Vss --> Powerpoint GND
|
|
|
|
2. Vdd --> Powerpoint USB+5V
|
|
|
|
3. Vee N/C To ground via 10K potentiometer
|
2013-05-26 20:42:22 +02:00
|
|
|
44 AN15/OCFB/PMALL/PMA0/CN12/RB15 4. RS 4 PMA0, Selects registers
|
2013-05-25 19:53:49 +02:00
|
|
|
82 PMRD/CN14/RD5 5. RW 82 PMRD/PMWR, Selects read or write
|
|
|
|
81 OC5/PMWR/CN13/RD4 6. E 81 PMENB, Starts data read/write
|
|
|
|
93 PMD0/RE0 7. D0 93 PMD0
|
|
|
|
94 PMD1/RE1 8. D1 94 PMD1
|
|
|
|
98 PMD2/RE2 9. D2 98 PMD2
|
|
|
|
99 PMD3/RE3 10. D3 99 PMD3
|
|
|
|
100 PMD4/RE4 11. D4 100 PMD4
|
|
|
|
3 PMD5/RE5 12. D5 3 PMD5
|
|
|
|
4 PMD6/RE6 13. D6 4 PMD6
|
|
|
|
5 PMD7/RE7 14. D7 5 PMD7
|
|
|
|
15. A N/C To Vcc (5V) via 10K potentiometer
|
|
|
|
16. K --> Powerpoint GND
|
|
|
|
----------------------------------- ---------- ----------------------------------
|
2011-05-22 23:10:51 +02:00
|
|
|
|
2011-05-17 00:20:26 +02:00
|
|
|
PIC32MX Configuration Options
|
2011-05-22 19:56:57 +02:00
|
|
|
=============================
|
2011-05-17 00:20:26 +02:00
|
|
|
|
|
|
|
General Architecture Settings:
|
|
|
|
|
|
|
|
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
|
|
|
|
be set to:
|
|
|
|
|
|
|
|
CONFIG_ARCH=mips
|
|
|
|
|
|
|
|
CONFIG_ARCH_family - For use in C code:
|
|
|
|
|
|
|
|
CONFIG_ARCH_MIPS=y
|
|
|
|
|
|
|
|
CONFIG_ARCH_architecture - For use in C code:
|
|
|
|
|
|
|
|
CONFIG_ARCH_MIPS32=y
|
|
|
|
|
|
|
|
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
|
|
|
|
|
|
|
|
CONFIG_ARCH_CHIP=pic32mx
|
|
|
|
|
|
|
|
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
|
|
|
|
chip:
|
|
|
|
|
|
|
|
CONFIG_ARCH_CHIP_PIC32MX460F512L=y
|
|
|
|
|
|
|
|
CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
|
|
|
|
hence, the board that supports the particular chip or SoC.
|
|
|
|
|
|
|
|
CONFIG_ARCH_BOARD=pcblogic-pic32mx
|
|
|
|
|
|
|
|
CONFIG_ARCH_BOARD_name - For use in C code
|
|
|
|
|
|
|
|
CONFIG_ARCH_BOARD_PCBLOGICPIC32MX=y
|
|
|
|
|
|
|
|
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
|
|
|
|
of delay loops
|
|
|
|
|
|
|
|
CONFIG_ENDIAN_BIG - define if big endian (default is little
|
|
|
|
endian)
|
|
|
|
|
2013-07-26 18:09:17 +02:00
|
|
|
CONFIG_RAM_SIZE - Describes the installed DRAM (CPU SRAM in this case):
|
2011-05-17 00:20:26 +02:00
|
|
|
|
2013-07-26 18:09:17 +02:00
|
|
|
CONFIG_RAM_SIZE=(32*1024) (32Kb)
|
2011-05-17 00:20:26 +02:00
|
|
|
|
|
|
|
There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1.
|
|
|
|
|
2013-07-26 18:09:17 +02:00
|
|
|
CONFIG_RAM_START - The start address of installed DRAM
|
2011-05-17 00:20:26 +02:00
|
|
|
|
2013-07-26 18:09:17 +02:00
|
|
|
CONFIG_RAM_START=0xa0000000
|
2011-05-17 00:20:26 +02:00
|
|
|
|
|
|
|
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
|
|
|
|
have LEDs
|
|
|
|
|
|
|
|
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
|
|
|
|
stack. If defined, this symbol is the size of the interrupt
|
|
|
|
stack in bytes. If not defined, the user task stacks will be
|
|
|
|
used during interrupt handling.
|
|
|
|
|
|
|
|
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
|
|
|
|
|
|
|
|
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
|
|
|
|
|
|
|
|
CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
|
|
|
|
cause a 100 second delay during boot-up. This 100 second delay
|
|
|
|
serves no purpose other than it allows you to calibratre
|
|
|
|
CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure
|
|
|
|
the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
|
|
|
|
the delay actually is 100 seconds.
|
|
|
|
|
2011-05-19 20:29:40 +02:00
|
|
|
PIC32MX Configuration
|
|
|
|
|
|
|
|
CONFIG_PIC32MX_MVEC - Select muli- vs. single-vectored interrupts
|
|
|
|
|
2011-05-17 00:20:26 +02:00
|
|
|
Individual subsystems can be enabled:
|
|
|
|
|
2011-05-21 16:41:53 +02:00
|
|
|
CONFIG_PIC32MX_WDT - Watchdog timer
|
|
|
|
CONFIG_PIC32MX_T2 - Timer 2 (Timer 1 is the system time and always enabled)
|
|
|
|
CONFIG_PIC32MX_T3 - Timer 3
|
|
|
|
CONFIG_PIC32MX_T4 - Timer 4
|
|
|
|
CONFIG_PIC32MX_T5 - Timer 5
|
|
|
|
CONFIG_PIC32MX_IC1 - Input Capture 1
|
|
|
|
CONFIG_PIC32MX_IC2 - Input Capture 2
|
|
|
|
CONFIG_PIC32MX_IC3 - Input Capture 3
|
|
|
|
CONFIG_PIC32MX_IC4 - Input Capture 4
|
|
|
|
CONFIG_PIC32MX_IC5 - Input Capture 5
|
|
|
|
CONFIG_PIC32MX_OC1 - Output Compare 1
|
|
|
|
CONFIG_PIC32MX_OC2 - Output Compare 2
|
|
|
|
CONFIG_PIC32MX_OC3 - Output Compare 3
|
|
|
|
CONFIG_PIC32MX_OC4 - Output Compare 4
|
|
|
|
CONFIG_PIC32MX_OC5 - Output Compare 5
|
|
|
|
CONFIG_PIC32MX_I2C1 - I2C 1
|
|
|
|
CONFIG_PIC32MX_I2C2 - I2C 2
|
|
|
|
CONFIG_PIC32MX_SPI1 - SPI 1
|
|
|
|
CONFIG_PIC32MX_SPI2 - SPI 2
|
|
|
|
CONFIG_PIC32MX_UART1 - UART 1
|
|
|
|
CONFIG_PIC32MX_UART2 - UART 2
|
|
|
|
CONFIG_PIC32MX_ADC - ADC 1
|
|
|
|
CONFIG_PIC32MX_PMP - Parallel Master Port
|
|
|
|
CONFIG_PIC32MX_CM1 - Comparator 1
|
|
|
|
CONFIG_PIC32MX_CM2 - Comparator 2
|
|
|
|
CONFIG_PIC32MX_RTCC - Real-Time Clock and Calendar
|
|
|
|
CONFIG_PIC32MX_DMA - DMA
|
|
|
|
CONFIG_PIC32MX_FLASH - FLASH
|
2011-07-03 18:31:10 +02:00
|
|
|
CONFIG_PIC32MX_USBDEV - USB device
|
|
|
|
CONFIG_PIC32MX_USBHOST - USB host
|
2011-05-17 00:20:26 +02:00
|
|
|
|
2011-06-10 23:03:38 +02:00
|
|
|
PIC32MX Configuration Settings
|
|
|
|
DEVCFG0:
|
|
|
|
CONFIG_PIC32MX_DEBUGGER - Background Debugger Enable. Default 3 (disabled). The
|
|
|
|
value 2 enables.
|
|
|
|
CONFIG_PIC32MX_ICESEL - In-Circuit Emulator/Debugger Communication Channel Select
|
|
|
|
Default 1 (PG2)
|
|
|
|
CONFIG_PIC32MX_PROGFLASHWP - Program FLASH write protect. Default 0xff (disabled)
|
|
|
|
CONFIG_PIC32MX_BOOTFLASHWP - Default 1 (disabled)
|
|
|
|
CONFIG_PIC32MX_CODEWP - Default 1 (disabled)
|
|
|
|
DEVCFG1: (All settings determined by selections in board.h)
|
|
|
|
DEVCFG2: (All settings determined by selections in board.h)
|
2013-05-27 19:39:13 +02:00
|
|
|
DEVCFG3:
|
2011-06-10 23:03:38 +02:00
|
|
|
CONFIG_PIC32MX_USBIDO - USB USBID Selection. Default 1 if USB enabled
|
|
|
|
(USBID pin is controlled by the USB module), but 0 (GPIO) otherwise.
|
|
|
|
CONFIG_PIC32MX_VBUSIO - USB VBUSON Selection (Default 1 if USB enabled
|
|
|
|
(VBUSON pin is controlled by the USB module, but 0 (GPIO) otherwise.
|
|
|
|
CONFIG_PIC32MX_WDENABLE - Enabled watchdog on power up. Default 0 (watchdog
|
|
|
|
can be enabled later by software).
|
|
|
|
|
2011-05-19 20:29:40 +02:00
|
|
|
The priority of interrupts may be specified. The value ranage of
|
|
|
|
priority is 4-31. The default (16) will be used if these any of these
|
|
|
|
are undefined.
|
|
|
|
|
2011-05-21 16:41:53 +02:00
|
|
|
CONFIG_PIC32MX_CTPRIO - Core Timer Interrupt
|
|
|
|
CONFIG_PIC32MX_CS0PRIO - Core Software Interrupt 0
|
|
|
|
CONFIG_PIC32MX_CS1PRIO - Core Software Interrupt 1
|
|
|
|
CONFIG_PIC32MX_INT0PRIO - External Interrupt 0
|
|
|
|
CONFIG_PIC32MX_INT1PRIO - External Interrupt 1
|
|
|
|
CONFIG_PIC32MX_INT2PRIO - External Interrupt 2
|
|
|
|
CONFIG_PIC32MX_INT3PRIO - External Interrupt 3
|
|
|
|
CONFIG_PIC32MX_INT4PRIO - External Interrupt 4
|
|
|
|
CONFIG_PIC32MX_FSCMPRIO - Fail-Safe Clock Monitor
|
|
|
|
CONFIG_PIC32MX_T1PRIO - Timer 1 (System timer) priority
|
|
|
|
CONFIG_PIC32MX_T2PRIO - Timer 2 priority
|
|
|
|
CONFIG_PIC32MX_T3PRIO - Timer 3 priority
|
|
|
|
CONFIG_PIC32MX_T4PRIO - Timer 4 priority
|
|
|
|
CONFIG_PIC32MX_T5PRIO - Timer 5 priority
|
|
|
|
CONFIG_PIC32MX_IC1PRIO - Input Capture 1
|
|
|
|
CONFIG_PIC32MX_IC2PRIO - Input Capture 2
|
|
|
|
CONFIG_PIC32MX_IC3PRIO - Input Capture 3
|
|
|
|
CONFIG_PIC32MX_IC4PRIO - Input Capture 4
|
|
|
|
CONFIG_PIC32MX_IC5PRIO - Input Capture 5
|
|
|
|
CONFIG_PIC32MX_OC1PRIO - Output Compare 1
|
|
|
|
CONFIG_PIC32MX_OC2PRIO - Output Compare 2
|
|
|
|
CONFIG_PIC32MX_OC3PRIO - Output Compare 3
|
|
|
|
CONFIG_PIC32MX_OC4PRIO - Output Compare 4
|
|
|
|
CONFIG_PIC32MX_OC5PRIO - Output Compare 5
|
|
|
|
CONFIG_PIC32MX_I2C1PRIO - I2C 1
|
|
|
|
CONFIG_PIC32MX_I2C2PRIO - I2C 2
|
|
|
|
CONFIG_PIC32MX_SPI1PRIO - SPI 1
|
|
|
|
CONFIG_PIC32MX_SPI2PRIO - SPI 2
|
|
|
|
CONFIG_PIC32MX_UART1PRIO - UART 1
|
|
|
|
CONFIG_PIC32MX_UART2PRIO - UART 2
|
|
|
|
CONFIG_PIC32MX_CN - Input Change Interrupt
|
|
|
|
CONFIG_PIC32MX_ADCPRIO - ADC1 Convert Done
|
|
|
|
CONFIG_PIC32MX_PMPPRIO - Parallel Master Port
|
|
|
|
CONFIG_PIC32MX_CM1PRIO - Comparator 1
|
|
|
|
CONFIG_PIC32MX_CM2PRIO - Comparator 2
|
|
|
|
CONFIG_PIC32MX_FSCMPRIO - Fail-Safe Clock Monitor
|
|
|
|
CONFIG_PIC32MX_RTCCPRIO - Real-Time Clock and Calendar
|
|
|
|
CONFIG_PIC32MX_DMA0PRIO - DMA Channel 0
|
|
|
|
CONFIG_PIC32MX_DMA1PRIO - DMA Channel 1
|
|
|
|
CONFIG_PIC32MX_DMA2PRIO - DMA Channel 2
|
|
|
|
CONFIG_PIC32MX_DMA3PRIO - DMA Channel 3
|
|
|
|
CONFIG_PIC32MX_FCEPRIO - Flash Control Event
|
|
|
|
CONFIG_PIC32MX_USBPRIO - USB
|
2011-05-19 20:29:40 +02:00
|
|
|
|
2011-05-17 00:20:26 +02:00
|
|
|
PIC32MXx specific device driver settings
|
|
|
|
|
|
|
|
CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the
|
|
|
|
console and ttys0 (default is the UART0).
|
|
|
|
CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received.
|
|
|
|
This specific the size of the receive buffer
|
|
|
|
CONFIG_UARTn_TXBUFSIZE - Characters are buffered before
|
|
|
|
being sent. This specific the size of the transmit buffer
|
|
|
|
CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be
|
|
|
|
CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8.
|
|
|
|
CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
|
|
|
|
CONFIG_UARTn_2STOP - Two stop bits
|
|
|
|
|
|
|
|
PIC32MXx USB Device Configuration
|
|
|
|
|
|
|
|
PIC32MXx USB Host Configuration (the PIC32MX does not support USB Host)
|
|
|
|
|
|
|
|
Configurations
|
2011-05-22 19:56:57 +02:00
|
|
|
==============
|
2011-05-17 00:20:26 +02:00
|
|
|
|
2013-05-25 19:53:49 +02:00
|
|
|
Each PIC32MX configuration is maintained in a sub-directory and can be
|
|
|
|
selected as follow:
|
2011-05-17 00:20:26 +02:00
|
|
|
|
|
|
|
cd tools
|
|
|
|
./configure.sh pcblogic-pic32mx/<subdir>
|
|
|
|
cd -
|
|
|
|
. ./setenv.sh
|
|
|
|
|
2013-05-25 19:53:49 +02:00
|
|
|
Where <subdir> is one of the following sub-directories.
|
|
|
|
|
|
|
|
NOTE: These configurations use the mconf-based configuration tool. To
|
|
|
|
change any of these configurations using that tool, you should:
|
|
|
|
|
|
|
|
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
|
2015-06-28 16:08:57 +02:00
|
|
|
see additional README.txt files in the NuttX tools repository.
|
2013-05-25 19:53:49 +02:00
|
|
|
|
|
|
|
b. Execute 'make menuconfig' in nuttx/ in order to start the
|
|
|
|
reconfiguration process.
|
|
|
|
|
|
|
|
Configuration sub-directories
|
|
|
|
-----------------------------
|
2011-05-17 00:20:26 +02:00
|
|
|
|
2012-06-23 18:41:32 +02:00
|
|
|
nsh:
|
|
|
|
This configuration directory holds configuration files tht can
|
|
|
|
be used to support the NuttShell (NSH).
|
2013-05-25 19:53:49 +02:00
|
|
|
|
|
|
|
NOTES:
|
|
|
|
|
|
|
|
1. The serial console is on UART1. Therefore, you will need an external
|
|
|
|
RS232 driver or TTL serial-to-USB converter. The UART1 TX and RX
|
|
|
|
pins are available on:
|
|
|
|
|
|
|
|
TX -- Pin 53: U1TX/RF8
|
|
|
|
RX -- Pin 52: U1RX/RF2
|
|
|
|
|
|
|
|
Power for the converter is available from the power point connector:
|
|
|
|
|
|
|
|
GND -- POWER POINT: GND
|
|
|
|
Vcc -- POWER POINT: Vdd (3.3V) -- Or P32_VBUS (+5V)
|
|
|
|
Or +5V from a USB PC port.
|
|
|
|
|
|
|
|
The serial console is configured for 115200 8N1 by default.
|
|
|
|
|
|
|
|
2. Support for NSH built-in applications is enabled.
|
|
|
|
|
|
|
|
3. By default, this configuration uses an older Microchip C32 toolchain
|
|
|
|
for Windows (the newer ones seem to be incompatible) and builds under
|
2013-05-27 00:44:53 +02:00
|
|
|
Cygwin (or probably MSYS). That can easily be reconfigured, of course.
|
2013-05-25 19:53:49 +02:00
|
|
|
|
|
|
|
Build Setup:
|
|
|
|
CONFIG_HOST_WINDOWS=y : Builds under Windows
|
|
|
|
CONFIG_WINDOWS_CYGWIN=y : Using Cygwin
|
|
|
|
|
|
|
|
System Type:
|
|
|
|
CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE=y : Older C32 toolchain
|
|
|
|
|
|
|
|
4. To enable LCD1602 support:
|
|
|
|
|
|
|
|
Device Drivers:
|
|
|
|
CONFIG_LCD=y : Enable LCD menus
|
|
|
|
CONFIG_LCD_LCD1602=y : Select LCD1602
|
|
|
|
|
|
|
|
Library Routines:
|
|
|
|
CONFIG_LIB_SLCDCODEC=y : Enable the SLCD CODEC
|
|
|
|
|
|
|
|
System Type -> PIC32MX Peripheral Support:
|
|
|
|
CONFIG_PIC32MX_PMP=y : Enable PMP support
|
|
|
|
|
|
|
|
To enable apps/examples/slcd to test the LCD:
|
|
|
|
|
|
|
|
Application Configuration:
|
|
|
|
CONFIG_NSH_ARCHINIT=y : Needed to initialize the SLCD
|
|
|
|
CONFIG_EXAMPLES_SLCD=y : Enable apps/examples/slcd use /dev/lcd1602
|
|
|
|
CONFIG_EXAMPLES_SLCD_DEVNAME="/dev/lcd1602"
|
|
|
|
|
|
|
|
To enable LCD debug output:
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Build Setup:
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2016-06-11 22:14:08 +02:00
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CONFIG_DEBUG_FEATURES=y : Enable debug features
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CONFIG_DEBUG_INFO=y : Enable LCD debug
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2013-05-25 19:53:49 +02:00
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2013-05-26 20:42:22 +02:00
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NOTES:
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a. I do not have the LCD1602 working. I may just be getting lost in the
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tangle of wires or perhaps there is something fundamentally wrong with
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2013-05-27 19:39:13 +02:00
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the code. If you decide to work on this, you might want to consider
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the working, big-bang version of this driver at configs/sure-pic32mx/src/pic32mx_lcd1602.c.
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A bit-bang driver is probably more appropriate for such a low performance
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device (and a LOT easier to debug).
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2013-05-26 20:42:22 +02:00
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b. At this point in time, testing of the SLCD is very limited because
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there is not much in apps/examples/slcd. Basically driver with a working
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test setup and ready to be tested and debugged.
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