nuttx/drivers/serial/Kconfig-pl011

#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#

if UART_PL011

config UART0_PL011
	bool "UART0 PL011"
	select UART0_SERIALDRIVER
	default n

if UART0_PL011

config UART0_BASE
	hex "UART0 base address"

config UART0_IRQ
	int "PL011 UART0 IRQ number"

config UART0_CLK_FREQ
	int "PL011 UART0 clock frequency"
	default 24000000

endif # UART0_PL011

config UART1_PL011
	bool "UART1 PL011"
	select UART1_SERIALDRIVER
	default n

if UART1_PL011

config UART1_BASE
	hex "UART1 base address"

config UART1_IRQ
	int "PL011 UART1 IRQ number"

config UART1_CLK_FREQ
	int "PL011 UART1 clock frequency"
	default 24000000

endif # UART1_PL011

config UART2_PL011
	bool "UART2 PL011"
	select UART2_SERIALDRIVER
	default n

if UART2_PL011

config UART2_BASE
	hex "UART2 base address"

config UART2_IRQ
	int "PL011 UART2 IRQ number"

config UART2_CLK_FREQ
	int "PL011 UART2 clock frequency"
	default 24000000

endif # UART2_PL011

config UART3_PL011
	bool "UART3 PL011"
	select UART3_SERIALDRIVER
	default n

if UART3_PL011

config UART3_BASE
	hex "UART3 base address"

config UART3_IRQ
	int "PL011 UART3 IRQ number"

config UART3_CLK_FREQ
	int "PL011 UART3 clock frequency"
	default 24000000

endif # UART3_PL011

config UART_PL011_PLATFORMIF
	bool "PL011 platform interface"
	default n

endif # UART_PL011
arch/arm64: merge serial_pl011.c and qemu_serial.c At present, the serial drivers qemu_serial.c and serial_pl011.c on the fvp-v8r and qemu platforms in arm64 are duplicated and need to be merged. The plan is to place them under the drivers\serial directory to create a common code module, so that both fvp-v8r and qemu can use the same code. In the future, if new platforms use pl011 serial ports, they can also be directly reused Signed-off-by: hujun5 <hujun5@xiaomi.com> 2023-03-08 12:53:36 +01:00			`#`
			`# For a description of the syntax of this configuration file,`
			`# see the file kconfig-language.txt in the NuttX tools repository.`
			`#`

			`if UART_PL011`

			`config UART0_PL011`
			`bool "UART0 PL011"`
			`select UART0_SERIALDRIVER`
			`default n`

drivers/serial/pl011: add support of uart0/2/3 port Signed-off-by: chao an <anchao@lixiang.com> 2024-01-11 07:15:45 +01:00			`if UART0_PL011`

			`config UART0_BASE`
			`hex "UART0 base address"`

			`config UART0_IRQ`
			`int "PL011 UART0 IRQ number"`

serial/pl011: configurable clock frequency move clock frequency into Kconfig Signed-off-by: chao an <anchao@lixiang.com> 2024-04-30 03:31:56 +02:00			`config UART0_CLK_FREQ`
			`int "PL011 UART0 clock frequency"`
			`default 24000000`

drivers/serial/pl011: add support of uart0/2/3 port Signed-off-by: chao an <anchao@lixiang.com> 2024-01-11 07:15:45 +01:00			`endif # UART0_PL011`

arch/arm64: merge serial_pl011.c and qemu_serial.c At present, the serial drivers qemu_serial.c and serial_pl011.c on the fvp-v8r and qemu platforms in arm64 are duplicated and need to be merged. The plan is to place them under the drivers\serial directory to create a common code module, so that both fvp-v8r and qemu can use the same code. In the future, if new platforms use pl011 serial ports, they can also be directly reused Signed-off-by: hujun5 <hujun5@xiaomi.com> 2023-03-08 12:53:36 +01:00			`config UART1_PL011`
			`bool "UART1 PL011"`
			`select UART1_SERIALDRIVER`
			`default n`

drivers/serial/pl011: add support of uart0/2/3 port Signed-off-by: chao an <anchao@lixiang.com> 2024-01-11 07:15:45 +01:00			`if UART1_PL011`

			`config UART1_BASE`
			`hex "UART1 base address"`

			`config UART1_IRQ`
			`int "PL011 UART1 IRQ number"`

serial/pl011: configurable clock frequency move clock frequency into Kconfig Signed-off-by: chao an <anchao@lixiang.com> 2024-04-30 03:31:56 +02:00			`config UART1_CLK_FREQ`
			`int "PL011 UART1 clock frequency"`
			`default 24000000`

drivers/serial/pl011: add support of uart0/2/3 port Signed-off-by: chao an <anchao@lixiang.com> 2024-01-11 07:15:45 +01:00			`endif # UART1_PL011`

arch/arm64: merge serial_pl011.c and qemu_serial.c At present, the serial drivers qemu_serial.c and serial_pl011.c on the fvp-v8r and qemu platforms in arm64 are duplicated and need to be merged. The plan is to place them under the drivers\serial directory to create a common code module, so that both fvp-v8r and qemu can use the same code. In the future, if new platforms use pl011 serial ports, they can also be directly reused Signed-off-by: hujun5 <hujun5@xiaomi.com> 2023-03-08 12:53:36 +01:00			`config UART2_PL011`
			`bool "UART2 PL011"`
			`select UART2_SERIALDRIVER`
			`default n`

drivers/serial/pl011: add support of uart0/2/3 port Signed-off-by: chao an <anchao@lixiang.com> 2024-01-11 07:15:45 +01:00			`if UART2_PL011`

			`config UART2_BASE`
			`hex "UART2 base address"`

			`config UART2_IRQ`
			`int "PL011 UART2 IRQ number"`

serial/pl011: configurable clock frequency move clock frequency into Kconfig Signed-off-by: chao an <anchao@lixiang.com> 2024-04-30 03:31:56 +02:00			`config UART2_CLK_FREQ`
			`int "PL011 UART2 clock frequency"`
			`default 24000000`

drivers/serial/pl011: add support of uart0/2/3 port Signed-off-by: chao an <anchao@lixiang.com> 2024-01-11 07:15:45 +01:00			`endif # UART2_PL011`

arch/arm64: merge serial_pl011.c and qemu_serial.c At present, the serial drivers qemu_serial.c and serial_pl011.c on the fvp-v8r and qemu platforms in arm64 are duplicated and need to be merged. The plan is to place them under the drivers\serial directory to create a common code module, so that both fvp-v8r and qemu can use the same code. In the future, if new platforms use pl011 serial ports, they can also be directly reused Signed-off-by: hujun5 <hujun5@xiaomi.com> 2023-03-08 12:53:36 +01:00			`config UART3_PL011`
			`bool "UART3 PL011"`
			`select UART3_SERIALDRIVER`
			`default n`

drivers/serial/pl011: add support of uart0/2/3 port Signed-off-by: chao an <anchao@lixiang.com> 2024-01-11 07:15:45 +01:00			`if UART3_PL011`
arch/arm64: merge serial_pl011.c and qemu_serial.c At present, the serial drivers qemu_serial.c and serial_pl011.c on the fvp-v8r and qemu platforms in arm64 are duplicated and need to be merged. The plan is to place them under the drivers\serial directory to create a common code module, so that both fvp-v8r and qemu can use the same code. In the future, if new platforms use pl011 serial ports, they can also be directly reused Signed-off-by: hujun5 <hujun5@xiaomi.com> 2023-03-08 12:53:36 +01:00
			`config UART3_BASE`
			`hex "UART3 base address"`

			`config UART3_IRQ`
			`int "PL011 UART3 IRQ number"`
drivers/serial/pl011: add support of uart0/2/3 port Signed-off-by: chao an <anchao@lixiang.com> 2024-01-11 07:15:45 +01:00
serial/pl011: configurable clock frequency move clock frequency into Kconfig Signed-off-by: chao an <anchao@lixiang.com> 2024-04-30 03:31:56 +02:00			`config UART3_CLK_FREQ`
			`int "PL011 UART3 clock frequency"`
			`default 24000000`

drivers/serial/pl011: add support of uart0/2/3 port Signed-off-by: chao an <anchao@lixiang.com> 2024-01-11 07:15:45 +01:00			`endif # UART3_PL011`
arch/arm64: merge serial_pl011.c and qemu_serial.c At present, the serial drivers qemu_serial.c and serial_pl011.c on the fvp-v8r and qemu platforms in arm64 are duplicated and need to be merged. The plan is to place them under the drivers\serial directory to create a common code module, so that both fvp-v8r and qemu can use the same code. In the future, if new platforms use pl011 serial ports, they can also be directly reused Signed-off-by: hujun5 <hujun5@xiaomi.com> 2023-03-08 12:53:36 +01:00
drivers/serial/uart_pl011.c : add the interface about clock and reset control for reducing power consumption. 2024-06-03 08:35:11 +02:00			`config UART_PL011_PLATFORMIF`
			`bool "PL011 platform interface"`
			`default n`

arch/arm64: merge serial_pl011.c and qemu_serial.c At present, the serial drivers qemu_serial.c and serial_pl011.c on the fvp-v8r and qemu platforms in arm64 are duplicated and need to be merged. The plan is to place them under the drivers\serial directory to create a common code module, so that both fvp-v8r and qemu can use the same code. In the future, if new platforms use pl011 serial ports, they can also be directly reused Signed-off-by: hujun5 <hujun5@xiaomi.com> 2023-03-08 12:53:36 +01:00			`endif # UART_PL011`