2017-07-25 00:46:30 +02:00
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/****************************************************************************
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2021-03-08 22:39:04 +01:00
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* boards/arm/stm32l4/b-l475e-iot01a/src/stm32_spi.c
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2017-07-25 00:46:30 +02:00
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*
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2021-03-19 12:39:00 +01:00
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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2017-07-25 00:46:30 +02:00
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*
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2021-03-19 12:39:00 +01:00
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* http://www.apache.org/licenses/LICENSE-2.0
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2017-07-25 00:46:30 +02:00
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*
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2021-03-19 12:39:00 +01:00
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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2017-07-25 00:46:30 +02:00
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*
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****************************************************************************/
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2019-08-19 17:16:08 +02:00
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/****************************************************************************
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2017-07-25 00:46:30 +02:00
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* Included Files
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2019-08-19 17:16:08 +02:00
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****************************************************************************/
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2017-07-25 00:46:30 +02:00
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <debug.h>
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#include <errno.h>
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#include <nuttx/spi/spi.h>
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#include <arch/board/board.h>
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#include "stm32l4_gpio.h"
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#include "stm32l4_spi.h"
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#include "b-l475e-iot01a.h"
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2019-08-19 17:16:08 +02:00
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/****************************************************************************
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2017-07-25 00:46:30 +02:00
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* Pre-processor Definitions
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2019-08-19 17:16:08 +02:00
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****************************************************************************/
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2017-07-25 00:46:30 +02:00
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/* Currently no devices are defined on SPI1 or SPI2 */
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#undef CONFIG_STM32L4_SPI1
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#undef CONFIG_STM32L4_SPI2
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/* Only the SPSGRF is currently supported on SPI3 */
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#ifndef HAVE_SPSGRF
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# undef CONFIG_STM32L4_SPI3
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#endif
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#if defined(CONFIG_STM32L4_SPI1) || defined(CONFIG_STM32L4_SPI2) || defined(CONFIG_STM32L4_SPI3)
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2019-08-19 17:16:08 +02:00
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/****************************************************************************
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2017-07-25 00:46:30 +02:00
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* Public Data
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2019-08-19 17:16:08 +02:00
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****************************************************************************/
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2017-07-25 00:46:30 +02:00
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/* Global driver instances */
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#ifdef CONFIG_STM32L4_SPI1
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struct spi_dev_s *g_spi1;
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#endif
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#ifdef CONFIG_STM32L4_SPI2
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struct spi_dev_s *g_spi2;
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#endif
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#ifdef CONFIG_STM32L4_SPI3
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struct spi_dev_s *g_spi3;
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#endif
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2019-08-19 17:16:08 +02:00
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/****************************************************************************
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2017-07-25 00:46:30 +02:00
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* Public Functions
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****************************************************************************/
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2017-07-25 00:46:30 +02:00
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2019-08-19 17:16:08 +02:00
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/****************************************************************************
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2017-07-25 00:46:30 +02:00
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* Name: stm32l4_spidev_initialize
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*
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* Description:
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* Called to configure SPI chip select GPIO pins for the Nucleo-F401RE and
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* Nucleo-F411RE boards.
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*
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2019-08-19 17:16:08 +02:00
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****************************************************************************/
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2017-07-25 00:46:30 +02:00
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void weak_function stm32l4_spidev_initialize(void)
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{
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#ifdef CONFIG_STM32L4_SPI1
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/* Configure SPI-based devices */
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g_spi1 = stm32l4_spibus_initialize(1);
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if (!g_spi1)
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{
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spierr("ERROR: [boot] FAILED to initialize SPI port 1\n");
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}
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/* Configure chip select GPIOs */
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#endif
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#ifdef CONFIG_STM32L4_SPI2
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/* Configure SPI-based devices */
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g_spi2 = stm32l4_spibus_initialize(2);
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/* Configure chip select GPIOs */
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#endif
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2017-08-01 23:18:40 +02:00
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#ifdef CONFIG_STM32L4_SPI3
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2017-07-25 00:46:30 +02:00
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/* Configure SPI-based devices */
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g_spi3 = stm32l4_spibus_initialize(3);
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/* Configure chip select GPIOs */
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#ifdef HAVE_SPSGRF
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stm32l4_configgpio(GPIO_SPSGRF_CS);
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#endif
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#endif
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}
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/****************************************************************************
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* Name: stm32l4_spi1/2/3select and stm32l4_spi1/2/3status
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*
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* Description:
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2021-03-20 13:01:22 +01:00
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* The external functions, stm32l4_spi1/2/3select and
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* stm32l4_spi1/2/3status must be provided by board-specific logic.
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* They are implementations of the select and status methods of the SPI
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* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
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* All other methods (including up_spiinitialize()) are provided by
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* common STM32 logic. To use this common SPI logic on your board:
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2017-07-25 00:46:30 +02:00
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*
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* 1. Provide logic in stm32l4_boardinitialize() to configure SPI chip
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* select pins.
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* 2. Provide stm32l4_spi1/2/3select() and stm32l4_spi1/2/3status()
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* functions in your board-specific logic. These functions will perform
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* chip selection and status operations using GPIOs in the way your
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* board is configured.
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2017-07-25 00:46:30 +02:00
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* 3. Add a calls to up_spiinitialize() in your low level application
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* initialization logic
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2021-03-20 13:01:22 +01:00
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* 4. The handle returned by up_spiinitialize() may then be used to bind
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* the SPI driver to higher level logic (e.g., calling
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2017-07-25 00:46:30 +02:00
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* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
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* the SPI MMC/SD driver).
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*
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****************************************************************************/
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#ifdef CONFIG_STM32L4_SPI1
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void stm32l4_spi1select(struct spi_dev_s *dev,
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uint32_t devid, bool selected)
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{
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spiinfo("devid: %d CS: %s\n",
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(int)devid, selected ? "assert" : "de-assert");
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2017-07-25 00:46:30 +02:00
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}
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2022-04-17 08:01:48 +02:00
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uint8_t stm32l4_spi1status(struct spi_dev_s *dev, uint32_t devid)
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2017-07-25 00:46:30 +02:00
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_STM32L4_SPI2
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void stm32l4_spi2select(struct spi_dev_s *dev,
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uint32_t devid, bool selected)
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{
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spiinfo("devid: %d CS: %s\n",
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(int)devid, selected ? "assert" : "de-assert");
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2017-07-25 00:46:30 +02:00
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}
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2022-04-17 08:01:48 +02:00
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uint8_t stm32l4_spi2status(struct spi_dev_s *dev, uint32_t devid)
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2017-07-25 00:46:30 +02:00
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_STM32L4_SPI3
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void stm32l4_spi3select(struct spi_dev_s *dev,
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uint32_t devid, bool selected)
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2017-07-25 00:46:30 +02:00
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{
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spiinfo("devid: %d CS: %s\n",
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(int)devid, selected ? "assert" : "de-assert");
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2017-07-25 00:46:30 +02:00
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#ifdef HAVE_SPSGRF
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if (devid == SPIDEV_WIRELESS(0))
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{
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stm32l4_gpiowrite(GPIO_SPSGRF_CS, !selected);
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}
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#endif
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}
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2022-04-17 08:01:48 +02:00
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uint8_t stm32l4_spi3status(struct spi_dev_s *dev, uint32_t devid)
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2017-07-25 00:46:30 +02:00
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{
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return 0;
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}
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#endif
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/****************************************************************************
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* Name: stm32l4_spi1cmddata
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*
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* Description:
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* Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
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* or command (false). This function must be provided by platform-specific
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* logic. This is an implementation of the cmddata method of the SPI
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* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
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*
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* Input Parameters:
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*
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* spi - SPI device that controls the bus the device that requires the CMD/
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* DATA selection.
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* devid - If there are multiple devices on the bus, this selects which one
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* to select cmd or data. NOTE: This design restricts, for example,
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* one one SPI display per SPI bus.
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* cmd - true: select command; false: select data
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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#ifdef CONFIG_SPI_CMDDATA
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#ifdef CONFIG_STM32L4_SPI1
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int stm32l4_spi1cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd)
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2017-07-25 00:46:30 +02:00
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{
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return OK;
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}
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#endif
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#ifdef CONFIG_STM32L4_SPI2
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int stm32l4_spi2cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd)
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2017-07-25 00:46:30 +02:00
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{
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return OK;
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}
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#endif
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#ifdef CONFIG_STM32L4_SPI3
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int stm32l4_spi3cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd)
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2017-07-25 00:46:30 +02:00
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{
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return OK;
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}
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#endif
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#endif /* CONFIG_SPI_CMDDATA */
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#endif /* CONFIG_STM32L4_SPI1 || CONFIG_STM32L4_SPI2 || CONFIG_STM32L4_SPI3 */
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