nuttx/boards/arm/imxrt/imxrt1170-evk/scripts/flash.ld

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Base IMXRT1170 port Co-authored-by: Jari van Ewijk <jari.vanewijk@nxp.com> Co-authored-by: David Sidrane <david.sidrane@nscdg.com> Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com> imxrt:Kconfig fix formatting imxrt:usbphy move IMXRT_USBPHY{1|[2]}_BASE to memory map imxrt:lpspi Fix build breakage from adding 1170 imxrt:Finish 1170 iomux and clockconfig versioning imxrt:Remove duplicate imxrt_clock{off|all}_lpi2c4 imxrt:pmu remove duplicate dcd non 117x header imxrt:lpspi Fix unused var warnings imxrt:lpi2c Fix unused var warnings imxrt:lowputs Fix unused var warnings imxrt:imxrt117x_dmamux fix duplicate entries imxtr:serial Use IOMUX_PULL_{UP|DOWN} and map IOMUX V1 to them imxrt:MPU Support the 1170 imxrt:dmamux Alias IMXRT_DMAMUX0_BASE as IMXRT_DMAMUX_BASE imx1170:ccm Alias CCM_CCGR_DMA & CCM_CCGR_SNVS_LP for compatiblity Author: Peter van der Perk <peter.vanderperk@nxp.com> IMXRT7 Add LPUART 9/10/11/12 support Author: David Sidrane <david.sidrane@nscdg.com> imxrt:1170pinmux Add QTIMER pins imxrt:1170pinmux Add GPT pins imxrt:1170pinmux Add FLEXPWM pins imxrt1170:pinmap Add GPIO_ENET_1G pinning imxrt:enet Support ENET_1G imxrt:periphclks rt1170 does not have canX_serial clock imxrt:flexcan:Layer imxrt_ioctl imxrt117x:memorymap added CAN3 imxrt:ADC support ver1 and ver2 for imxrt117x imxrt:imxrt117x_ccm Align timer naming with other imxrt QTIMERn->TIMERn imxrt:imxrt117x_ccm align CCM names with rt106x imxrt:XBAR support larger number of selects needed on imxrt1170 Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com> FlexSPI AHB Region support, PIT rename for compatiblity imxrt:USB Analog add VBUS_VALID_3V FlexSPI expand prefetch registers for IMXRT117X imxrt:Support Initialization of FlexRam without Running from OCRAM imxrt: ocotp add UNIQUE_ID register definition imxrt: enet use ocotp unique_id imxrt: enet fixes for imxrt117x imxrt: ethernet pinmux sion enable imxrt:imxrt_periphclk_configure add memory sync Flush the pipeline to prevent bus faults, by insuring a peripheral is clocked before being accessed on return from this function. imxrt:Restructure gpioN to padmux mapping imxrt:Add imxrt1170 daisy imxrt: correct power modes for imxrt117x fixing hang on WFI imxrt: imxrt117x TCM MPU config imxrt: FlexRAM clocking DIV0 setup imxrt: 117x periphclocks wait for status bit imxrt: iomucx set pad settings correctly and allow reconfiguration imxrt: enet align buffers 64-byte for optimal performance Add DSC barriers for write-through cache support imxrt: imxrt1170 use FlexCAN FD/ECC features imxrt:iomuxc_ver2 (117x) SD_B1 and DISP_B1 use PULL feild not PUE/PUS imxrt:Fix 1170 SNVS addressing imxrt: enet set mii clock after ifdown so that phy keep working nxstyle fixes imxrt: preprocessor and include fixes Fix configs imxrt1170-evk clean defconfig
2023-01-25 15:40:00 +01:00
/****************************************************************************
* boards/arm/imxrt/imxrt1170-evk/scripts/flash.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* Specify the memory areas */
MEMORY
{
flash (rx) : ORIGIN = 0x30000000, LENGTH = 16M
sram (rwx) : ORIGIN = 0x20240000, LENGTH = 1024K /* OCRAM1 + OCRAM2*/
itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 256K /* TODO FlexRAM partition */
dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
EXTERN(g_flash_config)
EXTERN(g_image_vector_table)
EXTERN(g_boot_data)
ENTRY(_stext)
SECTIONS
{
/* Image Vector Table and Boot Data for booting from external flash */
.boot_hdr : ALIGN(4)
{
FILL(0xff)
. = 0x400 ;
__boot_hdr_start__ = ABSOLUTE(.) ;
KEEP(*(.boot_hdr.conf))
. = 0x1000 ;
KEEP(*(.boot_hdr.ivt))
. = 0x1020 ;
KEEP(*(.boot_hdr.boot_data))
. = 0x1030 ;
KEEP(*(.boot_hdr.dcd_data))
__boot_hdr_end__ = ABSOLUTE(.) ;
. = 0x2000 ;
} >flash
/* The RAM vector table (if present) should lie at the beginning of SRAM */
.ram_vectors : {
*(.ram_vectors)
} > sram
.text : ALIGN(4)
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab :
{
*(.ARM.extab*)
} > flash
.ARM.exidx :
{
__exidx_start = ABSOLUTE(.);
*(.ARM.exidx*)
__exidx_end = ABSOLUTE(.);
} > flash
_eronly = ABSOLUTE(.);
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.ramfunc ALIGN(4):
{
_sramfuncs = ABSOLUTE(.);
*(.ramfunc .ramfunc.*)
_eramfuncs = ABSOLUTE(.);
} > sram AT > flash
_framfuncs = LOADADDR(.ramfunc);
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
_boot_loadaddr = ORIGIN(flash);
_boot_size = LENGTH(flash);
_ram_size = LENGTH(sram);
}