2015-12-10 16:53:31 +01:00
|
|
|
/****************************************************************************
|
2018-05-29 21:21:26 +02:00
|
|
|
* libs/libc/modlib/modlib_bind.c
|
2015-12-10 16:53:31 +01:00
|
|
|
*
|
2020-04-13 17:03:46 +02:00
|
|
|
* Licensed to the Apache Software Foundation (ASF) under one or more
|
|
|
|
* contributor license agreements. See the NOTICE file distributed with
|
|
|
|
* this work for additional information regarding copyright ownership. The
|
|
|
|
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
|
|
|
* "License"); you may not use this file except in compliance with the
|
|
|
|
* License. You may obtain a copy of the License at
|
2015-12-10 16:53:31 +01:00
|
|
|
*
|
2020-04-13 17:03:46 +02:00
|
|
|
* http://www.apache.org/licenses/LICENSE-2.0
|
2015-12-10 16:53:31 +01:00
|
|
|
*
|
2020-04-13 17:03:46 +02:00
|
|
|
* Unless required by applicable law or agreed to in writing, software
|
|
|
|
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
|
|
|
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
|
|
|
* License for the specific language governing permissions and limitations
|
|
|
|
* under the License.
|
2015-12-10 16:53:31 +01:00
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Included Files
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
#include <nuttx/config.h>
|
|
|
|
|
|
|
|
#include <stdint.h>
|
|
|
|
#include <string.h>
|
|
|
|
#include <errno.h>
|
|
|
|
#include <assert.h>
|
|
|
|
#include <debug.h>
|
|
|
|
|
2019-01-26 18:18:45 +01:00
|
|
|
#include <nuttx/elf.h>
|
2017-01-29 15:24:42 +01:00
|
|
|
#include <nuttx/lib/modlib.h>
|
2015-12-10 16:53:31 +01:00
|
|
|
|
2019-03-19 15:57:13 +01:00
|
|
|
#include "libc.h"
|
2017-01-29 18:17:29 +01:00
|
|
|
#include "modlib/modlib.h"
|
|
|
|
|
2022-09-26 08:22:03 +02:00
|
|
|
/****************************************************************************
|
|
|
|
* Pre-processor Definitions
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
#define I_REL 0 /* Index into relxxx[] arrays for relocations */
|
|
|
|
#define I_PLT 1 /* ... for PLTs */
|
|
|
|
#define N_RELS 2 /* Number of relxxx[] indexes */
|
|
|
|
|
riscv/arch_elf.c: Handle PCREL_HI20/LO12_I/S relocations correctly
There is a problem with the current elf loader for risc-v: when a pair of
PCREL_HI20 / LO12 relocations are encountered, it is assumed that these
will follow each other immediately, as follows:
label:
auipc a0, %pcrel_hi(symbol) // R_RISCV_PCREL_HI20
load/store a0, %pcrel_lo(label)(a0) // R_RISCV_PCREL_LO12_I/S
With this assumption, the hi/lo relocations are both done when a hi20
relocation entry is encountered, first to the current instruction (addr)
and to the next instruction (addr + 4).
However, this assumption is wrong. There is nothing in the elf relocation
specification[1] that mandates this. Thus, the hi/lo relocation always
needs to first fixup the hi-part, and when the lo-part is encountered, it
needs to find the corresponding hi relocation entry, via the given "label".
This necessitates (re-)visiting the relocation entries for the current
section as well as looking for "label" in the symbol table.
The NuttX elf loader does not allow such operations to be done in the
machine specific part, so this patch fixes the relocation issue by
introducing an architecture specific cache for the hi20 relocation and
symbol table entries. When a lo12 relocation is encountered, the cache
can be consulted to find the hi20 part.
[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc
2023-12-05 11:30:46 +01:00
|
|
|
#ifdef ARCH_ELFDATA
|
|
|
|
# define ARCH_ELFDATA_DEF arch_elfdata_t arch_data; \
|
|
|
|
memset(&arch_data, 0, sizeof(arch_elfdata_t))
|
|
|
|
# define ARCH_ELFDATA_PARM &arch_data
|
|
|
|
#else
|
|
|
|
# define ARCH_ELFDATA_DEF
|
|
|
|
# define ARCH_ELFDATA_PARM NULL
|
|
|
|
#endif
|
|
|
|
|
2019-03-19 16:13:50 +01:00
|
|
|
/****************************************************************************
|
|
|
|
* Private Types
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/* REVISIT: This naming breaks the NuttX coding standard, but is consistent
|
2020-02-08 00:10:23 +01:00
|
|
|
* with legacy naming of other ELF types.
|
2019-03-19 16:13:50 +01:00
|
|
|
*/
|
|
|
|
|
|
|
|
typedef struct
|
|
|
|
{
|
2023-09-15 20:59:06 +02:00
|
|
|
dq_entry_t entry;
|
|
|
|
Elf_Sym sym;
|
|
|
|
int idx;
|
2020-02-08 00:10:23 +01:00
|
|
|
} Elf_SymCache;
|
2019-03-19 16:13:50 +01:00
|
|
|
|
2022-09-26 08:22:03 +02:00
|
|
|
struct
|
|
|
|
{
|
2023-07-25 02:06:59 +02:00
|
|
|
int stroff; /* offset to string table */
|
|
|
|
int symoff; /* offset to symbol table */
|
|
|
|
int lsymtab; /* size of symbol table */
|
2023-09-04 02:37:48 +02:00
|
|
|
int relentsz[2]; /* size of relocation entry */
|
2023-07-25 02:06:59 +02:00
|
|
|
int reloff[2]; /* offset to the relocation section */
|
|
|
|
int relsz[2]; /* size of relocation table */
|
2023-09-04 02:37:48 +02:00
|
|
|
int relrela[2]; /* type of relocation type - 0: DT_REL / 1: DT_RELA */
|
2023-07-25 02:06:59 +02:00
|
|
|
} reldata;
|
2022-09-26 08:22:03 +02:00
|
|
|
|
2015-12-10 16:53:31 +01:00
|
|
|
/****************************************************************************
|
|
|
|
* Private Functions
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/****************************************************************************
|
2019-03-19 15:57:13 +01:00
|
|
|
* Name: modlib_readrels
|
2015-12-10 16:53:31 +01:00
|
|
|
*
|
|
|
|
* Description:
|
2020-02-08 00:10:23 +01:00
|
|
|
* Read the (ELF_Rel structure * buffer count) into memory.
|
2015-12-10 16:53:31 +01:00
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2019-03-19 15:57:13 +01:00
|
|
|
static inline int modlib_readrels(FAR struct mod_loadinfo_s *loadinfo,
|
2020-02-08 00:10:23 +01:00
|
|
|
FAR const Elf_Shdr *relsec,
|
|
|
|
int index, FAR Elf_Rel *rels,
|
2019-03-19 16:13:50 +01:00
|
|
|
int count)
|
2015-12-10 16:53:31 +01:00
|
|
|
{
|
|
|
|
off_t offset;
|
2019-03-19 15:57:13 +01:00
|
|
|
int size;
|
2015-12-10 16:53:31 +01:00
|
|
|
|
|
|
|
/* Verify that the symbol table index lies within symbol table */
|
|
|
|
|
2020-02-08 00:10:23 +01:00
|
|
|
if (index < 0 || index > (relsec->sh_size / sizeof(Elf_Rel)))
|
2015-12-10 16:53:31 +01:00
|
|
|
{
|
2018-06-01 18:10:17 +02:00
|
|
|
berr("ERROR: Bad relocation symbol index: %d\n", index);
|
2015-12-10 16:53:31 +01:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the file offset to the symbol table entry */
|
|
|
|
|
2020-02-08 00:10:23 +01:00
|
|
|
offset = sizeof(Elf_Rel) * index;
|
|
|
|
size = sizeof(Elf_Rel) * count;
|
2019-03-19 15:57:13 +01:00
|
|
|
if (offset + size > relsec->sh_size)
|
|
|
|
{
|
|
|
|
size = relsec->sh_size - offset;
|
|
|
|
}
|
2015-12-10 16:53:31 +01:00
|
|
|
|
|
|
|
/* And, finally, read the symbol table entry into memory */
|
|
|
|
|
2019-03-19 15:57:13 +01:00
|
|
|
return modlib_read(loadinfo, (FAR uint8_t *)rels, size,
|
|
|
|
relsec->sh_offset + offset);
|
2015-12-10 16:53:31 +01:00
|
|
|
}
|
|
|
|
|
2020-02-08 00:10:23 +01:00
|
|
|
/****************************************************************************
|
|
|
|
* Name: modlib_readrelas
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Read the (ELF_Rela structure * buffer count) into memory.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static inline int modlib_readrelas(FAR struct mod_loadinfo_s *loadinfo,
|
|
|
|
FAR const Elf_Shdr *relsec,
|
|
|
|
int index, FAR Elf_Rela *relas,
|
|
|
|
int count)
|
|
|
|
{
|
|
|
|
off_t offset;
|
|
|
|
int size;
|
|
|
|
|
|
|
|
/* Verify that the symbol table index lies within symbol table */
|
|
|
|
|
|
|
|
if (index < 0 || index > (relsec->sh_size / sizeof(Elf_Rela)))
|
|
|
|
{
|
|
|
|
berr("ERROR: Bad relocation symbol index: %d\n", index);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the file offset to the symbol table entry */
|
|
|
|
|
|
|
|
offset = sizeof(Elf_Rela) * index;
|
|
|
|
size = sizeof(Elf_Rela) * count;
|
|
|
|
if (offset + size > relsec->sh_size)
|
|
|
|
{
|
|
|
|
size = relsec->sh_size - offset;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* And, finally, read the symbol table entry into memory */
|
|
|
|
|
|
|
|
return modlib_read(loadinfo, (FAR uint8_t *)relas, size,
|
|
|
|
relsec->sh_offset + offset);
|
|
|
|
}
|
|
|
|
|
2015-12-10 16:53:31 +01:00
|
|
|
/****************************************************************************
|
2017-01-29 17:05:15 +01:00
|
|
|
* Name: modlib_relocate and modlib_relocateadd
|
2015-12-10 16:53:31 +01:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Perform all relocations associated with a section.
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* 0 (OK) is returned on success and a negated errno is returned on
|
|
|
|
* failure.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2017-01-29 17:05:15 +01:00
|
|
|
static int modlib_relocate(FAR struct module_s *modp,
|
|
|
|
FAR struct mod_loadinfo_s *loadinfo, int relidx)
|
2015-12-10 16:53:31 +01:00
|
|
|
{
|
2023-09-15 20:59:06 +02:00
|
|
|
FAR Elf_Shdr *relsec = &loadinfo->shdr[relidx];
|
|
|
|
FAR Elf_Shdr *dstsec = &loadinfo->shdr[relsec->sh_info];
|
|
|
|
FAR Elf_Rel *rels;
|
|
|
|
FAR Elf_Rel *rel;
|
2020-02-08 00:10:23 +01:00
|
|
|
FAR Elf_SymCache *cache;
|
2023-09-15 20:59:06 +02:00
|
|
|
FAR Elf_Sym *sym;
|
|
|
|
FAR dq_entry_t *e;
|
|
|
|
dq_queue_t q;
|
|
|
|
uintptr_t addr;
|
|
|
|
int symidx;
|
|
|
|
int ret = OK;
|
|
|
|
int i;
|
|
|
|
int j;
|
2015-12-10 16:53:31 +01:00
|
|
|
|
riscv/arch_elf.c: Handle PCREL_HI20/LO12_I/S relocations correctly
There is a problem with the current elf loader for risc-v: when a pair of
PCREL_HI20 / LO12 relocations are encountered, it is assumed that these
will follow each other immediately, as follows:
label:
auipc a0, %pcrel_hi(symbol) // R_RISCV_PCREL_HI20
load/store a0, %pcrel_lo(label)(a0) // R_RISCV_PCREL_LO12_I/S
With this assumption, the hi/lo relocations are both done when a hi20
relocation entry is encountered, first to the current instruction (addr)
and to the next instruction (addr + 4).
However, this assumption is wrong. There is nothing in the elf relocation
specification[1] that mandates this. Thus, the hi/lo relocation always
needs to first fixup the hi-part, and when the lo-part is encountered, it
needs to find the corresponding hi relocation entry, via the given "label".
This necessitates (re-)visiting the relocation entries for the current
section as well as looking for "label" in the symbol table.
The NuttX elf loader does not allow such operations to be done in the
machine specific part, so this patch fixes the relocation issue by
introducing an architecture specific cache for the hi20 relocation and
symbol table entries. When a lo12 relocation is encountered, the cache
can be consulted to find the hi20 part.
[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc
2023-12-05 11:30:46 +01:00
|
|
|
/* Define potential architecture specific elf data container */
|
|
|
|
|
|
|
|
ARCH_ELFDATA_DEF;
|
|
|
|
|
2020-02-08 00:10:23 +01:00
|
|
|
rels = lib_malloc(CONFIG_MODLIB_RELOCATION_BUFFERCOUNT * sizeof(Elf_Rel));
|
2019-03-19 15:57:13 +01:00
|
|
|
if (!rels)
|
|
|
|
{
|
|
|
|
berr("Failed to allocate memory for elf relocation rels\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
2019-03-19 16:13:50 +01:00
|
|
|
dq_init(&q);
|
|
|
|
|
2015-12-10 16:53:31 +01:00
|
|
|
/* Examine each relocation in the section. 'relsec' is the section
|
|
|
|
* containing the relations. 'dstsec' is the section containing the data
|
|
|
|
* to be relocated.
|
|
|
|
*/
|
|
|
|
|
2020-02-08 00:10:23 +01:00
|
|
|
for (i = j = 0; i < relsec->sh_size / sizeof(Elf_Rel); i++)
|
2015-12-10 16:53:31 +01:00
|
|
|
{
|
|
|
|
/* Read the relocation entry into memory */
|
|
|
|
|
2019-03-19 15:57:13 +01:00
|
|
|
rel = &rels[i % CONFIG_MODLIB_RELOCATION_BUFFERCOUNT];
|
|
|
|
|
|
|
|
if (!(i % CONFIG_MODLIB_RELOCATION_BUFFERCOUNT))
|
2015-12-10 16:53:31 +01:00
|
|
|
{
|
2020-03-10 06:52:58 +01:00
|
|
|
ret = modlib_readrels(loadinfo, relsec, i, rels,
|
|
|
|
CONFIG_MODLIB_RELOCATION_BUFFERCOUNT);
|
2019-03-19 15:57:13 +01:00
|
|
|
if (ret < 0)
|
2020-03-10 06:52:58 +01:00
|
|
|
{
|
|
|
|
berr("ERROR: Section %d reloc %d: "
|
|
|
|
"Failed to read relocation entry: %d\n",
|
2019-03-19 15:57:13 +01:00
|
|
|
relidx, i, ret);
|
|
|
|
break;
|
2020-03-10 06:52:58 +01:00
|
|
|
}
|
2015-12-10 16:53:31 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the symbol table index for the relocation. This is contained
|
|
|
|
* in a bit-field within the r_info element.
|
|
|
|
*/
|
|
|
|
|
2020-02-08 00:10:23 +01:00
|
|
|
symidx = ELF_R_SYM(rel->r_info);
|
2015-12-10 16:53:31 +01:00
|
|
|
|
2019-03-19 16:13:50 +01:00
|
|
|
/* First try the cache */
|
2015-12-10 16:53:31 +01:00
|
|
|
|
2019-03-19 16:13:50 +01:00
|
|
|
sym = NULL;
|
|
|
|
for (e = dq_peek(&q); e; e = dq_next(e))
|
2015-12-10 16:53:31 +01:00
|
|
|
{
|
2020-02-08 00:10:23 +01:00
|
|
|
cache = (FAR Elf_SymCache *)e;
|
2019-03-19 16:13:50 +01:00
|
|
|
if (cache->idx == symidx)
|
|
|
|
{
|
|
|
|
dq_rem(&cache->entry, &q);
|
|
|
|
dq_addfirst(&cache->entry, &q);
|
|
|
|
sym = &cache->sym;
|
|
|
|
break;
|
|
|
|
}
|
2015-12-10 16:53:31 +01:00
|
|
|
}
|
|
|
|
|
2019-03-19 16:13:50 +01:00
|
|
|
/* If the symbol was not found in the cache, we will need to read the
|
|
|
|
* symbol from the file.
|
|
|
|
*/
|
2015-12-10 16:53:31 +01:00
|
|
|
|
2019-03-19 16:13:50 +01:00
|
|
|
if (sym == NULL)
|
2015-12-10 16:53:31 +01:00
|
|
|
{
|
2019-03-19 16:13:50 +01:00
|
|
|
if (j < CONFIG_MODLIB_SYMBOL_CACHECOUNT)
|
2015-12-10 16:53:31 +01:00
|
|
|
{
|
2020-02-08 00:10:23 +01:00
|
|
|
cache = lib_malloc(sizeof(Elf_SymCache));
|
2019-03-19 16:13:50 +01:00
|
|
|
if (!cache)
|
|
|
|
{
|
|
|
|
berr("Failed to allocate memory for elf symbols\n");
|
|
|
|
ret = -ENOMEM;
|
|
|
|
break;
|
|
|
|
}
|
2020-03-10 06:52:58 +01:00
|
|
|
|
2019-03-19 16:13:50 +01:00
|
|
|
j++;
|
2015-12-10 16:53:31 +01:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2020-02-08 00:10:23 +01:00
|
|
|
cache = (FAR Elf_SymCache *)dq_remlast(&q);
|
2019-03-19 16:13:50 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
sym = &cache->sym;
|
|
|
|
|
|
|
|
/* Read the symbol table entry into memory */
|
|
|
|
|
2023-07-24 00:45:16 +02:00
|
|
|
ret = modlib_readsym(loadinfo, symidx, sym,
|
|
|
|
&loadinfo->shdr[loadinfo->symtabidx]);
|
2019-03-19 16:13:50 +01:00
|
|
|
if (ret < 0)
|
|
|
|
{
|
2020-03-10 06:52:58 +01:00
|
|
|
berr("ERROR: Section %d reloc %d: "
|
|
|
|
"Failed to read symbol[%d]: %d\n",
|
2019-03-19 16:13:50 +01:00
|
|
|
relidx, i, symidx, ret);
|
|
|
|
lib_free(cache);
|
2019-03-19 15:57:13 +01:00
|
|
|
break;
|
2015-12-10 16:53:31 +01:00
|
|
|
}
|
2019-03-19 16:13:50 +01:00
|
|
|
|
|
|
|
/* Get the value of the symbol (in sym.st_value) */
|
|
|
|
|
2022-09-26 08:22:03 +02:00
|
|
|
ret = modlib_symvalue(modp, loadinfo, sym,
|
|
|
|
loadinfo->shdr[loadinfo->strtabidx].sh_offset);
|
2019-03-19 16:13:50 +01:00
|
|
|
if (ret < 0)
|
|
|
|
{
|
2020-03-10 06:52:58 +01:00
|
|
|
/* The special error -ESRCH is returned only in one condition:
|
|
|
|
* The symbol has no name.
|
2019-03-19 16:13:50 +01:00
|
|
|
*
|
|
|
|
* There are a few relocations for a few architectures that do
|
|
|
|
* no depend upon a named symbol. We don't know if that is the
|
|
|
|
* case here, but we will use a NULL symbol pointer to indicate
|
|
|
|
* that case to up_relocate(). That function can then do what
|
|
|
|
* is best.
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (ret == -ESRCH)
|
|
|
|
{
|
2020-03-10 06:52:58 +01:00
|
|
|
berr("ERROR: Section %d reloc %d: "
|
|
|
|
"Undefined symbol[%d] has no name: %d\n",
|
|
|
|
relidx, i, symidx, ret);
|
2019-03-19 16:13:50 +01:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2020-03-10 06:52:58 +01:00
|
|
|
berr("ERROR: Section %d reloc %d: "
|
|
|
|
"Failed to get value of symbol[%d]: %d\n",
|
|
|
|
relidx, i, symidx, ret);
|
2019-03-19 16:13:50 +01:00
|
|
|
lib_free(cache);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
cache->idx = symidx;
|
|
|
|
dq_addfirst(&cache->entry, &q);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (sym->st_shndx == SHN_UNDEF && sym->st_name == 0)
|
|
|
|
{
|
|
|
|
sym = NULL;
|
2015-12-10 16:53:31 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Calculate the relocation address. */
|
|
|
|
|
2022-04-04 06:21:17 +02:00
|
|
|
if (rel->r_offset + sizeof(uint32_t) > dstsec->sh_size)
|
2015-12-10 16:53:31 +01:00
|
|
|
{
|
2020-03-10 06:52:58 +01:00
|
|
|
berr("ERROR: Section %d reloc %d: "
|
2020-11-22 02:05:59 +01:00
|
|
|
"Relocation address out of range, "
|
|
|
|
"offset %" PRIuPTR " size %ju\n",
|
|
|
|
relidx, i, (uintptr_t)rel->r_offset,
|
|
|
|
(uintmax_t)dstsec->sh_size);
|
2019-03-19 15:57:13 +01:00
|
|
|
ret = -EINVAL;
|
|
|
|
break;
|
2015-12-10 16:53:31 +01:00
|
|
|
}
|
|
|
|
|
2019-03-19 15:57:13 +01:00
|
|
|
addr = dstsec->sh_addr + rel->r_offset;
|
2015-12-10 16:53:31 +01:00
|
|
|
|
|
|
|
/* Now perform the architecture-specific relocation */
|
|
|
|
|
riscv/arch_elf.c: Handle PCREL_HI20/LO12_I/S relocations correctly
There is a problem with the current elf loader for risc-v: when a pair of
PCREL_HI20 / LO12 relocations are encountered, it is assumed that these
will follow each other immediately, as follows:
label:
auipc a0, %pcrel_hi(symbol) // R_RISCV_PCREL_HI20
load/store a0, %pcrel_lo(label)(a0) // R_RISCV_PCREL_LO12_I/S
With this assumption, the hi/lo relocations are both done when a hi20
relocation entry is encountered, first to the current instruction (addr)
and to the next instruction (addr + 4).
However, this assumption is wrong. There is nothing in the elf relocation
specification[1] that mandates this. Thus, the hi/lo relocation always
needs to first fixup the hi-part, and when the lo-part is encountered, it
needs to find the corresponding hi relocation entry, via the given "label".
This necessitates (re-)visiting the relocation entries for the current
section as well as looking for "label" in the symbol table.
The NuttX elf loader does not allow such operations to be done in the
machine specific part, so this patch fixes the relocation issue by
introducing an architecture specific cache for the hi20 relocation and
symbol table entries. When a lo12 relocation is encountered, the cache
can be consulted to find the hi20 part.
[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc
2023-12-05 11:30:46 +01:00
|
|
|
ret = up_relocate(rel, sym, addr, ARCH_ELFDATA_PARM);
|
2015-12-10 16:53:31 +01:00
|
|
|
if (ret < 0)
|
|
|
|
{
|
2020-03-10 06:52:58 +01:00
|
|
|
berr("ERROR: Section %d reloc %d: Relocation failed: %d\n",
|
|
|
|
relidx, i, ret);
|
2019-03-19 15:57:13 +01:00
|
|
|
break;
|
2015-12-10 16:53:31 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-03-19 15:57:13 +01:00
|
|
|
lib_free(rels);
|
2023-09-15 20:59:06 +02:00
|
|
|
while ((e = dq_peek(&q)) != NULL)
|
2019-03-19 16:13:50 +01:00
|
|
|
{
|
|
|
|
dq_rem(e, &q);
|
|
|
|
lib_free(e);
|
|
|
|
}
|
2019-03-19 15:57:13 +01:00
|
|
|
|
|
|
|
return ret;
|
2015-12-10 16:53:31 +01:00
|
|
|
}
|
|
|
|
|
2017-01-29 17:05:15 +01:00
|
|
|
static int modlib_relocateadd(FAR struct module_s *modp,
|
2023-03-26 11:55:00 +02:00
|
|
|
FAR struct mod_loadinfo_s *loadinfo,
|
|
|
|
int relidx)
|
2015-12-10 16:53:31 +01:00
|
|
|
{
|
2023-09-15 20:59:06 +02:00
|
|
|
FAR Elf_Shdr *relsec = &loadinfo->shdr[relidx];
|
|
|
|
FAR Elf_Shdr *dstsec = &loadinfo->shdr[relsec->sh_info];
|
|
|
|
FAR Elf_Rela *relas;
|
|
|
|
FAR Elf_Rela *rela;
|
2020-02-08 00:10:23 +01:00
|
|
|
FAR Elf_SymCache *cache;
|
2023-09-15 20:59:06 +02:00
|
|
|
FAR Elf_Sym *sym;
|
|
|
|
FAR dq_entry_t *e;
|
|
|
|
dq_queue_t q;
|
|
|
|
uintptr_t addr;
|
|
|
|
int symidx;
|
|
|
|
int ret = OK;
|
|
|
|
int i;
|
|
|
|
int j;
|
2020-02-08 00:10:23 +01:00
|
|
|
|
riscv/arch_elf.c: Handle PCREL_HI20/LO12_I/S relocations correctly
There is a problem with the current elf loader for risc-v: when a pair of
PCREL_HI20 / LO12 relocations are encountered, it is assumed that these
will follow each other immediately, as follows:
label:
auipc a0, %pcrel_hi(symbol) // R_RISCV_PCREL_HI20
load/store a0, %pcrel_lo(label)(a0) // R_RISCV_PCREL_LO12_I/S
With this assumption, the hi/lo relocations are both done when a hi20
relocation entry is encountered, first to the current instruction (addr)
and to the next instruction (addr + 4).
However, this assumption is wrong. There is nothing in the elf relocation
specification[1] that mandates this. Thus, the hi/lo relocation always
needs to first fixup the hi-part, and when the lo-part is encountered, it
needs to find the corresponding hi relocation entry, via the given "label".
This necessitates (re-)visiting the relocation entries for the current
section as well as looking for "label" in the symbol table.
The NuttX elf loader does not allow such operations to be done in the
machine specific part, so this patch fixes the relocation issue by
introducing an architecture specific cache for the hi20 relocation and
symbol table entries. When a lo12 relocation is encountered, the cache
can be consulted to find the hi20 part.
[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc
2023-12-05 11:30:46 +01:00
|
|
|
/* Define potential architecture specific elf data container */
|
|
|
|
|
|
|
|
ARCH_ELFDATA_DEF;
|
|
|
|
|
2020-03-10 06:52:58 +01:00
|
|
|
relas = lib_malloc(CONFIG_MODLIB_RELOCATION_BUFFERCOUNT *
|
|
|
|
sizeof(Elf_Rela));
|
2020-02-08 00:10:23 +01:00
|
|
|
if (!relas)
|
|
|
|
{
|
|
|
|
berr("Failed to allocate memory for elf relocation relas\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
dq_init(&q);
|
|
|
|
|
|
|
|
/* Examine each relocation in the section. 'relsec' is the section
|
|
|
|
* containing the relations. 'dstsec' is the section containing the data
|
|
|
|
* to be relocated.
|
|
|
|
*/
|
|
|
|
|
|
|
|
for (i = j = 0; i < relsec->sh_size / sizeof(Elf_Rela); i++)
|
|
|
|
{
|
|
|
|
/* Read the relocation entry into memory */
|
|
|
|
|
|
|
|
rela = &relas[i % CONFIG_MODLIB_RELOCATION_BUFFERCOUNT];
|
|
|
|
|
|
|
|
if (!(i % CONFIG_MODLIB_RELOCATION_BUFFERCOUNT))
|
|
|
|
{
|
2020-03-10 06:52:58 +01:00
|
|
|
ret = modlib_readrelas(loadinfo, relsec, i, relas,
|
|
|
|
CONFIG_MODLIB_RELOCATION_BUFFERCOUNT);
|
2020-02-08 00:10:23 +01:00
|
|
|
if (ret < 0)
|
2020-03-10 06:52:58 +01:00
|
|
|
{
|
|
|
|
berr("ERROR: Section %d reloc %d: "
|
|
|
|
"Failed to read relocation entry: %d\n",
|
2020-02-08 00:10:23 +01:00
|
|
|
relidx, i, ret);
|
|
|
|
break;
|
2020-03-10 06:52:58 +01:00
|
|
|
}
|
2020-02-08 00:10:23 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the symbol table index for the relocation. This is contained
|
|
|
|
* in a bit-field within the r_info element.
|
|
|
|
*/
|
|
|
|
|
|
|
|
symidx = ELF_R_SYM(rela->r_info);
|
|
|
|
|
|
|
|
/* First try the cache */
|
|
|
|
|
|
|
|
sym = NULL;
|
|
|
|
for (e = dq_peek(&q); e; e = dq_next(e))
|
|
|
|
{
|
|
|
|
cache = (FAR Elf_SymCache *)e;
|
|
|
|
if (cache->idx == symidx)
|
|
|
|
{
|
|
|
|
dq_rem(&cache->entry, &q);
|
|
|
|
dq_addfirst(&cache->entry, &q);
|
|
|
|
sym = &cache->sym;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* If the symbol was not found in the cache, we will need to read the
|
|
|
|
* symbol from the file.
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (sym == NULL)
|
|
|
|
{
|
|
|
|
if (j < CONFIG_MODLIB_SYMBOL_CACHECOUNT)
|
|
|
|
{
|
|
|
|
cache = lib_malloc(sizeof(Elf_SymCache));
|
|
|
|
if (!cache)
|
|
|
|
{
|
|
|
|
berr("Failed to allocate memory for elf symbols\n");
|
|
|
|
ret = -ENOMEM;
|
|
|
|
break;
|
|
|
|
}
|
2020-03-10 06:52:58 +01:00
|
|
|
|
2020-02-08 00:10:23 +01:00
|
|
|
j++;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
cache = (FAR Elf_SymCache *)dq_remlast(&q);
|
|
|
|
}
|
|
|
|
|
|
|
|
sym = &cache->sym;
|
|
|
|
|
|
|
|
/* Read the symbol table entry into memory */
|
|
|
|
|
2022-09-26 08:22:03 +02:00
|
|
|
ret = modlib_readsym(loadinfo, symidx, sym,
|
|
|
|
&loadinfo->shdr[loadinfo->symtabidx]);
|
2020-02-08 00:10:23 +01:00
|
|
|
if (ret < 0)
|
|
|
|
{
|
2020-03-10 06:52:58 +01:00
|
|
|
berr("ERROR: Section %d reloc %d: "
|
|
|
|
"Failed to read symbol[%d]: %d\n",
|
2020-02-08 00:10:23 +01:00
|
|
|
relidx, i, symidx, ret);
|
|
|
|
lib_free(cache);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the value of the symbol (in sym.st_value) */
|
|
|
|
|
2022-09-26 08:22:03 +02:00
|
|
|
ret = modlib_symvalue(modp, loadinfo, sym,
|
|
|
|
loadinfo->shdr[loadinfo->strtabidx].sh_offset);
|
2020-02-08 00:10:23 +01:00
|
|
|
if (ret < 0)
|
|
|
|
{
|
2020-03-10 06:52:58 +01:00
|
|
|
/* The special error -ESRCH is returned only in one condition:
|
|
|
|
* The symbol has no name.
|
2020-02-08 00:10:23 +01:00
|
|
|
*
|
|
|
|
* There are a few relocations for a few architectures that do
|
|
|
|
* no depend upon a named symbol. We don't know if that is the
|
|
|
|
* case here, but we will use a NULL symbol pointer to indicate
|
|
|
|
* that case to up_relocate(). That function can then do what
|
|
|
|
* is best.
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (ret == -ESRCH)
|
|
|
|
{
|
2020-03-10 06:52:58 +01:00
|
|
|
berr("ERROR: Section %d reloc %d: "
|
|
|
|
"Undefined symbol[%d] has no name: %d\n",
|
|
|
|
relidx, i, symidx, ret);
|
2020-02-08 00:10:23 +01:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2020-03-10 06:52:58 +01:00
|
|
|
berr("ERROR: Section %d reloc %d: "
|
|
|
|
"Failed to get value of symbol[%d]: %d\n",
|
|
|
|
relidx, i, symidx, ret);
|
2020-02-08 00:10:23 +01:00
|
|
|
lib_free(cache);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
cache->idx = symidx;
|
|
|
|
dq_addfirst(&cache->entry, &q);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (sym->st_shndx == SHN_UNDEF && sym->st_name == 0)
|
|
|
|
{
|
|
|
|
sym = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Calculate the relocation address. */
|
|
|
|
|
2022-04-04 06:21:17 +02:00
|
|
|
if (rela->r_offset + sizeof(uint32_t) > dstsec->sh_size)
|
2020-02-08 00:10:23 +01:00
|
|
|
{
|
2020-03-10 06:52:58 +01:00
|
|
|
berr("ERROR: Section %d reloc %d: "
|
2020-11-22 02:05:59 +01:00
|
|
|
"Relocation address out of range, "
|
|
|
|
"offset %" PRIuPTR " size %ju\n",
|
|
|
|
relidx, i, (uintptr_t)rela->r_offset,
|
|
|
|
(uintmax_t)dstsec->sh_size);
|
2020-02-08 00:10:23 +01:00
|
|
|
ret = -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
addr = dstsec->sh_addr + rela->r_offset;
|
|
|
|
|
|
|
|
/* Now perform the architecture-specific relocation */
|
|
|
|
|
riscv/arch_elf.c: Handle PCREL_HI20/LO12_I/S relocations correctly
There is a problem with the current elf loader for risc-v: when a pair of
PCREL_HI20 / LO12 relocations are encountered, it is assumed that these
will follow each other immediately, as follows:
label:
auipc a0, %pcrel_hi(symbol) // R_RISCV_PCREL_HI20
load/store a0, %pcrel_lo(label)(a0) // R_RISCV_PCREL_LO12_I/S
With this assumption, the hi/lo relocations are both done when a hi20
relocation entry is encountered, first to the current instruction (addr)
and to the next instruction (addr + 4).
However, this assumption is wrong. There is nothing in the elf relocation
specification[1] that mandates this. Thus, the hi/lo relocation always
needs to first fixup the hi-part, and when the lo-part is encountered, it
needs to find the corresponding hi relocation entry, via the given "label".
This necessitates (re-)visiting the relocation entries for the current
section as well as looking for "label" in the symbol table.
The NuttX elf loader does not allow such operations to be done in the
machine specific part, so this patch fixes the relocation issue by
introducing an architecture specific cache for the hi20 relocation and
symbol table entries. When a lo12 relocation is encountered, the cache
can be consulted to find the hi20 part.
[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc
2023-12-05 11:30:46 +01:00
|
|
|
ret = up_relocateadd(rela, sym, addr, ARCH_ELFDATA_PARM);
|
2020-02-08 00:10:23 +01:00
|
|
|
if (ret < 0)
|
|
|
|
{
|
2020-03-10 06:52:58 +01:00
|
|
|
berr("ERROR: Section %d reloc %d: Relocation failed: %d\n",
|
|
|
|
relidx, i, ret);
|
2020-02-08 00:10:23 +01:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
lib_free(relas);
|
2023-09-15 20:59:06 +02:00
|
|
|
while ((e = dq_peek(&q)) != NULL)
|
2020-02-08 00:10:23 +01:00
|
|
|
{
|
|
|
|
dq_rem(e, &q);
|
|
|
|
lib_free(e);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
2015-12-10 16:53:31 +01:00
|
|
|
}
|
|
|
|
|
2022-09-26 08:22:03 +02:00
|
|
|
/****************************************************************************
|
|
|
|
* Name: modlib_relocatedyn
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Perform all relocations associated with a dynamic section.
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* 0 (OK) is returned on success and a negated errno is returned on
|
|
|
|
* failure.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int modlib_relocatedyn(FAR struct module_s *modp,
|
|
|
|
FAR struct mod_loadinfo_s *loadinfo,
|
|
|
|
int relidx)
|
|
|
|
{
|
|
|
|
FAR Elf_Shdr *shdr = &loadinfo->shdr[relidx];
|
|
|
|
FAR Elf_Shdr *symhdr;
|
|
|
|
FAR Elf_Dyn *dyn = NULL;
|
|
|
|
FAR Elf_Rel *rels = NULL;
|
|
|
|
FAR Elf_Rel *rel;
|
2023-09-04 02:37:48 +02:00
|
|
|
FAR Elf_Rela *relas = NULL;
|
|
|
|
FAR Elf_Rela *rela;
|
2022-09-26 08:22:03 +02:00
|
|
|
FAR Elf_Sym *sym = NULL;
|
2023-09-15 20:59:06 +02:00
|
|
|
uintptr_t addr;
|
|
|
|
int ret;
|
|
|
|
int i;
|
|
|
|
int idx_rel;
|
|
|
|
int idx_sym;
|
2022-09-26 08:22:03 +02:00
|
|
|
|
riscv/arch_elf.c: Handle PCREL_HI20/LO12_I/S relocations correctly
There is a problem with the current elf loader for risc-v: when a pair of
PCREL_HI20 / LO12 relocations are encountered, it is assumed that these
will follow each other immediately, as follows:
label:
auipc a0, %pcrel_hi(symbol) // R_RISCV_PCREL_HI20
load/store a0, %pcrel_lo(label)(a0) // R_RISCV_PCREL_LO12_I/S
With this assumption, the hi/lo relocations are both done when a hi20
relocation entry is encountered, first to the current instruction (addr)
and to the next instruction (addr + 4).
However, this assumption is wrong. There is nothing in the elf relocation
specification[1] that mandates this. Thus, the hi/lo relocation always
needs to first fixup the hi-part, and when the lo-part is encountered, it
needs to find the corresponding hi relocation entry, via the given "label".
This necessitates (re-)visiting the relocation entries for the current
section as well as looking for "label" in the symbol table.
The NuttX elf loader does not allow such operations to be done in the
machine specific part, so this patch fixes the relocation issue by
introducing an architecture specific cache for the hi20 relocation and
symbol table entries. When a lo12 relocation is encountered, the cache
can be consulted to find the hi20 part.
[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc
2023-12-05 11:30:46 +01:00
|
|
|
/* Define potential architecture specific elf data container */
|
|
|
|
|
|
|
|
ARCH_ELFDATA_DEF;
|
|
|
|
|
2022-09-26 08:22:03 +02:00
|
|
|
dyn = lib_malloc(shdr->sh_size);
|
2023-09-15 20:59:06 +02:00
|
|
|
ret = modlib_read(loadinfo, (FAR uint8_t *)dyn, shdr->sh_size,
|
2022-09-26 08:22:03 +02:00
|
|
|
shdr->sh_offset);
|
|
|
|
if (ret < 0)
|
|
|
|
{
|
|
|
|
berr("Failed to read dynamic section header");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2023-09-04 02:37:48 +02:00
|
|
|
/* Assume DT_RELA to get maximum size required */
|
|
|
|
|
|
|
|
rels = lib_malloc(CONFIG_MODLIB_RELOCATION_BUFFERCOUNT * sizeof(Elf_Rela));
|
2022-09-26 08:22:03 +02:00
|
|
|
if (!rels)
|
|
|
|
{
|
|
|
|
berr("Failed to allocate memory for elf relocation rels\n");
|
|
|
|
lib_free(dyn);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
2023-09-15 20:59:06 +02:00
|
|
|
memset((void *)&reldata, 0, sizeof(reldata));
|
2023-09-04 02:37:48 +02:00
|
|
|
relas = (FAR Elf_Rela *)rels;
|
2022-09-26 08:22:03 +02:00
|
|
|
|
|
|
|
for (i = 0; dyn[i].d_tag != DT_NULL; i++)
|
|
|
|
{
|
|
|
|
switch (dyn[i].d_tag)
|
2023-07-12 19:37:56 +02:00
|
|
|
{
|
2023-09-15 20:59:06 +02:00
|
|
|
case DT_REL:
|
2023-07-02 18:11:02 +02:00
|
|
|
reldata.reloff[I_REL] = dyn[i].d_un.d_val;
|
|
|
|
break;
|
2023-09-15 20:59:06 +02:00
|
|
|
case DT_RELSZ:
|
2023-07-02 18:11:02 +02:00
|
|
|
reldata.relsz[I_REL] = dyn[i].d_un.d_val;
|
|
|
|
break;
|
2023-09-15 20:59:06 +02:00
|
|
|
case DT_RELENT:
|
2023-09-04 02:37:48 +02:00
|
|
|
reldata.relentsz[I_REL] = dyn[i].d_un.d_val;
|
2023-07-02 18:11:02 +02:00
|
|
|
break;
|
2023-09-15 20:59:06 +02:00
|
|
|
case DT_SYMTAB:
|
2023-07-02 18:11:02 +02:00
|
|
|
reldata.symoff = dyn[i].d_un.d_val;
|
|
|
|
break;
|
2023-09-15 20:59:06 +02:00
|
|
|
case DT_STRTAB:
|
2023-07-02 18:11:02 +02:00
|
|
|
reldata.stroff = dyn[i].d_un.d_val;
|
|
|
|
break;
|
2023-09-15 20:59:06 +02:00
|
|
|
case DT_JMPREL:
|
2023-07-02 18:11:02 +02:00
|
|
|
reldata.reloff[I_PLT] = dyn[i].d_un.d_val;
|
|
|
|
break;
|
2023-09-15 20:59:06 +02:00
|
|
|
case DT_PLTRELSZ:
|
2023-07-02 18:11:02 +02:00
|
|
|
reldata.relsz[I_PLT] = dyn[i].d_un.d_val;
|
|
|
|
break;
|
2023-09-04 02:37:48 +02:00
|
|
|
case DT_PLTREL:
|
|
|
|
if (dyn[i].d_un.d_val == DT_REL)
|
|
|
|
{
|
|
|
|
reldata.relentsz[I_PLT] = sizeof(Elf_Rel);
|
|
|
|
reldata.relrela[I_PLT] = 0;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
reldata.relentsz[I_PLT] = sizeof(Elf_Rela);
|
|
|
|
reldata.relrela[I_PLT] = 1;
|
|
|
|
}
|
|
|
|
break;
|
2022-09-26 08:22:03 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
symhdr = &loadinfo->shdr[loadinfo->dsymtabidx];
|
|
|
|
sym = lib_malloc(symhdr->sh_size);
|
|
|
|
if (!sym)
|
|
|
|
{
|
|
|
|
berr("Error obtaining storage for dynamic symbol table");
|
|
|
|
lib_free(rels);
|
|
|
|
lib_free(dyn);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
2023-07-02 18:11:02 +02:00
|
|
|
ret = modlib_read(loadinfo, (FAR uint8_t *)sym, symhdr->sh_size,
|
2022-09-26 08:22:03 +02:00
|
|
|
symhdr->sh_offset);
|
|
|
|
if (ret < 0)
|
|
|
|
{
|
|
|
|
berr("Error reading dynamic symbol table - %d", ret);
|
|
|
|
lib_free(sym);
|
|
|
|
lib_free(rels);
|
|
|
|
lib_free(dyn);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2023-07-25 02:06:59 +02:00
|
|
|
reldata.lsymtab = reldata.stroff - reldata.symoff;
|
2022-09-26 08:22:03 +02:00
|
|
|
|
|
|
|
for (idx_rel = 0; idx_rel < N_RELS; idx_rel++)
|
|
|
|
{
|
2023-09-04 02:37:48 +02:00
|
|
|
int lrelent;
|
|
|
|
|
|
|
|
if ((reldata.relsz[idx_rel] == 0) || (reldata.reloff[idx_rel] == 0))
|
2022-09-26 08:22:03 +02:00
|
|
|
{
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Examine each relocation in the .rel.* section. */
|
|
|
|
|
|
|
|
ret = OK;
|
2023-09-04 02:37:48 +02:00
|
|
|
lrelent = reldata.relsz[idx_rel] / reldata.relentsz[idx_rel];
|
2022-09-26 08:22:03 +02:00
|
|
|
|
2023-09-04 02:37:48 +02:00
|
|
|
for (i = 0; i < lrelent; i++)
|
2022-09-26 08:22:03 +02:00
|
|
|
{
|
2023-09-04 02:37:48 +02:00
|
|
|
/* Process each relocation entry
|
|
|
|
* - we cheat by using the fact the 1st two fields of Elf_Rel
|
|
|
|
* and Elf_Rela are identical so can do things based on the
|
|
|
|
* former until it's important
|
|
|
|
*/
|
2022-09-26 08:22:03 +02:00
|
|
|
|
2023-09-04 02:37:48 +02:00
|
|
|
if (reldata.relrela[idx_rel] == 0)
|
|
|
|
{
|
|
|
|
rel = &rels[i % CONFIG_MODLIB_RELOCATION_BUFFERCOUNT];
|
|
|
|
rela = (Elf_Rela *)rel; /* Just to keep the compiler happy */
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
rela = &relas[i % CONFIG_MODLIB_RELOCATION_BUFFERCOUNT];
|
|
|
|
rel = (Elf_Rel *)rela;
|
|
|
|
}
|
2022-09-26 08:22:03 +02:00
|
|
|
|
|
|
|
if (!(i % CONFIG_MODLIB_RELOCATION_BUFFERCOUNT))
|
|
|
|
{
|
2023-09-04 02:37:48 +02:00
|
|
|
size_t relsize = (sizeof(Elf_Rela) *
|
2023-07-12 19:37:56 +02:00
|
|
|
CONFIG_MODLIB_RELOCATION_BUFFERCOUNT);
|
|
|
|
|
2023-07-25 02:06:59 +02:00
|
|
|
if (reldata.relsz[idx_rel] < relsize)
|
2023-07-12 19:37:56 +02:00
|
|
|
{
|
2023-07-25 02:06:59 +02:00
|
|
|
relsize = reldata.relsz[idx_rel];
|
2023-07-12 19:37:56 +02:00
|
|
|
}
|
|
|
|
|
2023-07-02 18:11:02 +02:00
|
|
|
ret = modlib_read(loadinfo, (FAR uint8_t *)rels,
|
2023-07-25 02:06:59 +02:00
|
|
|
relsize,
|
|
|
|
reldata.reloff[idx_rel] +
|
2022-09-26 08:22:03 +02:00
|
|
|
i * sizeof(Elf_Rel));
|
2023-07-12 19:37:56 +02:00
|
|
|
|
2022-09-26 08:22:03 +02:00
|
|
|
if (ret < 0)
|
|
|
|
{
|
|
|
|
berr("ERROR: Section %d reloc %d:"
|
|
|
|
"Failed to read relocation entry: %d\n",
|
|
|
|
relidx, i, ret);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Calculate the relocation address. */
|
|
|
|
|
|
|
|
if (rel->r_offset < 0)
|
|
|
|
{
|
|
|
|
berr("ERROR: Section %d reloc %d:"
|
|
|
|
"Relocation address out of range, offset %u\n",
|
2023-09-15 20:59:06 +02:00
|
|
|
relidx, i, (int)rel->r_offset);
|
2022-09-26 08:22:03 +02:00
|
|
|
ret = -EINVAL;
|
|
|
|
lib_free(sym);
|
|
|
|
lib_free(rels);
|
|
|
|
lib_free(dyn);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Now perform the architecture-specific relocation */
|
|
|
|
|
|
|
|
if ((idx_sym = ELF_R_SYM(rel->r_info)) != 0)
|
|
|
|
{
|
2023-07-12 19:37:56 +02:00
|
|
|
if (sym[idx_sym].st_shndx == SHN_UNDEF) /* We have an external reference */
|
2022-09-26 08:22:03 +02:00
|
|
|
{
|
2023-09-15 20:59:06 +02:00
|
|
|
FAR void *ep;
|
2022-09-26 08:22:03 +02:00
|
|
|
|
|
|
|
ep = modlib_findglobal(modp, loadinfo, symhdr,
|
|
|
|
&sym[idx_sym]);
|
2023-07-12 19:37:56 +02:00
|
|
|
if ((ep == NULL) && (ELF_ST_BIND(sym[idx_sym].st_info)
|
|
|
|
!= STB_WEAK))
|
2022-09-26 08:22:03 +02:00
|
|
|
{
|
|
|
|
berr("ERROR: Unable to resolve addr of ext ref %s\n",
|
|
|
|
loadinfo->iobuffer);
|
|
|
|
ret = -EINVAL;
|
|
|
|
lib_free(sym);
|
|
|
|
lib_free(rels);
|
|
|
|
lib_free(dyn);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
addr = rel->r_offset + loadinfo->textalloc;
|
2023-09-04 02:37:48 +02:00
|
|
|
|
|
|
|
if (reldata.relrela[idx_rel] == 1)
|
|
|
|
{
|
|
|
|
addr += rela->r_addend;
|
|
|
|
}
|
|
|
|
|
2023-07-02 18:11:02 +02:00
|
|
|
*(FAR uintptr_t *)addr = (uintptr_t)ep;
|
2022-09-26 08:22:03 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2023-07-25 02:06:59 +02:00
|
|
|
Elf_Sym dynsym;
|
2022-09-26 08:22:03 +02:00
|
|
|
|
|
|
|
addr = rel->r_offset - loadinfo->datasec + loadinfo->datastart;
|
|
|
|
|
2023-09-04 02:37:48 +02:00
|
|
|
if (reldata.relrela[idx_rel] == 1)
|
|
|
|
{
|
|
|
|
addr += rela->r_addend;
|
|
|
|
}
|
|
|
|
|
2023-07-02 18:11:02 +02:00
|
|
|
if ((*(FAR uint32_t *)addr) < loadinfo->datasec)
|
2023-09-15 20:59:06 +02:00
|
|
|
{
|
2023-07-02 18:11:02 +02:00
|
|
|
dynsym.st_value = *(FAR uint32_t *)addr +
|
|
|
|
loadinfo->textalloc;
|
2023-09-15 20:59:06 +02:00
|
|
|
}
|
2022-09-26 08:22:03 +02:00
|
|
|
else
|
2023-09-15 20:59:06 +02:00
|
|
|
{
|
2023-07-02 18:11:02 +02:00
|
|
|
dynsym.st_value = *(FAR uint32_t *)addr -
|
2022-09-26 08:22:03 +02:00
|
|
|
loadinfo->datasec + loadinfo->datastart;
|
2023-09-15 20:59:06 +02:00
|
|
|
}
|
|
|
|
|
riscv/arch_elf.c: Handle PCREL_HI20/LO12_I/S relocations correctly
There is a problem with the current elf loader for risc-v: when a pair of
PCREL_HI20 / LO12 relocations are encountered, it is assumed that these
will follow each other immediately, as follows:
label:
auipc a0, %pcrel_hi(symbol) // R_RISCV_PCREL_HI20
load/store a0, %pcrel_lo(label)(a0) // R_RISCV_PCREL_LO12_I/S
With this assumption, the hi/lo relocations are both done when a hi20
relocation entry is encountered, first to the current instruction (addr)
and to the next instruction (addr + 4).
However, this assumption is wrong. There is nothing in the elf relocation
specification[1] that mandates this. Thus, the hi/lo relocation always
needs to first fixup the hi-part, and when the lo-part is encountered, it
needs to find the corresponding hi relocation entry, via the given "label".
This necessitates (re-)visiting the relocation entries for the current
section as well as looking for "label" in the symbol table.
The NuttX elf loader does not allow such operations to be done in the
machine specific part, so this patch fixes the relocation issue by
introducing an architecture specific cache for the hi20 relocation and
symbol table entries. When a lo12 relocation is encountered, the cache
can be consulted to find the hi20 part.
[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc
2023-12-05 11:30:46 +01:00
|
|
|
ret = up_relocate(rel, &dynsym, addr, ARCH_ELFDATA_PARM);
|
2022-09-26 08:22:03 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
if (ret < 0)
|
|
|
|
{
|
|
|
|
berr("ERROR: Section %d reloc %d: Relocation failed: %d\n",
|
|
|
|
relidx, i, ret);
|
|
|
|
lib_free(sym);
|
|
|
|
lib_free(rels);
|
|
|
|
lib_free(dyn);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-09-04 02:37:48 +02:00
|
|
|
/* Iterate through the dynamic symbol table looking for global symbols
|
|
|
|
* to put in our own symbol table for use with dlgetsym()
|
2022-09-26 08:22:03 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
/* Relocate the entries in the table */
|
|
|
|
|
2023-09-15 20:59:06 +02:00
|
|
|
for (i = 0; i < symhdr->sh_size / sizeof(Elf_Sym); i++)
|
2022-09-26 08:22:03 +02:00
|
|
|
{
|
2023-09-15 20:59:06 +02:00
|
|
|
FAR Elf_Shdr *s = &loadinfo->shdr[sym[i].st_shndx];
|
2022-09-26 08:22:03 +02:00
|
|
|
|
|
|
|
if (sym[i].st_shndx != SHN_UNDEF)
|
|
|
|
{
|
|
|
|
if (s->sh_addr < loadinfo->datasec)
|
2023-09-15 20:59:06 +02:00
|
|
|
{
|
2022-09-26 08:22:03 +02:00
|
|
|
sym[i].st_value = sym[i].st_value + loadinfo->textalloc;
|
2023-09-15 20:59:06 +02:00
|
|
|
}
|
2022-09-26 08:22:03 +02:00
|
|
|
else
|
2023-09-15 20:59:06 +02:00
|
|
|
{
|
2022-09-26 08:22:03 +02:00
|
|
|
sym[i].st_value = sym[i].st_value -
|
|
|
|
loadinfo->datasec + loadinfo->datastart;
|
2023-09-15 20:59:06 +02:00
|
|
|
}
|
2022-09-26 08:22:03 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = modlib_insertsymtab(modp, loadinfo, symhdr, sym);
|
|
|
|
|
|
|
|
lib_free(sym);
|
|
|
|
lib_free(rels);
|
|
|
|
lib_free(dyn);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-12-10 16:53:31 +01:00
|
|
|
/****************************************************************************
|
|
|
|
* Public Functions
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/****************************************************************************
|
2017-01-29 17:05:15 +01:00
|
|
|
* Name: modlib_bind
|
2015-12-10 16:53:31 +01:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Bind the imported symbol names in the loaded module described by
|
2020-03-10 06:52:58 +01:00
|
|
|
* 'loadinfo' using the exported symbol values provided by
|
|
|
|
* modlib_setsymtab().
|
2015-12-10 16:53:31 +01:00
|
|
|
*
|
2017-01-27 18:43:27 +01:00
|
|
|
* Input Parameters:
|
|
|
|
* modp - Module state information
|
|
|
|
* loadinfo - Load state information
|
|
|
|
*
|
2015-12-10 16:53:31 +01:00
|
|
|
* Returned Value:
|
|
|
|
* 0 (OK) is returned on success and a negated errno is returned on
|
|
|
|
* failure.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2020-03-10 06:52:58 +01:00
|
|
|
int modlib_bind(FAR struct module_s *modp,
|
|
|
|
FAR struct mod_loadinfo_s *loadinfo)
|
2015-12-10 16:53:31 +01:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* Find the symbol and string tables */
|
|
|
|
|
2017-01-29 18:17:29 +01:00
|
|
|
ret = modlib_findsymtab(loadinfo);
|
2015-12-10 16:53:31 +01:00
|
|
|
if (ret < 0)
|
|
|
|
{
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Process relocations in every allocated section */
|
|
|
|
|
|
|
|
for (i = 1; i < loadinfo->ehdr.e_shnum; i++)
|
|
|
|
{
|
|
|
|
/* Get the index to the relocation section */
|
|
|
|
|
|
|
|
int infosec = loadinfo->shdr[i].sh_info;
|
|
|
|
if (infosec >= loadinfo->ehdr.e_shnum)
|
|
|
|
{
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2022-09-26 08:22:03 +02:00
|
|
|
if (loadinfo->ehdr.e_type == ET_DYN)
|
2015-12-10 16:53:31 +01:00
|
|
|
{
|
2023-09-04 02:37:48 +02:00
|
|
|
modp->dynamic = 1;
|
2022-09-26 08:22:03 +02:00
|
|
|
switch (loadinfo->shdr[i].sh_type)
|
|
|
|
{
|
2023-09-15 20:59:06 +02:00
|
|
|
case SHT_DYNAMIC:
|
|
|
|
ret = modlib_relocatedyn(modp, loadinfo, i);
|
|
|
|
break;
|
|
|
|
case SHT_DYNSYM:
|
|
|
|
loadinfo->dsymtabidx = i;
|
|
|
|
break;
|
|
|
|
case SHT_INIT_ARRAY:
|
|
|
|
loadinfo->initarr = loadinfo->shdr[i].sh_addr -
|
|
|
|
loadinfo->datasec +
|
|
|
|
loadinfo->datastart;
|
|
|
|
loadinfo->ninit = loadinfo->shdr[i].sh_size /
|
|
|
|
sizeof(uintptr_t);
|
|
|
|
break;
|
|
|
|
case SHT_FINI_ARRAY:
|
|
|
|
loadinfo->finiarr = loadinfo->shdr[i].sh_addr -
|
|
|
|
loadinfo->datasec +
|
|
|
|
loadinfo->datastart;
|
|
|
|
loadinfo->nfini = loadinfo->shdr[i].sh_size /
|
|
|
|
sizeof(uintptr_t);
|
|
|
|
break;
|
|
|
|
case SHT_PREINIT_ARRAY:
|
|
|
|
loadinfo->preiarr = loadinfo->shdr[i].sh_addr -
|
|
|
|
loadinfo->datasec +
|
|
|
|
loadinfo->datastart;
|
|
|
|
loadinfo->nprei = loadinfo->shdr[i].sh_size /
|
|
|
|
sizeof(uintptr_t);
|
|
|
|
break;
|
2022-09-26 08:22:03 +02:00
|
|
|
}
|
2015-12-10 16:53:31 +01:00
|
|
|
}
|
2022-09-26 08:22:03 +02:00
|
|
|
else
|
|
|
|
{
|
2023-09-04 02:37:48 +02:00
|
|
|
modp->dynamic = 0;
|
|
|
|
|
|
|
|
/* Make sure that the section is allocated. We can't
|
|
|
|
* relocate sections that were not loaded into memory.
|
2022-09-26 08:22:03 +02:00
|
|
|
*/
|
2015-12-10 16:53:31 +01:00
|
|
|
|
2023-07-24 00:45:16 +02:00
|
|
|
if ((loadinfo->shdr[infosec].sh_flags & SHF_ALLOC) == 0)
|
2022-09-26 08:22:03 +02:00
|
|
|
{
|
2023-09-15 20:59:06 +02:00
|
|
|
continue;
|
2022-09-26 08:22:03 +02:00
|
|
|
}
|
2015-12-10 16:53:31 +01:00
|
|
|
|
2022-09-26 08:22:03 +02:00
|
|
|
/* Process the relocations by type */
|
|
|
|
|
|
|
|
switch (loadinfo->shdr[i].sh_type)
|
|
|
|
{
|
2023-09-15 20:59:06 +02:00
|
|
|
case SHT_REL:
|
2023-07-02 18:11:02 +02:00
|
|
|
ret = modlib_relocate(modp, loadinfo, i);
|
|
|
|
break;
|
2023-09-15 20:59:06 +02:00
|
|
|
case SHT_RELA:
|
2023-07-02 18:11:02 +02:00
|
|
|
ret = modlib_relocateadd(modp, loadinfo, i);
|
|
|
|
break;
|
2022-09-26 08:22:03 +02:00
|
|
|
}
|
2015-12-10 16:53:31 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
if (ret < 0)
|
|
|
|
{
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Ensure that the I and D caches are coherent before starting the newly
|
|
|
|
* loaded module by cleaning the D cache (i.e., flushing the D cache
|
|
|
|
* contents to memory and invalidating the I cache).
|
|
|
|
*/
|
|
|
|
|
|
|
|
up_coherent_dcache(loadinfo->textalloc, loadinfo->textsize);
|
2015-12-12 16:38:06 +01:00
|
|
|
up_coherent_dcache(loadinfo->datastart, loadinfo->datasize);
|
2015-12-10 16:53:31 +01:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|