2011-12-14 15:47:42 +01:00
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/************************************************************************************
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2013-02-09 17:39:59 +01:00
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* arch/arm/src/stm32/stm32_rtcc.c
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2011-12-14 15:47:42 +01:00
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*
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2017-06-14 23:32:54 +02:00
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* Copyright (C) 2012-2017 Gregory Nutt. All rights reserved.
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2011-12-14 15:47:42 +01:00
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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2015-02-21 21:53:33 +01:00
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#include <stdbool.h>
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2011-12-14 20:59:06 +01:00
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#include <time.h>
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#include <errno.h>
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2011-12-14 22:59:08 +01:00
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#include <debug.h>
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2011-12-14 20:59:06 +01:00
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2015-02-13 15:41:34 +01:00
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#include <nuttx/arch.h>
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#include <nuttx/irq.h>
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2011-12-14 15:47:42 +01:00
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#include <arch/board/board.h>
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#include "up_arch.h"
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2015-01-27 16:20:42 +01:00
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#include "stm32_rcc.h"
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#include "stm32_pwr.h"
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2015-10-01 19:09:39 +02:00
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#include "stm32_exti.h"
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2011-12-14 15:47:42 +01:00
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#include "stm32_rtc.h"
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#ifdef CONFIG_RTC
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Configuration ********************************************************************/
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/* This RTC implementation supports only date/time RTC hardware */
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#ifndef CONFIG_RTC_DATETIME
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# error "CONFIG_RTC_DATETIME must be set to use this driver"
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#endif
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2011-12-14 20:59:06 +01:00
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#ifdef CONFIG_RTC_HIRES
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2011-12-14 15:47:42 +01:00
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# error "CONFIG_RTC_HIRES must NOT be set with this driver"
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#endif
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2011-12-14 20:59:06 +01:00
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#ifndef CONFIG_STM32_PWR
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# error "CONFIG_STM32_PWR must selected to use this driver"
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#endif
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2015-01-27 16:20:42 +01:00
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#ifdef CONFIG_STM32_STM32L15XX
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# if defined(CONFIG_RTC_HSECLOCK)
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# error "RTC with HSE clock not yet implemented for STM32L15XXX"
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# elif defined(CONFIG_RTC_LSICLOCK)
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# error "RTC with LSI clock not yet implemented for STM32L15XXX"
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# endif
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#endif
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2011-12-14 20:12:00 +01:00
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/* Constants ************************************************************************/
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#define SYNCHRO_TIMEOUT (0x00020000)
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#define INITMODE_TIMEOUT (0x00010000)
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2015-03-29 23:34:48 +02:00
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/* Proxy definitions to make the same code work for all the STM32 series ************/
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#if defined(CONFIG_STM32_STM32L15XX)
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# define STM32_RCC_XXX STM32_RCC_CSR
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# define RCC_XXX_YYYRST RCC_CSR_RTCRST
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# define RCC_XXX_RTCEN RCC_CSR_RTCEN
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# define RCC_XXX_RTCSEL_MASK RCC_CSR_RTCSEL_MASK
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# define RCC_XXX_RTCSEL_LSE RCC_CSR_RTCSEL_LSE
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# define RCC_XXX_RTCSEL_LSI RCC_CSR_RTCSEL_LSI
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# define RCC_XXX_RTCSEL_HSE RCC_CSR_RTCSEL_HSE
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#else
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# define STM32_RCC_XXX STM32_RCC_BDCR
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# define RCC_XXX_YYYRST RCC_BDCR_BDRST
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# define RCC_XXX_RTCEN RCC_BDCR_RTCEN
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# define RCC_XXX_RTCSEL_MASK RCC_BDCR_RTCSEL_MASK
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# define RCC_XXX_RTCSEL_LSE RCC_BDCR_RTCSEL_LSE
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# define RCC_XXX_RTCSEL_LSI RCC_BDCR_RTCSEL_LSI
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# define RCC_XXX_RTCSEL_HSE RCC_BDCR_RTCSEL_HSE
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#endif
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2011-12-14 15:47:42 +01:00
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/************************************************************************************
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* Private Data
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************************************************************************************/
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/* Callback to use when the alarm expires */
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#ifdef CONFIG_RTC_ALARM
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static alarmcb_t g_alarmcb;
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#endif
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/* g_rtc_enabled is set true after the RTC has successfully initialized */
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volatile bool g_rtc_enabled = false;
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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2011-12-14 22:59:08 +01:00
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/************************************************************************************
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* Name: rtc_dumpregs
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*
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* Description:
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* Disable RTC write protection
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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2016-06-16 15:39:23 +02:00
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#ifdef CONFIG_DEBUG_RTC_INFO
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2011-12-14 22:59:08 +01:00
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static void rtc_dumpregs(FAR const char *msg)
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{
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2016-06-16 15:39:23 +02:00
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rtcinfo("%s:\n", msg);
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rtcinfo(" TR: %08x\n", getreg32(STM32_RTC_TR));
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rtcinfo(" DR: %08x\n", getreg32(STM32_RTC_DR));
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rtcinfo(" CR: %08x\n", getreg32(STM32_RTC_CR));
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rtcinfo(" ISR: %08x\n", getreg32(STM32_RTC_ISR));
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rtcinfo(" PRER: %08x\n", getreg32(STM32_RTC_PRER));
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rtcinfo(" WUTR: %08x\n", getreg32(STM32_RTC_WUTR));
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2013-02-09 17:39:59 +01:00
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#ifndef CONFIG_STM32_STM32F30XX
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2016-06-16 15:39:23 +02:00
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rtcinfo(" CALIBR: %08x\n", getreg32(STM32_RTC_CALIBR));
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2013-02-09 17:39:59 +01:00
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#endif
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2016-06-16 15:39:23 +02:00
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rtcinfo(" ALRMAR: %08x\n", getreg32(STM32_RTC_ALRMAR));
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rtcinfo(" ALRMBR: %08x\n", getreg32(STM32_RTC_ALRMBR));
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rtcinfo(" SHIFTR: %08x\n", getreg32(STM32_RTC_SHIFTR));
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rtcinfo(" TSTR: %08x\n", getreg32(STM32_RTC_TSTR));
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rtcinfo(" TSDR: %08x\n", getreg32(STM32_RTC_TSDR));
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rtcinfo(" TSSSR: %08x\n", getreg32(STM32_RTC_TSSSR));
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rtcinfo(" CALR: %08x\n", getreg32(STM32_RTC_CALR));
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rtcinfo(" TAFCR: %08x\n", getreg32(STM32_RTC_TAFCR));
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rtcinfo("ALRMASSR: %08x\n", getreg32(STM32_RTC_ALRMASSR));
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rtcinfo("ALRMBSSR: %08x\n", getreg32(STM32_RTC_ALRMBSSR));
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rtcinfo("MAGICREG: %08x\n", getreg32(RTC_MAGIC_REG));
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2011-12-14 22:59:08 +01:00
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}
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#else
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2011-12-19 20:24:09 +01:00
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# define rtc_dumpregs(msg)
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2011-12-14 22:59:08 +01:00
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#endif
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/************************************************************************************
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* Name: rtc_dumptime
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*
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* Description:
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* Disable RTC write protection
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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2016-06-16 15:39:23 +02:00
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#ifdef CONFIG_DEBUG_RTC_INFO
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2011-12-14 22:59:08 +01:00
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static void rtc_dumptime(FAR struct tm *tp, FAR const char *msg)
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{
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2016-06-16 15:39:23 +02:00
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rtcinfo("%s:\n", msg);
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rtcinfo(" tm_sec: %08x\n", tp->tm_sec);
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rtcinfo(" tm_min: %08x\n", tp->tm_min);
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rtcinfo(" tm_hour: %08x\n", tp->tm_hour);
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rtcinfo(" tm_mday: %08x\n", tp->tm_mday);
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rtcinfo(" tm_mon: %08x\n", tp->tm_mon);
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rtcinfo(" tm_year: %08x\n", tp->tm_year);
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2011-12-14 22:59:08 +01:00
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}
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#else
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# define rtc_dumptime(tp, msg)
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#endif
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2011-12-14 20:12:00 +01:00
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/************************************************************************************
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* Name: rtc_wprunlock
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*
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* Description:
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* Disable RTC write protection
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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static void rtc_wprunlock(void)
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{
|
2015-02-21 21:53:33 +01:00
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/* Enable write access to the backup domain (RTC registers, RTC backup data
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* registers and backup SRAM).
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*/
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2016-08-09 15:50:31 +02:00
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stm32_pwr_enablebkp(true);
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2015-02-21 21:53:33 +01:00
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2011-12-14 20:12:00 +01:00
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/* The following steps are required to unlock the write protection on all the
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* RTC registers (except for RTC_ISR[13:8], RTC_TAFCR, and RTC_BKPxR).
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*
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* 1. Write 0xCA into the RTC_WPR register.
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* 2. Write 0x53 into the RTC_WPR register.
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*
|
2015-03-29 23:34:48 +02:00
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* Writing a wrong key re-activates the write protection.
|
2011-12-14 20:12:00 +01:00
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*/
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putreg32(0xca, STM32_RTC_WPR);
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putreg32(0x53, STM32_RTC_WPR);
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}
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/************************************************************************************
|
2016-04-02 18:46:10 +02:00
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* Name: rtc_wprlock
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2011-12-14 20:12:00 +01:00
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*
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* Description:
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* Enable RTC write protection
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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static inline void rtc_wprlock(void)
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{
|
2015-03-29 23:34:48 +02:00
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/* Writing any wrong key re-activates the write protection. */
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2011-12-14 20:12:00 +01:00
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putreg32(0xff, STM32_RTC_WPR);
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2015-02-21 21:53:33 +01:00
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2015-03-29 23:34:48 +02:00
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/* Disable write access to the backup domain (RTC registers, RTC backup data
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* registers and backup SRAM).
|
2015-02-21 21:53:33 +01:00
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*/
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|
2016-08-09 15:50:31 +02:00
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stm32_pwr_enablebkp(false);
|
2011-12-14 20:12:00 +01:00
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}
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/************************************************************************************
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* Name: rtc_synchwait
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*
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* Description:
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* Waits until the RTC Time and Date registers (RTC_TR and RTC_DR) are
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* synchronized with RTC APB clock.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno on failure
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*
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************************************************************************************/
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static int rtc_synchwait(void)
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{
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volatile uint32_t timeout;
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uint32_t regval;
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int ret;
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/* Disable the write protection for RTC registers */
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rtc_wprunlock();
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/* Clear Registers synchronization flag (RSF) */
|
2013-02-09 17:39:59 +01:00
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|
2015-03-29 23:34:48 +02:00
|
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regval = getreg32(STM32_RTC_ISR);
|
2011-12-14 20:12:00 +01:00
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regval &= ~RTC_ISR_RSF;
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putreg32(regval, STM32_RTC_ISR);
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/* Now wait the registers to become synchronised */
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ret = -ETIMEDOUT;
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for (timeout = 0; timeout < SYNCHRO_TIMEOUT; timeout++)
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{
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regval = getreg32(STM32_RTC_ISR);
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if ((regval & RTC_ISR_RSF) != 0)
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{
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/* Synchronized */
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ret = OK;
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|
break;
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}
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}
|
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|
|
/* Re-enable the write protection for RTC registers */
|
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rtc_wprlock();
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|
|
return ret;
|
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}
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Name: rtc_enterinit
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Enter RTC initialization mode.
|
|
|
|
*
|
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|
|
* Input Parameters:
|
|
|
|
* None
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; a negated errno on failure
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
static int rtc_enterinit(void)
|
|
|
|
{
|
|
|
|
volatile uint32_t timeout;
|
|
|
|
uint32_t regval;
|
|
|
|
int ret;
|
2013-02-09 17:39:59 +01:00
|
|
|
|
2011-12-14 20:12:00 +01:00
|
|
|
/* Check if the Initialization mode is already set */
|
|
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|
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|
|
regval = getreg32(STM32_RTC_ISR);
|
|
|
|
|
|
|
|
ret = OK;
|
|
|
|
if ((regval & RTC_ISR_INITF) == 0)
|
2011-12-14 20:59:06 +01:00
|
|
|
{
|
|
|
|
/* Set the Initialization mode */
|
2011-12-14 20:12:00 +01:00
|
|
|
|
2011-12-14 20:59:06 +01:00
|
|
|
putreg32(RTC_ISR_INIT, STM32_RTC_ISR);
|
2013-02-09 17:39:59 +01:00
|
|
|
|
2011-12-14 20:59:06 +01:00
|
|
|
/* Wait until the RTC is in the INIT state (or a timeout occurs) */
|
2013-02-09 17:39:59 +01:00
|
|
|
|
2011-12-14 20:59:06 +01:00
|
|
|
ret = -ETIMEDOUT;
|
|
|
|
for (timeout = 0; timeout < INITMODE_TIMEOUT; timeout++)
|
|
|
|
{
|
|
|
|
regval = getreg32(STM32_RTC_ISR);
|
|
|
|
if ((regval & RTC_ISR_INITF) != 0)
|
|
|
|
{
|
|
|
|
ret = OK;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-02-09 17:39:59 +01:00
|
|
|
return ret;
|
2011-12-14 20:12:00 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Name: rtc_exitinit
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Exit RTC initialization mode.
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* None
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; a negated errno on failure
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
static void rtc_exitinit(void)
|
2013-02-09 17:39:59 +01:00
|
|
|
{
|
2011-12-14 20:12:00 +01:00
|
|
|
uint32_t regval;
|
|
|
|
|
|
|
|
regval = getreg32(STM32_RTC_ISR);
|
|
|
|
regval &= ~(RTC_ISR_INIT);
|
|
|
|
putreg32(regval, STM32_RTC_ISR);
|
|
|
|
}
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Name: rtc_bin2bcd
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Converts a 2 digit binary to BCD format
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* value - The byte to be converted.
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* The value in BCD representation
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
static uint32_t rtc_bin2bcd(int value)
|
|
|
|
{
|
|
|
|
uint32_t msbcd = 0;
|
2013-02-09 17:39:59 +01:00
|
|
|
|
2011-12-14 20:12:00 +01:00
|
|
|
while (value >= 10)
|
|
|
|
{
|
|
|
|
msbcd++;
|
|
|
|
value -= 10;
|
|
|
|
}
|
2013-02-09 17:39:59 +01:00
|
|
|
|
2011-12-14 20:12:00 +01:00
|
|
|
return (msbcd << 4) | value;
|
|
|
|
}
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Name: rtc_bin2bcd
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Convert from 2 digit BCD to binary.
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* value - The BCD value to be converted.
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* The value in binary representation
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
static int rtc_bcd2bin(uint32_t value)
|
|
|
|
{
|
|
|
|
uint32_t tens = (value >> 4) * 10;
|
|
|
|
return (int)(tens + (value & 0x0f));
|
|
|
|
}
|
2011-12-14 15:47:42 +01:00
|
|
|
|
|
|
|
/************************************************************************************
|
2011-12-14 20:12:00 +01:00
|
|
|
* Name: rtc_setup
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Performs first time configuration of the RTC. A special value written into
|
|
|
|
* back-up register 0 will prevent this function from being called on sub-sequent
|
|
|
|
* resets or power up.
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* None
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; a negated errno on failure
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
static int rtc_setup(void)
|
|
|
|
{
|
|
|
|
uint32_t regval;
|
|
|
|
int ret;
|
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
/* Disable the write protection for RTC registers */
|
2015-01-27 16:20:42 +01:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
rtc_wprunlock();
|
2015-01-02 13:32:40 +01:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
/* Set Initialization mode */
|
2011-12-14 20:12:00 +01:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
ret = rtc_enterinit();
|
2011-12-14 20:12:00 +01:00
|
|
|
if (ret == OK)
|
|
|
|
{
|
2015-03-29 23:34:48 +02:00
|
|
|
/* Set the 24 hour format by clearing the FMT bit in the RTC
|
|
|
|
* control register
|
|
|
|
*/
|
2011-12-14 20:12:00 +01:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
regval = getreg32(STM32_RTC_CR);
|
|
|
|
regval &= ~RTC_CR_FMT;
|
|
|
|
putreg32(regval, STM32_RTC_CR);
|
2011-12-14 20:12:00 +01:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
/* Configure RTC pre-scaler with the required values */
|
2015-01-02 13:32:40 +01:00
|
|
|
|
|
|
|
#ifdef CONFIG_RTC_HSECLOCK
|
2015-03-29 23:34:48 +02:00
|
|
|
/* For a 1 MHz clock this yields 0.9999360041 Hz on the second
|
|
|
|
* timer - which is pretty close.
|
|
|
|
*/
|
2011-12-14 20:12:00 +01:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
putreg32(((uint32_t)7182 << RTC_PRER_PREDIV_S_SHIFT) |
|
|
|
|
((uint32_t)0x7f << RTC_PRER_PREDIV_A_SHIFT),
|
|
|
|
STM32_RTC_PRER);
|
2015-01-02 13:32:40 +01:00
|
|
|
#else
|
2015-03-29 23:34:48 +02:00
|
|
|
/* Correct values for 32.768 KHz LSE clock and inaccurate LSI clock */
|
2015-01-02 13:32:40 +01:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
putreg32(((uint32_t)0xff << RTC_PRER_PREDIV_S_SHIFT) |
|
|
|
|
((uint32_t)0x7f << RTC_PRER_PREDIV_A_SHIFT),
|
|
|
|
STM32_RTC_PRER);
|
2015-01-02 13:32:40 +01:00
|
|
|
#endif
|
2011-12-14 20:12:00 +01:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
/* Exit RTC initialization mode */
|
2011-12-14 20:12:00 +01:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
rtc_exitinit();
|
|
|
|
}
|
2011-12-14 20:12:00 +01:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
/* Re-enable the write protection for RTC registers */
|
2011-12-14 20:12:00 +01:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
rtc_wprlock();
|
2014-05-28 22:09:58 +02:00
|
|
|
|
2011-12-14 20:12:00 +01:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Name: rtc_resume
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Called when the RTC was already initialized on a previous power cycle. This
|
|
|
|
* just brings the RTC back into full operation.
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* None
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; a negated errno on failure
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
static void rtc_resume(void)
|
2011-12-14 20:12:00 +01:00
|
|
|
{
|
2011-12-14 20:59:06 +01:00
|
|
|
#ifdef CONFIG_RTC_ALARM
|
2011-12-14 20:12:00 +01:00
|
|
|
uint32_t regval;
|
|
|
|
|
|
|
|
/* Clear the RTC alarm flags */
|
|
|
|
|
|
|
|
regval = getreg32(STM32_RTC_ISR);
|
2015-10-07 21:45:15 +02:00
|
|
|
regval &= ~(RTC_ISR_ALRAF | RTC_ISR_ALRBF);
|
2011-12-14 20:12:00 +01:00
|
|
|
putreg32(regval, STM32_RTC_ISR);
|
|
|
|
|
|
|
|
/* Clear the EXTI Line 17 Pending bit (Connected internally to RTC Alarm) */
|
|
|
|
|
|
|
|
putreg32((1 << 17), STM32_EXTI_PR);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/************************************************************************************
|
2016-04-02 18:46:10 +02:00
|
|
|
* Name: rtc_wkup_interrupt
|
2011-12-14 15:47:42 +01:00
|
|
|
*
|
|
|
|
* Description:
|
2016-04-02 18:46:10 +02:00
|
|
|
* RTC WKUP interrupt service routine through the EXTI line
|
2011-12-14 15:47:42 +01:00
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* irq - The IRQ number that generated the interrupt
|
|
|
|
* context - Architecture specific register save information.
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; A negated errno value on failure.
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
2015-09-01 15:52:32 +02:00
|
|
|
#ifdef CONFIG_RTC_ALARM
|
2016-04-02 18:46:10 +02:00
|
|
|
static int rtc_wkup_interrupt(int irq, void *context)
|
2011-12-14 15:47:42 +01:00
|
|
|
{
|
|
|
|
#warning "Missing logic"
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Public Functions
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
/************************************************************************************
|
2015-11-20 15:27:04 +01:00
|
|
|
* Name: up_rtc_initialize
|
2011-12-14 15:47:42 +01:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Initialize the hardware RTC per the selected configuration. This function is
|
|
|
|
* called once during the OS initialization sequence
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* None
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; a negated errno on failure
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
2015-11-20 15:27:04 +01:00
|
|
|
int up_rtc_initialize(void)
|
2011-12-14 15:47:42 +01:00
|
|
|
{
|
2015-09-08 17:18:59 +02:00
|
|
|
uint32_t regval;
|
|
|
|
uint32_t tr_bkp;
|
|
|
|
uint32_t dr_bkp;
|
2011-12-14 20:59:06 +01:00
|
|
|
int ret;
|
2014-05-27 15:10:53 +02:00
|
|
|
int maxretry = 10;
|
|
|
|
int nretry = 0;
|
2011-12-14 20:12:00 +01:00
|
|
|
|
|
|
|
/* Clocking for the PWR block must be provided. However, this is done
|
|
|
|
* unconditionally in stm32f40xxx_rcc.c on power up. This done unconditionally
|
|
|
|
* because the PWR block is also needed to set the internal voltage regulator for
|
|
|
|
* maximum performance.
|
|
|
|
*/
|
|
|
|
|
2015-01-02 13:32:40 +01:00
|
|
|
rtc_dumpregs("On reset");
|
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
/* Select the clock source */
|
|
|
|
/* Save the token before losing it when resetting */
|
2011-12-14 15:47:42 +01:00
|
|
|
|
2015-04-07 00:26:59 +02:00
|
|
|
regval = getreg32(RTC_MAGIC_REG);
|
2011-12-14 20:12:00 +01:00
|
|
|
|
2016-08-09 15:50:31 +02:00
|
|
|
stm32_pwr_enablebkp(true);
|
2015-03-29 23:34:48 +02:00
|
|
|
|
2017-04-06 17:53:11 +02:00
|
|
|
if (regval != RTC_MAGIC && regval != RTC_MAGIC_TIME_SET)
|
2011-12-14 20:12:00 +01:00
|
|
|
{
|
2015-03-29 23:34:48 +02:00
|
|
|
/* Some boards do not have the external 32khz oscillator installed, for those
|
|
|
|
* boards we must fallback to the crummy internal RC clock or the external high
|
|
|
|
* rate clock
|
|
|
|
*/
|
2014-05-27 15:10:53 +02:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
#ifdef CONFIG_RTC_HSECLOCK
|
|
|
|
/* Use the HSE clock as the input to the RTC block */
|
|
|
|
|
|
|
|
modifyreg32(STM32_RCC_XXX, RCC_XXX_RTCSEL_MASK, RCC_XXX_RTCSEL_HSE);
|
2014-05-27 15:10:53 +02:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
#elif defined(CONFIG_RTC_LSICLOCK)
|
|
|
|
/* Use the LSI clock as the input to the RTC block */
|
2011-12-14 22:59:08 +01:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
modifyreg32(STM32_RCC_XXX, RCC_XXX_RTCSEL_MASK, RCC_XXX_RTCSEL_LSI);
|
2015-02-21 21:53:33 +01:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
#elif defined(CONFIG_RTC_LSECLOCK)
|
|
|
|
/* Use the LSE clock as the input to the RTC block */
|
2015-02-21 21:53:33 +01:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
modifyreg32(STM32_RCC_XXX, RCC_XXX_RTCSEL_MASK, RCC_XXX_RTCSEL_LSE);
|
2014-05-27 15:10:53 +02:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
#endif
|
|
|
|
/* Enable the RTC Clock by setting the RTCEN bit in the RCC register */
|
|
|
|
|
|
|
|
modifyreg32(STM32_RCC_XXX, 0, RCC_XXX_RTCEN);
|
|
|
|
}
|
|
|
|
else /* The RTC is already in use: check if the clock source is changed */
|
|
|
|
{
|
2015-09-08 17:18:59 +02:00
|
|
|
#if defined(CONFIG_RTC_HSECLOCK) || defined(CONFIG_RTC_LSICLOCK) || \
|
|
|
|
defined(CONFIG_RTC_LSECLOCK)
|
|
|
|
|
|
|
|
uint32_t clksrc = getreg32(STM32_RCC_XXX);
|
2015-03-29 23:34:48 +02:00
|
|
|
|
|
|
|
#if defined(CONFIG_RTC_HSECLOCK)
|
|
|
|
if ((clksrc & RCC_XXX_RTCSEL_MASK) != RCC_XXX_RTCSEL_HSE)
|
|
|
|
#elif defined(CONFIG_RTC_LSICLOCK)
|
|
|
|
if ((clksrc & RCC_XXX_RTCSEL_MASK) != RCC_XXX_RTCSEL_LSI)
|
|
|
|
#elif defined(CONFIG_RTC_LSECLOCK)
|
|
|
|
if ((clksrc & RCC_XXX_RTCSEL_MASK) != RCC_XXX_RTCSEL_LSE)
|
2015-09-08 17:18:59 +02:00
|
|
|
#endif
|
2015-03-29 23:34:48 +02:00
|
|
|
#endif
|
2014-05-27 15:10:53 +02:00
|
|
|
{
|
2015-03-29 23:34:48 +02:00
|
|
|
tr_bkp = getreg32(STM32_RTC_TR);
|
|
|
|
dr_bkp = getreg32(STM32_RTC_DR);
|
|
|
|
modifyreg32(STM32_RCC_XXX, 0, RCC_XXX_YYYRST);
|
|
|
|
modifyreg32(STM32_RCC_XXX, RCC_XXX_YYYRST, 0);
|
|
|
|
|
|
|
|
#if defined(CONFIG_RTC_HSECLOCK)
|
2015-10-07 21:45:15 +02:00
|
|
|
/* Change to the new clock as the input to the RTC block */
|
2015-03-29 23:34:48 +02:00
|
|
|
|
2015-10-07 21:45:15 +02:00
|
|
|
modifyreg32(STM32_RCC_XXX, RCC_XXX_RTCSEL_MASK, RCC_XXX_RTCSEL_HSE);
|
2015-03-29 23:34:48 +02:00
|
|
|
|
|
|
|
#elif defined(CONFIG_RTC_LSICLOCK)
|
2015-10-07 21:45:15 +02:00
|
|
|
modifyreg32(STM32_RCC_XXX, RCC_XXX_RTCSEL_MASK, RCC_XXX_RTCSEL_LSI);
|
2015-03-29 23:34:48 +02:00
|
|
|
|
|
|
|
#elif defined(CONFIG_RTC_LSECLOCK)
|
2015-10-07 21:45:15 +02:00
|
|
|
modifyreg32(STM32_RCC_XXX, RCC_XXX_RTCSEL_MASK, RCC_XXX_RTCSEL_LSE);
|
2015-03-29 23:34:48 +02:00
|
|
|
#endif
|
|
|
|
|
2015-10-07 21:45:15 +02:00
|
|
|
putreg32(tr_bkp, STM32_RTC_TR);
|
|
|
|
putreg32(dr_bkp, STM32_RTC_DR);
|
2011-12-14 22:59:08 +01:00
|
|
|
|
2015-10-07 21:45:15 +02:00
|
|
|
/* Remember that the RTC is initialized */
|
2014-05-27 15:10:53 +02:00
|
|
|
|
2015-10-07 21:45:15 +02:00
|
|
|
putreg32(RTC_MAGIC, RTC_MAGIC_REG);
|
2015-03-29 23:34:48 +02:00
|
|
|
|
2015-10-07 21:45:15 +02:00
|
|
|
/* Enable the RTC Clock by setting the RTCEN bit in the RCC register */
|
2015-03-29 23:34:48 +02:00
|
|
|
|
2015-10-07 21:45:15 +02:00
|
|
|
modifyreg32(STM32_RCC_XXX, 0, RCC_XXX_RTCEN);
|
2014-05-27 15:10:53 +02:00
|
|
|
}
|
2015-03-29 23:34:48 +02:00
|
|
|
}
|
2014-05-27 15:10:53 +02:00
|
|
|
|
2016-08-09 15:50:31 +02:00
|
|
|
stm32_pwr_enablebkp(false);
|
2015-03-29 23:34:48 +02:00
|
|
|
|
|
|
|
/* Loop, attempting to initialize/resume the RTC. This loop is necessary
|
|
|
|
* because it seems that occasionally it takes longer to initialize the RTC
|
|
|
|
* (the actual failure is in rtc_synchwait()).
|
|
|
|
*/
|
|
|
|
|
|
|
|
do
|
|
|
|
{
|
|
|
|
/* Wait for the RTC Time and Date registers to be synchronized with RTC APB
|
|
|
|
* clock.
|
|
|
|
*/
|
|
|
|
|
|
|
|
ret = rtc_synchwait();
|
|
|
|
|
|
|
|
/* Check that rtc_syncwait() returned successfully */
|
2014-05-27 15:10:53 +02:00
|
|
|
|
|
|
|
switch (ret)
|
|
|
|
{
|
|
|
|
case OK:
|
|
|
|
{
|
2016-06-20 19:59:15 +02:00
|
|
|
rtcinfo("rtc_syncwait() okay\n");
|
2014-05-27 15:10:53 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
default:
|
|
|
|
{
|
2016-06-20 19:59:15 +02:00
|
|
|
rtcerr("ERROR: rtc_syncwait() failed (%d)\n", ret);
|
2014-05-27 15:10:53 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
2011-12-14 20:12:00 +01:00
|
|
|
}
|
2014-05-27 15:10:53 +02:00
|
|
|
while (ret != OK && ++nretry < maxretry);
|
2011-12-14 20:12:00 +01:00
|
|
|
|
2015-03-29 23:34:48 +02:00
|
|
|
/* Check if the one-time initialization of the RTC has already been
|
|
|
|
* performed. We can determine this by checking if the magic number
|
|
|
|
* has been writing to to back-up date register DR0.
|
|
|
|
*/
|
|
|
|
|
2017-04-06 17:53:11 +02:00
|
|
|
if (regval != RTC_MAGIC && regval != RTC_MAGIC_TIME_SET)
|
2015-03-29 23:34:48 +02:00
|
|
|
{
|
2016-06-20 19:59:15 +02:00
|
|
|
rtcinfo("Do setup\n");
|
2015-03-29 23:34:48 +02:00
|
|
|
|
|
|
|
/* Perform the one-time setup of the LSE clocking to the RTC */
|
|
|
|
|
|
|
|
ret = rtc_setup();
|
|
|
|
|
|
|
|
/* Enable write access to the backup domain (RTC registers, RTC
|
|
|
|
* backup data registers and backup SRAM).
|
|
|
|
*/
|
|
|
|
|
2016-08-09 15:50:31 +02:00
|
|
|
stm32_pwr_enablebkp(true);
|
2015-03-29 23:34:48 +02:00
|
|
|
|
|
|
|
/* Remember that the RTC is initialized */
|
|
|
|
|
2015-04-07 00:26:59 +02:00
|
|
|
putreg32(RTC_MAGIC, RTC_MAGIC_REG);
|
2016-08-09 19:33:47 +02:00
|
|
|
|
|
|
|
/* Disable write access to the backup domain (RTC registers, RTC
|
|
|
|
* backup data registers and backup SRAM).
|
|
|
|
*/
|
|
|
|
|
|
|
|
stm32_pwr_enablebkp(false);
|
2015-03-29 23:34:48 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2016-06-20 19:59:15 +02:00
|
|
|
rtcinfo("Do resume\n");
|
2015-03-29 23:34:48 +02:00
|
|
|
|
|
|
|
/* RTC already set-up, just resume normal operation */
|
|
|
|
|
|
|
|
rtc_resume();
|
|
|
|
rtc_dumpregs("Did resume");
|
|
|
|
}
|
|
|
|
|
2014-05-27 15:10:53 +02:00
|
|
|
if (ret != OK && nretry > 0)
|
|
|
|
{
|
2016-06-20 19:59:15 +02:00
|
|
|
rtcinfo("setup/resume ran %d times and failed with %d\n",
|
|
|
|
nretry, ret);
|
2014-05-27 15:10:53 +02:00
|
|
|
return -ETIMEDOUT;
|
2011-12-14 20:12:00 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Configure RTC interrupt to catch alarm interrupts. All RTC interrupts are
|
|
|
|
* connected to the EXTI controller. To enable the RTC Alarm interrupt, the
|
|
|
|
* following sequence is required:
|
|
|
|
*
|
|
|
|
* 1. Configure and enable the EXTI Line 17 in interrupt mode and select the
|
|
|
|
* rising edge sensitivity.
|
|
|
|
* 2. Configure and enable the RTC_Alarm IRQ channel in the NVIC.
|
|
|
|
* 3. Configure the RTC to generate RTC alarms (Alarm A or Alarm B).
|
|
|
|
*/
|
2011-12-14 15:47:42 +01:00
|
|
|
|
2017-06-14 22:36:40 +02:00
|
|
|
g_rtc_enabled = true;
|
|
|
|
rtc_dumpregs("After Initialization");
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Name: stm32_rtc_irqinitialize
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Initialize IRQs for RTC, not possible during up_rtc_initialize because
|
|
|
|
* up_irqinitialize is called later.
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* None
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; a negated errno on failure
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
int stm32_rtc_irqinitialize(void)
|
|
|
|
{
|
2011-12-14 15:47:42 +01:00
|
|
|
#ifdef CONFIG_RTC_ALARM
|
2011-12-14 22:59:08 +01:00
|
|
|
# warning "Missing EXTI setup logic"
|
2011-12-14 20:12:00 +01:00
|
|
|
|
2017-06-14 23:32:54 +02:00
|
|
|
/* Attach the ALARM interrupt handler */
|
2011-12-14 20:12:00 +01:00
|
|
|
|
2017-02-27 13:27:56 +01:00
|
|
|
irq_attach(STM32_IRQ_RTC_WKUP, rtc_interrupt, NULL);
|
2012-07-25 15:35:36 +02:00
|
|
|
up_enable_irq(STM32_IRQ_RTC_WKUP);
|
2011-12-14 15:47:42 +01:00
|
|
|
#endif
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/************************************************************************************
|
2015-02-16 14:18:09 +01:00
|
|
|
* Name: stm32_rtc_getdatetime_with_subseconds
|
2011-12-14 15:47:42 +01:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Get the current date and time from the date/time RTC. This interface
|
|
|
|
* is only supported by the date/time RTC hardware implementation.
|
|
|
|
* It is used to replace the system timer. It is only used by the RTOS during
|
2013-12-05 17:37:55 +01:00
|
|
|
* initialization to set up the system time when CONFIG_RTC and CONFIG_RTC_DATETIME
|
2011-12-14 15:47:42 +01:00
|
|
|
* are selected (and CONFIG_RTC_HIRES is not).
|
|
|
|
*
|
|
|
|
* NOTE: Some date/time RTC hardware is capability of sub-second accuracy. That
|
2015-02-16 14:18:09 +01:00
|
|
|
* sub-second accuracy is returned through 'nsec'.
|
2011-12-14 15:47:42 +01:00
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* tp - The location to return the high resolution time value.
|
2015-02-16 14:18:09 +01:00
|
|
|
* nsec - The location to return the subsecond time value.
|
2011-12-14 15:47:42 +01:00
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; a negated errno on failure
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
2015-02-16 14:18:09 +01:00
|
|
|
#ifdef CONFIG_STM32_HAVE_RTC_SUBSECONDS
|
|
|
|
int stm32_rtc_getdatetime_with_subseconds(FAR struct tm *tp, FAR long *nsec)
|
|
|
|
#else
|
2011-12-14 20:59:06 +01:00
|
|
|
int up_rtc_getdatetime(FAR struct tm *tp)
|
2015-02-16 14:18:09 +01:00
|
|
|
#endif
|
2011-12-14 15:47:42 +01:00
|
|
|
{
|
2015-02-16 14:18:09 +01:00
|
|
|
#ifdef CONFIG_STM32_HAVE_RTC_SUBSECONDS
|
|
|
|
uint32_t ssr;
|
|
|
|
#endif
|
2011-12-14 20:12:00 +01:00
|
|
|
uint32_t dr;
|
|
|
|
uint32_t tr;
|
|
|
|
uint32_t tmp;
|
|
|
|
|
|
|
|
/* Sample the data time registers. There is a race condition here... If we sample
|
|
|
|
* the time just before midnight on December 31, the date could be wrong because
|
|
|
|
* the day rolled over while were sampling.
|
|
|
|
*/
|
|
|
|
|
|
|
|
do
|
|
|
|
{
|
|
|
|
dr = getreg32(STM32_RTC_DR);
|
|
|
|
tr = getreg32(STM32_RTC_TR);
|
2015-02-16 14:18:09 +01:00
|
|
|
#ifdef CONFIG_STM32_HAVE_RTC_SUBSECONDS
|
|
|
|
ssr = getreg32(STM32_RTC_SSR);
|
|
|
|
#endif
|
2011-12-14 20:12:00 +01:00
|
|
|
tmp = getreg32(STM32_RTC_DR);
|
|
|
|
}
|
|
|
|
while (tmp != dr);
|
|
|
|
|
2011-12-14 22:59:08 +01:00
|
|
|
rtc_dumpregs("Reading Time");
|
|
|
|
|
2011-12-14 20:12:00 +01:00
|
|
|
/* Convert the RTC time to fields in struct tm format. All of the STM32
|
|
|
|
* All of the ranges of values correspond between struct tm and the time
|
|
|
|
* register.
|
|
|
|
*/
|
|
|
|
|
2015-10-07 21:45:15 +02:00
|
|
|
tmp = (tr & (RTC_TR_SU_MASK | RTC_TR_ST_MASK)) >> RTC_TR_SU_SHIFT;
|
2011-12-14 20:12:00 +01:00
|
|
|
tp->tm_sec = rtc_bcd2bin(tmp);
|
|
|
|
|
2015-10-07 21:45:15 +02:00
|
|
|
tmp = (tr & (RTC_TR_MNU_MASK | RTC_TR_MNT_MASK)) >> RTC_TR_MNU_SHIFT;
|
2011-12-14 20:12:00 +01:00
|
|
|
tp->tm_min = rtc_bcd2bin(tmp);
|
|
|
|
|
2015-10-07 21:45:15 +02:00
|
|
|
tmp = (tr & (RTC_TR_HU_MASK | RTC_TR_HT_MASK)) >> RTC_TR_HU_SHIFT;
|
2011-12-14 20:12:00 +01:00
|
|
|
tp->tm_hour = rtc_bcd2bin(tmp);
|
|
|
|
|
|
|
|
/* Now convert the RTC date to fields in struct tm format:
|
|
|
|
* Days: 1-31 match in both cases.
|
|
|
|
* Month: STM32 is 1-12, struct tm is 0-11.
|
|
|
|
* Years: STM32 is 00-99, struct tm is years since 1900.
|
2015-04-08 14:56:43 +02:00
|
|
|
* WeekDay: STM32 is 1 = Mon - 7 = Sun
|
2011-12-14 20:12:00 +01:00
|
|
|
*
|
|
|
|
* Issue: I am not sure what the STM32 years mean. Are these the
|
|
|
|
* years 2000-2099? I'll assume so.
|
|
|
|
*/
|
|
|
|
|
2015-10-07 21:45:15 +02:00
|
|
|
tmp = (dr & (RTC_DR_DU_MASK | RTC_DR_DT_MASK)) >> RTC_DR_DU_SHIFT;
|
2011-12-14 20:12:00 +01:00
|
|
|
tp->tm_mday = rtc_bcd2bin(tmp);
|
|
|
|
|
2015-10-07 21:45:15 +02:00
|
|
|
tmp = (dr & (RTC_DR_MU_MASK | RTC_DR_MT)) >> RTC_DR_MU_SHIFT;
|
2011-12-14 20:12:00 +01:00
|
|
|
tp->tm_mon = rtc_bcd2bin(tmp) - 1;
|
|
|
|
|
2015-10-07 21:45:15 +02:00
|
|
|
tmp = (dr & (RTC_DR_YU_MASK | RTC_DR_YT_MASK)) >> RTC_DR_YU_SHIFT;
|
2011-12-14 20:12:00 +01:00
|
|
|
tp->tm_year = rtc_bcd2bin(tmp) + 100;
|
2011-12-14 22:59:08 +01:00
|
|
|
|
2015-11-25 19:51:07 +01:00
|
|
|
#if defined(CONFIG_LIBC_LOCALTIME) || defined(CONFIG_TIME_EXTENDED)
|
2015-04-08 14:56:43 +02:00
|
|
|
tmp = (dr & RTC_DR_WDU_MASK) >> RTC_DR_WDU_SHIFT;
|
|
|
|
tp->tm_wday = tmp % 7;
|
|
|
|
tp->tm_yday = tp->tm_mday + clock_daysbeforemonth(tp->tm_mon, clock_isleapyear(tp->tm_year + 1900));
|
|
|
|
tp->tm_isdst = 0
|
|
|
|
#endif
|
|
|
|
|
2015-02-16 14:18:09 +01:00
|
|
|
#ifdef CONFIG_STM32_HAVE_RTC_SUBSECONDS
|
|
|
|
/* Return RTC sub-seconds if no configured and if a non-NULL value
|
|
|
|
* of nsec has been provided to receive the sub-second value.
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (nsec)
|
|
|
|
{
|
|
|
|
uint32_t prediv_s;
|
|
|
|
uint32_t usecs;
|
|
|
|
|
2015-02-16 17:41:12 +01:00
|
|
|
prediv_s = getreg32(STM32_RTC_PRER) & RTC_PRER_PREDIV_S_MASK;
|
2015-02-16 14:18:09 +01:00
|
|
|
prediv_s >>= RTC_PRER_PREDIV_S_SHIFT;
|
|
|
|
|
|
|
|
ssr &= RTC_SSR_MASK;
|
|
|
|
|
|
|
|
/* Maximum prediv_s is 0x7fff, thus we can multiply by 100000 and
|
2015-02-16 17:41:12 +01:00
|
|
|
* still fit 32-bit unsigned integer.
|
|
|
|
*/
|
2015-02-16 14:18:09 +01:00
|
|
|
|
|
|
|
usecs = (((prediv_s - ssr) * 100000) / (prediv_s + 1)) * 10;
|
|
|
|
*nsec = usecs * 1000;
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_STM32_HAVE_RTC_SUBSECONDS */
|
|
|
|
|
2011-12-14 22:59:08 +01:00
|
|
|
rtc_dumptime(tp, "Returning");
|
2011-12-14 15:47:42 +01:00
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
2015-02-16 14:18:09 +01:00
|
|
|
/************************************************************************************
|
|
|
|
* Name: up_rtc_getdatetime
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Get the current date and time from the date/time RTC. This interface
|
|
|
|
* is only supported by the date/time RTC hardware implementation.
|
|
|
|
* It is used to replace the system timer. It is only used by the RTOS during
|
|
|
|
* initialization to set up the system time when CONFIG_RTC and CONFIG_RTC_DATETIME
|
|
|
|
* are selected (and CONFIG_RTC_HIRES is not).
|
|
|
|
*
|
|
|
|
* NOTE: Some date/time RTC hardware is capability of sub-second accuracy. That
|
|
|
|
* sub-second accuracy is lost in this interface. However, since the system time
|
|
|
|
* is reinitialized on each power-up/reset, there will be no timing inaccuracy in
|
|
|
|
* the long run.
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* tp - The location to return the high resolution time value.
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; a negated errno on failure
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
#ifdef CONFIG_STM32_HAVE_RTC_SUBSECONDS
|
|
|
|
int up_rtc_getdatetime(FAR struct tm *tp)
|
|
|
|
{
|
|
|
|
return stm32_rtc_getdatetime_with_subseconds(tp, NULL);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2017-04-21 16:45:57 +02:00
|
|
|
/************************************************************************************
|
|
|
|
* Name: up_rtc_getdatetime_with_subseconds
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Get the current date and time from the date/time RTC. This interface
|
|
|
|
* is only supported by the date/time RTC hardware implementation.
|
|
|
|
* It is used to replace the system timer. It is only used by the RTOS during
|
|
|
|
* initialization to set up the system time when CONFIG_RTC and CONFIG_RTC_DATETIME
|
|
|
|
* are selected (and CONFIG_RTC_HIRES is not).
|
|
|
|
*
|
|
|
|
* NOTE: This interface exposes sub-second accuracy capability of RTC hardware.
|
|
|
|
* This interface allow maintaining timing accuracy when system time needs constant
|
|
|
|
* resynchronization with RTC, for example on MCU with low-power state that
|
|
|
|
* stop system timer.
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* tp - The location to return the high resolution time value.
|
|
|
|
* nsec - The location to return the subsecond time value.
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; a negated errno on failure
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
#ifdef CONFIG_ARCH_HAVE_RTC_SUBSECONDS
|
|
|
|
# ifndef CONFIG_STM32_HAVE_RTC_SUBSECONDS
|
|
|
|
# error "Invalid config, enable CONFIG_STM32_HAVE_RTC_SUBSECONDS."
|
|
|
|
# endif
|
|
|
|
int up_rtc_getdatetime_with_subseconds(FAR struct tm *tp, FAR long *nsec)
|
|
|
|
{
|
|
|
|
return stm32_rtc_getdatetime_with_subseconds(tp, nsec);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2011-12-14 15:47:42 +01:00
|
|
|
/************************************************************************************
|
2015-02-13 19:56:58 +01:00
|
|
|
* Name: stm32_rtc_setdatetime
|
2011-12-14 15:47:42 +01:00
|
|
|
*
|
|
|
|
* Description:
|
2015-02-13 19:56:58 +01:00
|
|
|
* Set the RTC to the provided time. RTC implementations which provide
|
|
|
|
* up_rtc_getdatetime() (CONFIG_RTC_DATETIME is selected) should provide this
|
|
|
|
* function.
|
2011-12-14 15:47:42 +01:00
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* tp - the time to use
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; a negated errno on failure
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
2015-02-13 19:56:58 +01:00
|
|
|
int stm32_rtc_setdatetime(FAR const struct tm *tp)
|
2011-12-14 15:47:42 +01:00
|
|
|
{
|
2011-12-14 20:12:00 +01:00
|
|
|
uint32_t tr;
|
|
|
|
uint32_t dr;
|
|
|
|
int ret;
|
|
|
|
|
2015-02-13 19:56:58 +01:00
|
|
|
rtc_dumptime(tp, "Setting time");
|
2011-12-14 15:47:42 +01:00
|
|
|
|
|
|
|
/* Then write the broken out values to the RTC */
|
|
|
|
|
2011-12-14 20:12:00 +01:00
|
|
|
/* Convert the struct tm format to RTC time register fields. All of the STM32
|
|
|
|
* All of the ranges of values correspond between struct tm and the time
|
|
|
|
* register.
|
|
|
|
*/
|
|
|
|
|
2015-02-13 19:56:58 +01:00
|
|
|
tr = (rtc_bin2bcd(tp->tm_sec) << RTC_TR_SU_SHIFT) |
|
|
|
|
(rtc_bin2bcd(tp->tm_min) << RTC_TR_MNU_SHIFT) |
|
|
|
|
(rtc_bin2bcd(tp->tm_hour) << RTC_TR_HU_SHIFT);
|
2011-12-14 20:12:00 +01:00
|
|
|
tr &= ~RTC_TR_RESERVED_BITS;
|
|
|
|
|
|
|
|
/* Now convert the fields in struct tm format to the RTC date register fields:
|
|
|
|
* Days: 1-31 match in both cases.
|
|
|
|
* Month: STM32 is 1-12, struct tm is 0-11.
|
|
|
|
* Years: STM32 is 00-99, struct tm is years since 1900.
|
2015-04-08 14:56:43 +02:00
|
|
|
* WeekDay: STM32 is 1 = Mon - 7 = Sun
|
2011-12-14 20:12:00 +01:00
|
|
|
* Issue: I am not sure what the STM32 years mean. Are these the
|
|
|
|
* years 2000-2099? I'll assume so.
|
|
|
|
*/
|
|
|
|
|
2015-02-13 19:56:58 +01:00
|
|
|
dr = (rtc_bin2bcd(tp->tm_mday) << RTC_DR_DU_SHIFT) |
|
|
|
|
((rtc_bin2bcd(tp->tm_mon + 1)) << RTC_DR_MU_SHIFT) |
|
2015-11-25 19:51:07 +01:00
|
|
|
#if defined(CONFIG_LIBC_LOCALTIME) || defined(CONFIG_TIME_EXTENDED)
|
2015-04-08 14:56:43 +02:00
|
|
|
((tp->tm_wday == 0 ? 7 : (tp->tm_wday & 7)) << RTC_DR_WDU_SHIFT) |
|
|
|
|
#endif
|
2015-02-13 19:56:58 +01:00
|
|
|
((rtc_bin2bcd(tp->tm_year - 100)) << RTC_DR_YU_SHIFT);
|
2015-04-08 14:56:43 +02:00
|
|
|
|
2011-12-14 20:12:00 +01:00
|
|
|
dr &= ~RTC_DR_RESERVED_BITS;
|
|
|
|
|
|
|
|
/* Disable the write protection for RTC registers */
|
|
|
|
|
|
|
|
rtc_wprunlock();
|
|
|
|
|
|
|
|
/* Set Initialization mode */
|
|
|
|
|
2011-12-14 20:59:06 +01:00
|
|
|
ret = rtc_enterinit();
|
2011-12-14 20:12:00 +01:00
|
|
|
if (ret == OK)
|
|
|
|
{
|
|
|
|
/* Set the RTC TR and DR registers */
|
|
|
|
|
|
|
|
putreg32(tr, STM32_RTC_TR);
|
|
|
|
putreg32(dr, STM32_RTC_DR);
|
|
|
|
|
|
|
|
/* Exit Initialization mode and wait for the RTC Time and Date
|
|
|
|
* registers to be synchronized with RTC APB clock.
|
|
|
|
*/
|
|
|
|
|
2011-12-14 20:59:06 +01:00
|
|
|
rtc_exitinit();
|
2011-12-14 20:12:00 +01:00
|
|
|
ret = rtc_synchwait();
|
|
|
|
}
|
|
|
|
|
2017-04-06 17:53:11 +02:00
|
|
|
/* Remember that the RTC is initialized and had its time set. */
|
|
|
|
|
|
|
|
if (getreg32(RTC_MAGIC_REG) != RTC_MAGIC_TIME_SET)
|
|
|
|
{
|
|
|
|
stm32_pwr_enablebkp(true);
|
|
|
|
putreg32(RTC_MAGIC_TIME_SET, RTC_MAGIC_REG);
|
|
|
|
stm32_pwr_enablebkp(false);
|
|
|
|
}
|
|
|
|
|
2011-12-14 20:12:00 +01:00
|
|
|
/* Re-enable the write protection for RTC registers */
|
|
|
|
|
|
|
|
rtc_wprlock();
|
2011-12-14 22:59:08 +01:00
|
|
|
rtc_dumpregs("New time setting");
|
2011-12-14 20:12:00 +01:00
|
|
|
return ret;
|
2011-12-14 15:47:42 +01:00
|
|
|
}
|
|
|
|
|
2015-02-13 19:56:58 +01:00
|
|
|
/************************************************************************************
|
|
|
|
* Name: up_rtc_settime
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Set the RTC to the provided time. All RTC implementations must be able to
|
|
|
|
* set their time based on a standard timespec.
|
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* tp - the time to use
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; a negated errno on failure
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
int up_rtc_settime(FAR const struct timespec *tp)
|
|
|
|
{
|
|
|
|
FAR struct tm newtime;
|
|
|
|
|
|
|
|
/* Break out the time values (not that the time is set only to units of seconds) */
|
|
|
|
|
|
|
|
(void)gmtime_r(&tp->tv_sec, &newtime);
|
|
|
|
return stm32_rtc_setdatetime(&newtime);
|
|
|
|
}
|
|
|
|
|
2011-12-14 15:47:42 +01:00
|
|
|
/************************************************************************************
|
2015-02-13 15:41:34 +01:00
|
|
|
* Name: stm32_rtc_setalarm
|
2011-12-14 15:47:42 +01:00
|
|
|
*
|
|
|
|
* Description:
|
2011-12-14 20:12:00 +01:00
|
|
|
* Set up an alarm. Up to two alarms can be supported (ALARM A and ALARM B).
|
2011-12-14 15:47:42 +01:00
|
|
|
*
|
|
|
|
* Input Parameters:
|
|
|
|
* tp - the time to set the alarm
|
|
|
|
* callback - the function to call when the alarm expires.
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; a negated errno on failure
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
#ifdef CONFIG_RTC_ALARM
|
2015-02-13 15:41:34 +01:00
|
|
|
int stm32_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback)
|
2011-12-14 15:47:42 +01:00
|
|
|
{
|
|
|
|
int ret = -EBUSY;
|
|
|
|
|
|
|
|
/* Is there already something waiting on the ALARM? */
|
|
|
|
|
|
|
|
if (g_alarmcb == NULL)
|
|
|
|
{
|
|
|
|
/* No.. Save the callback function pointer */
|
|
|
|
|
|
|
|
g_alarmcb = callback;
|
|
|
|
|
|
|
|
/* Break out the time values */
|
|
|
|
#warning "Missing logic"
|
|
|
|
|
|
|
|
/* The set the alarm */
|
|
|
|
#warning "Missing logic"
|
|
|
|
|
|
|
|
ret = OK;
|
|
|
|
}
|
2015-02-13 19:56:58 +01:00
|
|
|
|
2011-12-14 15:47:42 +01:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#endif /* CONFIG_RTC */
|