2019-08-13 18:08:49 +02:00
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/****************************************************************************
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* boards/arm/lpc17xx_40xx/lpc4088-quickstart/src/lpc17_40_nandinitialize.c
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2019-07-11 18:50:00 +02:00
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* arch/arm/src/board/lpc17_40_nandinitialize.c
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2013-02-12 22:27:51 +01:00
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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2019-08-13 18:08:49 +02:00
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****************************************************************************/
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2013-02-12 22:27:51 +01:00
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2019-08-13 18:08:49 +02:00
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/****************************************************************************
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2013-02-12 22:27:51 +01:00
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* Included Files
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2019-08-13 18:08:49 +02:00
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****************************************************************************/
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2013-02-12 22:27:51 +01:00
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#include <nuttx/config.h>
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#include <debug.h>
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#include <arch/board/board.h>
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2020-05-01 03:20:29 +02:00
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#include "arm_arch.h"
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#include "arm_internal.h"
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2013-02-12 22:27:51 +01:00
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2019-07-11 18:50:00 +02:00
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#include "lpc4088-quickstart.h"
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2013-02-12 22:27:51 +01:00
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2019-07-11 18:50:00 +02:00
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#if defined(CONFIG_LPC17_40_SPIFI)
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2013-02-12 22:27:51 +01:00
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2019-08-13 18:08:49 +02:00
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/****************************************************************************
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2013-02-12 22:27:51 +01:00
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* Public Functions
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2019-08-13 18:08:49 +02:00
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****************************************************************************/
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2013-02-12 22:27:51 +01:00
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2019-08-13 18:08:49 +02:00
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/****************************************************************************
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2019-07-11 18:50:00 +02:00
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* Name: lpc4088_quickstart_nand_initialize
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2013-02-12 22:27:51 +01:00
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*
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* Description:
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* Initialize NAND FLASH
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*
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2019-08-13 18:08:49 +02:00
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****************************************************************************/
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2013-02-12 22:27:51 +01:00
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2019-07-11 18:50:00 +02:00
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void _lpc4088_quickstart_nand_initialize(void)
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2013-02-12 22:27:51 +01:00
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{
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uint32_t regval;
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/* Set the memory width and byte lanes */
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2019-07-11 18:50:00 +02:00
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regval = getreg32(LPC17_40_EMC_STATICCONFIG1);
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2013-02-12 22:27:51 +01:00
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regval &= ~EMC_STATICCONFIG_MW_MASK;
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regbal |= (EMC_STATICCONFIG_MW_8BIT | EMC_STATICCONFIG_PB);
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2019-07-11 18:50:00 +02:00
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putreg32(regval, LPC17_40_EMC_STATICCONFIG1);
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2013-02-12 22:27:51 +01:00
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/* Configure timing */
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2019-07-11 18:50:00 +02:00
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putreg32(2, LPC17_40_EMC_STATICWAITWEN1);
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putreg32(2, LPC17_40_EMC_STATICWAITOEN1);
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putreg32(31, LPC17_40_EMC_STATICWAITRD1);
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putreg32(31, LPC17_40_EMC_STATICWAITPAGE1);
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putreg32(31, LPC17_40_EMC_STATICWAITWR1);
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putreg32(31, LPC17_40_EMC_STATICWAITTURN1);
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2014-04-14 00:22:22 +02:00
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2019-08-13 18:08:49 +02:00
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/* GPIO P2[21] connects to the Ready/Busy pin of the NAND part.
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* We need to reconfigure this pin as normal GPIO input.
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2013-02-12 22:27:51 +01:00
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*/
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2019-07-11 18:50:00 +02:00
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lpc17_40_gpioconfig(GPIO_NAND_RB);
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2013-02-12 22:27:51 +01:00
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}
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2019-07-11 18:50:00 +02:00
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#endif /* CONFIG_LPC17_40_SPIFI */
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