2018-11-16 22:33:01 +01:00
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############################################################################
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# arch/arm/src/max326xx/Make.defs
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#
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# Copyright (C) 2018 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <gnutt@nuttx.org>
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# 3. Neither the name NuttX nor the names of its contributors may be
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# used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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############################################################################
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2018-11-17 16:19:17 +01:00
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# Common ARMv7-M Source Files
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2018-11-16 22:33:01 +01:00
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HEAD_ASRC =
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2020-04-30 20:33:20 +02:00
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CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
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2018-11-16 22:33:01 +01:00
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CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
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2019-08-06 23:59:19 +02:00
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ifeq ($(CONFIG_ARCH_SETJMP_H),y)
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ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
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CMN_ASRCS += up_setjmp.S
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endif
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endif
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2020-04-30 20:19:27 +02:00
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CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c arm_copyfullstate.c
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2018-11-18 23:41:07 +01:00
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CMN_CSRCS += up_createstack.c up_doirq.c up_exit.c up_hardfault.c
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CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
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CMN_CSRCS += up_mdelay.c up_memfault.c up_modifyreg8.c up_modifyreg16.c
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CMN_CSRCS += up_modifyreg32.c up_releasepending.c up_releasestack.c
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CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c up_sigdeliver.c
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CMN_CSRCS += up_stackframe.c up_svcall.c up_trigger_irq.c up_unblocktask.c
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CMN_CSRCS += up_udelay.c up_usestack.c up_vfork.c
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2018-11-16 22:33:01 +01:00
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ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
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CMN_ASRCS += up_lazyexception.S
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else
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CMN_ASRCS += up_exception.S
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endif
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CMN_CSRCS += up_vectors.c
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ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
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CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
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endif
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
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CMN_CSRCS += up_signal_dispatch.c
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CMN_UASRCS += up_signal_handler.S
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endif
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ifeq ($(CONFIG_STACK_COLORATION),y)
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CMN_CSRCS += up_checkstack.c
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endif
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ifeq ($(CONFIG_ARCH_FPU),y)
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CMN_ASRCS += up_fpu.S
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2020-04-30 20:26:30 +02:00
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CMN_CSRCS += arm_copyarmstate.c
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2018-11-16 22:33:01 +01:00
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endif
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2018-11-17 16:19:17 +01:00
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# Common MAX326XX Source Files
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2018-11-16 22:33:01 +01:00
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CHIP_ASRCS =
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2018-11-18 23:41:07 +01:00
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CHIP_CSRCS = max326_start.c max326_irq.c max326_clrpend.c
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2018-11-17 16:19:17 +01:00
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2018-11-19 21:36:32 +01:00
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ifeq ($(CONFIG_MAX326XX_ICC),y)
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CHIP_CSRCS += max326_icc.c
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endif
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2018-11-21 19:27:23 +01:00
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ifeq ($(CONFIG_RTC_DRIVER),y)
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CHIP_CSRCS += max326_rtc_lowerhalf.c
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endif
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2018-11-17 16:19:17 +01:00
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# Source Files for the MAX32620 and MAX32630
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# Source Files for the MAX32660
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ifeq ($(CONFIG_ARCH_FAMILY_MAX32660),y)
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2018-11-18 23:41:07 +01:00
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CHIP_CSRCS += max32660_clockconfig.c max32660_lowputc.c max32660_gpio.c
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2018-11-17 16:19:17 +01:00
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endif
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# Configuration-Dependent Source Files
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2018-11-16 22:33:01 +01:00
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ifneq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += max326_timerisr.c
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else
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CHIP_CSRCS += max326_tickless.c
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endif
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CHIP_CSRCS += max326_userspace.c max326_mpuinit.c
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endif
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2018-11-17 20:23:03 +01:00
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ifeq ($(CONFIG_MAX326XX_DMA),y)
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2018-11-17 16:19:17 +01:00
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ifeq ($(CONFIG_ARCH_FAMILY_MAX32660),y)
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CHIP_CSRCS += max32660_dma.c
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endif
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2018-11-16 22:33:01 +01:00
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endif
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CHIP_CSRCS += max326_idle.c
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endif
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2018-11-17 20:23:03 +01:00
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ifeq ($(CONFIG_MAX326XX_GPIOIRQ),y)
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2018-11-17 16:19:17 +01:00
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ifeq ($(CONFIG_ARCH_FAMILY_MAX32660),y)
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CHIP_CSRCS += max32660_gpioirq.c
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endif
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2018-11-16 22:33:01 +01:00
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endif
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2018-11-21 19:27:23 +01:00
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ifeq ($(CONFIG_MAX326XX_RTC),y)
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ifeq ($(CONFIG_ARCH_FAMILY_MAX32660),y)
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CHIP_CSRCS += max32660_rtc.c
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endif
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endif
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2018-11-21 00:13:35 +01:00
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ifeq ($(CONFIG_MAX32XX_WDT),y)
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2018-11-17 16:19:17 +01:00
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ifeq ($(CONFIG_ARCH_FAMILY_MAX32660),y)
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CHIP_CSRCS += max32660_rtc.c
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endif
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2018-11-16 22:33:01 +01:00
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ifeq ($(CONFIG_RTC_DRIVER),y)
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CHIP_CSRCS += max326_rtc_lowerhalf.c
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endif
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endif
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2018-11-21 00:13:35 +01:00
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ifeq ($(CONFIG_MAX326XX_WDOG),y)
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2018-11-17 16:19:17 +01:00
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ifeq ($(CONFIG_ARCH_FAMILY_MAX32660),y)
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CHIP_CSRCS += max32660_wdt.c
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endif
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2018-11-16 22:33:01 +01:00
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endif
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2018-11-17 20:23:03 +01:00
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ifeq ($(CONFIG_MAX326XX_RNG),y)
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2018-11-16 22:33:01 +01:00
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CHIP_CSRCS += max326_rng.c
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endif
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2018-11-17 16:19:17 +01:00
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ifeq ($(CONFIG_MAX326XX_HAVE_UART),y)
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ifeq ($(CONFIG_ARCH_FAMILY_MAX32660),y)
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CHIP_CSRCS += max32660_serial.c
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endif
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2018-11-16 22:33:01 +01:00
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endif
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ifeq ($(CONFIG_MAX326XX_HAVE_I2CM),y)
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2018-11-17 16:19:17 +01:00
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ifeq ($(CONFIG_ARCH_FAMILY_MAX32660),y)
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CHIP_CSRCS += max32660_i2cm.c
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endif
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2018-11-16 22:33:01 +01:00
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endif
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ifeq ($(CONFIG_MAX326XX_HAVE_SPIM),y)
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2018-11-29 19:12:56 +01:00
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ifeq ($(CONFIG_ARCH_FAMILY_MAX32660),y)
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2018-11-30 01:32:40 +01:00
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ifeq ($(CONFIG_MAX326XX_SPIM0),y)
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2018-11-29 19:12:56 +01:00
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CHIP_CSRCS += max32660_spim.c
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endif
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2018-11-30 01:32:40 +01:00
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ifeq ($(CONFIG_MAX326XX_SPIM1),y)
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CHIP_CSRCS += max32660_spimssm.c
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endif
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endif
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2018-11-16 22:33:01 +01:00
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endif
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2018-11-17 22:36:40 +01:00
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# Paths to source files
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VPATH += chip/common
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ifeq ($(CONFIG_ARCH_FAMILY_MAX32620),y)
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VPATH += chip/max32620_30
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else ifeq ($(CONFIG_ARCH_FAMILY_MAX32630),y)
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VPATH += chip/max32620_30
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endif
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ifeq ($(CONFIG_ARCH_FAMILY_MAX32660),y)
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VPATH += chip/max32660
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endif
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