2013-10-02 16:24:46 +02:00
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/************************************************************************************
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* configs/spark/src/spark.h
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Laurent Latil <laurent@latil.nom.fr>
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* Librae <librae8226@gmail.com>
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2013-10-16 15:55:04 +02:00
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* David_s5 <david_s5@nscdg.com>
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2013-10-02 16:24:46 +02:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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2013-10-16 15:55:04 +02:00
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#ifndef __CONFIGS_SPARK_SRC_SPARK_H
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#define __CONFIGS_SPARK_SRC_SPARK_H
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2013-10-02 16:24:46 +02:00
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/compiler.h>
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#include <stdint.h>
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2016-06-28 19:57:40 +02:00
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#include <arch/chip/chip.h>
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2013-10-02 16:24:46 +02:00
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/************************************************************************************
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2015-03-21 16:26:53 +01:00
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* Pre-processor Definitions
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2013-10-02 16:24:46 +02:00
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************************************************************************************/
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2013-10-16 15:55:04 +02:00
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/* During the development of the SparkCore, the hardware was in limited supply
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* As a work around david_s5 created a SparkCore Big board (http://nscdg.com/spark/sparkBB.png)
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* that will interface with a maple mini (http://leaflabs.com/docs/hardware/maple-mini.html),
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* and a CC3000BOOST (https://estore.ti.com/CC3000BOOST-CC3000-BoosterPack-P4258.aspx)
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*
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* It breaks out the Tx, Rx to connect to a FTDI TTL-232RG-VREG3V3-WE for the console and
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* wires in the spark LEDs and serial flash to the same I/O as the sparkcore. It has a Jlink
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* compatible Jtag connector on it.
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*
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*
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* Board GPIO Usage:
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*
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* GPIO Function MPU Core Core Maple Maple
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* Pin # Name Pin # Name Pin #
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* ----- -------------------------------- --------------------------------------------------------
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* PA[00] WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR 10 A0 JP1-12 J1-8
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* PA[01] USART2_RTS/ADC12_IN1/TIM2_CH2 11 A1 JP1-11 J1-9
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* PA[02] USART2_TX/ADC12_IN2/TIM2_CH3 12 TX JP1-3 J1-10
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* PA[03] USART2_RX/ADC12_IN3/TIM2_CH4 13 RX JP1-4 J1-11
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* PA[04] SPI1_NSS/USART2_CK/ADC12_IN4 14 A2 JP1-10 J1-12
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* PA[05] SPI1_SCK/ADC12_IN5 15 A3 JP1-9 J1-13
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* PA[06] SPI1_MISO/ADC12_IN6/TIM3_CH1 16 A4 JP1-8 J1-14
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* PA[07] SPI1_MOSI/ADC12_IN7/TIM3_CH2 17 A5 JP1-7 J1-15
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* PA[08] USART1_CK/TIM1_CH1/MCO 29 LED2 J2-5
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* PA[09] USART1_TX/TIM1_CH2 30 LED3 J2-6
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* PA[10] USART1_RX/TIM1_CH3 31 LED4 J2-7
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* PA[11] USART1_CTS/CAN_RX/TIM1_CH4/USBDM 32 USBM USBDM J2-8
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* PA[12] USART1_RTS/CAN_TX/TIM1_ETR/USBDP 33 USBP USBDP J2-9
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* PA[13] JTMS/SWDIO 34 D7,LED1 JP2-5 J2-10
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* PA[14] JTCK/SWCLK 37 D6 JP2-6 J2-11
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* PA[15] JTDI 38 D5 JP2-7 J2-12
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*
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* PB[00] ADC12_IN8/TIM3_CH3 18 A6 JP1-6 J1-16
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* PB[01] ADC12_IN9/TIM3_CH4 19 A7 JP1-5 R1-LED
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* PB[02] BOOT1 20 BTN BTN J1-17
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* PB[03] JTDO 39 D4 JP2-8 J2-13
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* PB[04] NJTRST 40 D3 JP2-9 J2-14
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* PB[05] I2C1_SMBA 41 D2 JP2-10 J2-15
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* PB[06] I2C1_SCL/TIM4_CH1 42 D1 JP2-11 J2-16
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* PB[07] I2C1_SDA/TIM4_CH2 43 D0 JP2-12 J2-17
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* PB[08] TIM4_CH3 45 WIFI_EN BOOT0 J2-18
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* PB[09] TIM4_CH4 46 MEM_CS DISC
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* PB[10] I2C2_SCL/USART3_TX 21 USB_DISC J1-18
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* PB[11] I2C2_SDA/USART3_RX 22 WIFI_INT J1-19
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* PB[12] SPI2_NSS/I2C2_SMBA/USART3_CK/TIM1_BKIN 25 WIFI_CS J2-1
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* PB[13] SPI2_SCK/USART3_CTS/TIM1_CH1N 26 SPI_CLK J2-2
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* PB[14] SPI2_MISO/USART3_RTS/TIM1_CH2N 27 SPI_MISO J2-3
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* PB[15] SPI2_MOSI/TIM1_CH3N 28 SPI_MOSI J2-4
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*
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* PC[13] TAMPER-RTC 2 N.C. J1-4
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* PC[14] OSC32_IN 3 OSC32_IN Y1 N.C.
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* PC[15] OSC32_OUT 4 OSC32_OUT Y1 N.C.
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*
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* PD[00] OSC_IN 5 OSC_IN Y2 8MHZ OSC 8MHZ OSC
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* PD[01] OSC_OUT 6 OSC_OUT Y2 8MHZ OSC 8MHZ OSC
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*
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* Spark Core pin Mapping
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*
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* GPIO ADC Timer I2C UART SPI JTAG Other 5V? STM Pin# Core HW Core SW
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* PA0 CH0 2_CH1_ETR 2_CTS 10 A0 10
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* PA1 CH1 2_CH2 2_RTS 11 A1 11
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* PA2 CH2 2_CH3 2_TX 12 TX 19
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* PA3 CH3 2_CH4 2_RX 13 RX 18
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* PA4 CH4 2_CK 1_NSS 14 A2 12
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* PA5 CH5 1_SCK 15 A3 13
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* PA6 CH6 3_CH1 1_MISO 16 A4 14
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* PA7 CH7 3_CH2 1_MOSI 17 A5 15
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* PA8 1_CH1 1_CK MCO Yes 29 LED2
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* PA9 1_CH2 1_TX Yes 30 LED3
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* PA10 1_CH3 1_RX Yes 31 LED4
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* PA11 1_CH4 1_CTS USB- Yes 32 USBM
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* PA12 1_ETR 1_RTS USB+ Yes 33 USBP
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* PA13 JTMS Yes 34 D7 7
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* PA14 JTCK Yes 37 D6 6
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* PA15 JTDI Yes 38 D5 5
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*
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* PB0 CH8 3_CH3 18 A6 16
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* PB1 CH9 3_CH4 19 A7 17
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* PB2 BOOT1 Yes 20 BTN
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* PB3 JTDO Yes 39 D4 4
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* PB4 NJTRST Yes 40 D3 3
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* PB5 1_SMBA 41 D2 2
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* PB6 4_CH1 1_SCL Yes 42 D1 1
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* PB7 4_CH2 1_SDA Yes 43 D0 0
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* PB8 4_CH3 Yes 45 WIFI_EN
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* PB9 4_CH4 Yes 46 MEM_CS
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* PB10 2_SCL 3_TX Yes 21 USB_DISC
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* PB11 2_SDA 3_RX Yes 22 WIFI_INT
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* PB12 1_BKIN 2_SMBA 3_CK 2_NSS Yes 25 WIFI_CS
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* PB13 3_CTS 2_SCK Yes 26 SPI_SCK
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* PB14 3_RTS 2_MISO Yes 27 SPI_MISO
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* PB15 2_MOSI Yes 28 SPI_MOSI
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*
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* PC13 2
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* PC14 RTC Oscillator 3 OSC32IN
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* PC15 RTC Oscillator 4 OSC32OUT
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*
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* PD0 Oscillator <= 5 OSC
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* PD1 Oscillator => 6 OSC
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*/
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2013-10-02 16:24:46 +02:00
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/* How many SPI modules does this chip support? The LM3S6918 supports 2 SPI
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* modules (others may support more -- in such case, the following must be
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* expanded).
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*/
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#if STM32_NSPI < 1
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# undef CONFIG_STM32_SPI1
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# undef CONFIG_STM32_SPI2
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#elif STM32_NSPI < 2
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# undef CONFIG_STM32_SPI2
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#endif
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2013-10-16 15:55:04 +02:00
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/* LEDs *****************************************************************************/
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/*
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* GPIO Function MPU Core Core Maple Maple
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* Pin # Name Pin # Name Pin #
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* ----- -------------------------------- --------------------------------------------------------
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*
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* PA[08] USART1_CK/TIM1_CH1/MCO 29 LED2 J2-5
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* PA[09] USART1_TX/TIM1_CH2 30 LED3 J2-6
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* PA[10] USART1_RX/TIM1_CH3 31 LED4 J2-7
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* PA[13] JTMS/SWDIO 34 D7,LED1 JP2-5 J2-10
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*/
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#define GPIO_LED1 (GPIO_PORTA | GPIO_PIN13 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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#define GPIO_LED_USR GPIO_LED1
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2014-02-18 20:50:12 +01:00
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#define GPIO_LED2 (GPIO_PORTA | GPIO_PIN8 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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#define GPIO_LED3 (GPIO_PORTA | GPIO_PIN9 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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2013-10-16 15:55:04 +02:00
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#define GPIO_LED4 (GPIO_PORTA | GPIO_PIN10 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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2013-10-02 16:24:46 +02:00
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2013-11-01 18:28:23 +01:00
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#define GPIO_USB_PULLUP (GPIO_PORTB | GPIO_PIN10 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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2013-10-16 15:55:04 +02:00
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/* BUTTON ***************************************************************************/
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/*
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* GPIO Function MPU Core Core Maple Maple
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* Pin # Name Pin # Name Pin #
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* ----- -------------------------------- --------------------------------------------------------
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* PB[02] BOOT1 20 BTN BTN J1-17
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*/
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#define IRQBUTTON BUTTON_USER
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#define GPIO_BTN (GPIO_PORTB | GPIO_PIN2 | GPIO_INPUT | GPIO_CNF_INPULLUP | GPIO_EXTI)
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/* MEMORYs **************************************************************************/
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/*
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* GPIO Function MPU Core Core Maple Maple
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* Pin # Name Pin # Name Pin #
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* ----- -------------------------------- --------------------------------------------------------
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* PB[09] TIM4_CH4 46 MEM_CS DISC
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*/
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#define GPIO_MEM_CS (GPIO_PORTB | GPIO_PIN9 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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/* CCS3000 **************************************************************************/
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/*
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* GPIO Function MPU Core Core Maple Maple
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* Pin # Name Pin # Name Pin #
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* ----- -------------------------------- --------------------------------------------------------
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* PB[08] TIM4_CH3 45 WIFI_EN BOOT0 J2-18
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* PB[11] I2C2_SDA/USART3_RX 22 WIFI_INT J1-19
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* PB[12] SPI2_NSS/I2C2_SMBA/USART3_CK/TIM1_BKIN 25 WIFI_CS J2-1
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*/
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2013-10-23 16:37:16 +02:00
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#define GPIO_WIFI_EN (GPIO_PORTB | GPIO_PIN8 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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#define GPIO_WIFI_CS (GPIO_PORTB | GPIO_PIN12 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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2013-10-16 15:55:04 +02:00
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2013-10-23 16:37:16 +02:00
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#define GPIO_WIFI_INT (GPIO_PORTB | GPIO_PIN11 | GPIO_INPUT | GPIO_CNF_INPULLUP | GPIO_EXTI)
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2014-02-18 20:50:12 +01:00
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#if defined(CONFIG_CC3000_PROBES)
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2013-10-23 16:37:16 +02:00
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#define GPIO_D0 (GPIO_PORTB | GPIO_PIN7 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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#define GPIO_D1 (GPIO_PORTB | GPIO_PIN6 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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2014-02-18 20:50:12 +01:00
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#else
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#define GPIO_D0 (GPIO_PORTB | GPIO_PIN7 | GPIO_INPUT | GPIO_CNF_INPULLUP | GPIO_EXTI)
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#define GPIO_D1 (GPIO_PORTB | GPIO_PIN6 | GPIO_INPUT | GPIO_CNF_INPULLUP | GPIO_EXTI)
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#define GPIO_D2 (GPIO_PORTB | GPIO_PIN5 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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#define GPIO_A0 (GPIO_PORTA | GPIO_PIN0 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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#define GPIO_A1 (GPIO_PORTA | GPIO_PIN1 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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#define GPIO_A2 (GPIO_PORTA | GPIO_PIN4 | GPIO_INPUT | GPIO_CNF_INPULLUP )
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#define GPIO_A3 (GPIO_PORTA | GPIO_PIN5 | GPIO_INPUT | GPIO_CNF_INPULLUP )
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#endif
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2013-10-02 16:24:46 +02:00
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public data
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************************************************************************************/
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#ifndef __ASSEMBLY__
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
|
2016-01-26 19:21:39 +01:00
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* Name: stm32_spidev_initialize
|
2013-10-02 16:24:46 +02:00
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*
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* Description:
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* Called to configure SPI chip select GPIO pins.
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*
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************************************************************************************/
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2016-01-26 19:21:39 +01:00
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void stm32_spidev_initialize(void);
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2013-10-02 16:24:46 +02:00
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/************************************************************************************
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* Name: stm32_usbinitialize
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*
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* Description:
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* Called to setup USB-related GPIO pins.
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*
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************************************************************************************/
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void stm32_usbinitialize(void);
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#endif /* __ASSEMBLY__ */
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2013-10-16 15:55:04 +02:00
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#endif /* __CONFIGS_SPARK_SRC_SPARK_H */
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