2021-03-05 07:15:02 +01:00
|
|
|
/****************************************************************************
|
|
|
|
* arch/xtensa/include/esp32/memory_layout.h
|
|
|
|
*
|
2021-03-05 07:34:03 +01:00
|
|
|
* Licensed to the Apache Software Foundation (ASF) under one or more
|
|
|
|
* contributor license agreements. See the NOTICE file distributed with
|
|
|
|
* this work for additional information regarding copyright ownership. The
|
|
|
|
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
|
|
|
* "License"); you may not use this file except in compliance with the
|
|
|
|
* License. You may obtain a copy of the License at
|
2021-03-05 07:15:02 +01:00
|
|
|
*
|
2021-03-05 07:34:03 +01:00
|
|
|
* http://www.apache.org/licenses/LICENSE-2.0
|
2021-03-05 07:15:02 +01:00
|
|
|
*
|
2021-03-05 07:34:03 +01:00
|
|
|
* Unless required by applicable law or agreed to in writing, software
|
|
|
|
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
|
|
|
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
|
|
|
* License for the specific language governing permissions and limitations
|
|
|
|
* under the License.
|
2021-03-05 07:15:02 +01:00
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Included Files
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
#include <nuttx/config.h>
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Pre-processor Definitions
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/* The heap overview:
|
|
|
|
*
|
|
|
|
* CONFIG_HEAP2_BASE eg. 3f80 0000
|
|
|
|
* :
|
|
|
|
* : g_mmheap region3 (CONFIG_ESP32_SPIRAM)
|
|
|
|
* :
|
|
|
|
* CONFIG_HEAP2_BASE + CONFIG_HEAP2_SIZE eg. 3fc0 0000
|
|
|
|
*
|
|
|
|
* _sheap eg. 3ffc 8c6c
|
|
|
|
* :
|
|
|
|
* : g_mmheap region1
|
|
|
|
* :
|
|
|
|
* HEAP_REGION1_END 3ffd fff0
|
|
|
|
* :
|
|
|
|
* : ROM data
|
|
|
|
* :
|
|
|
|
* HEAP_REGION2_START 3ffe 1330 or 3ffe 7e40
|
|
|
|
* :
|
2021-03-08 09:58:09 +01:00
|
|
|
* : g_iheap (CONFIG_XTENSA_IMEM_USE_SEPARATE_HEAP)
|
|
|
|
* :
|
|
|
|
* HEAP_REGION2_START + CONFIG_XTENSA_IMEM_REGION_SIZE
|
|
|
|
* :
|
2021-03-05 07:15:02 +01:00
|
|
|
* : g_mmheap region2
|
|
|
|
* :
|
|
|
|
* : about 123KB
|
|
|
|
* :
|
|
|
|
* _eheap 4000 0000
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* Region 1 of the heap is the area from the end of the .data section to the
|
|
|
|
* beginning of the ROM data. The start address is defined from the linker
|
2021-03-08 10:04:08 +01:00
|
|
|
* script as "_sheap". The end is defined here, as follows:
|
2021-03-05 07:15:02 +01:00
|
|
|
*/
|
|
|
|
|
2021-03-08 10:04:08 +01:00
|
|
|
#define HEAP_REGION1_END 0x3ffdfff0
|
2021-03-05 07:15:02 +01:00
|
|
|
|
|
|
|
/* Region 2 of the heap is the area from the end of the ROM data to the end
|
|
|
|
* of DRAM. The linker script has already set "_eheap" as the end of DRAM,
|
|
|
|
* the following defines the start of region2.
|
|
|
|
* N.B: That ROM data consists of 2 regions, one per CPU. If SMP is not
|
|
|
|
* enabled include APP's region with the heap.
|
2021-03-08 09:58:09 +01:00
|
|
|
*
|
|
|
|
* When an internal heap is enabled this region starts at an offset equal to
|
2021-03-08 10:04:08 +01:00
|
|
|
* the size of the internal heap.
|
2021-03-05 07:15:02 +01:00
|
|
|
*/
|
|
|
|
|
2021-03-08 10:04:08 +01:00
|
|
|
#define HEAP_REGION2_START 0x3ffe0450
|
|
|
|
|
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
# define HEAP_REGION2_END 0x3ffe3f10
|
|
|
|
# define HEAP_REGION3_START 0x3ffe5240
|
2021-03-05 07:15:02 +01:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_XTENSA_IMEM_USE_SEPARATE_HEAP
|
2021-03-08 09:58:09 +01:00
|
|
|
# define XTENSA_IMEM_REGION_SIZE CONFIG_XTENSA_IMEM_REGION_SIZE
|
2021-03-05 07:15:02 +01:00
|
|
|
#else
|
2021-03-08 09:58:09 +01:00
|
|
|
# define XTENSA_IMEM_REGION_SIZE 0
|
2021-03-05 07:15:02 +01:00
|
|
|
#endif
|
|
|
|
|
2021-03-08 10:04:08 +01:00
|
|
|
/* Internal heap starts at the end of the ROM data.
|
|
|
|
* This is either the start of region2 if SMP is disabled or start of region3
|
|
|
|
* if SMP is enabled.
|
|
|
|
*/
|
2021-03-05 07:15:02 +01:00
|
|
|
|
2021-03-08 09:58:09 +01:00
|
|
|
#ifndef CONFIG_SMP
|
2021-03-08 10:04:08 +01:00
|
|
|
# define ESP32_IMEM_START HEAP_REGION2_START
|
2021-03-08 09:58:09 +01:00
|
|
|
#else
|
2021-03-08 10:04:08 +01:00
|
|
|
# define ESP32_IMEM_START HEAP_REGION3_START
|
2021-03-05 07:15:02 +01:00
|
|
|
#endif
|
2021-03-08 09:58:09 +01:00
|
|
|
|
2021-03-08 09:59:20 +01:00
|
|
|
/* Region of unused ROM App data */
|
|
|
|
|
|
|
|
#define HEAP_REGION_ROMAPP_START 0x3ffe4360
|
|
|
|
#define HEAP_REGION_ROMAPP_END 0x3ffe5230
|
|
|
|
|