2017-07-10 09:10:20 +02:00
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/****************************************************************************
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* drivers/wireless/ieee802154/mrf24j40/mrf24j40_interrupt.c
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*
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2021-09-06 13:39:36 +02:00
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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2017-07-10 09:10:20 +02:00
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*
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2021-09-06 13:39:36 +02:00
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* http://www.apache.org/licenses/LICENSE-2.0
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2017-07-10 09:10:20 +02:00
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*
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2021-09-06 13:39:36 +02:00
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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2017-07-10 09:10:20 +02:00
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/mm/iob.h>
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#include <nuttx/wireless/ieee802154/mrf24j40.h>
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#include "mrf24j40.h"
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#include "mrf24j40_reg.h"
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#include "mrf24j40_regops.h"
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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static void mrf24j40_irqwork_rx(FAR struct mrf24j40_radio_s *dev);
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static void mrf24j40_irqwork_txnorm(FAR struct mrf24j40_radio_s *dev);
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static void mrf24j40_irqwork_txgts(FAR struct mrf24j40_radio_s *dev,
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uint8_t gts_num);
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2019-12-05 18:49:12 +01:00
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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2017-07-10 09:10:20 +02:00
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/****************************************************************************
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* Name: mrf24j40_irqwork_txnorm
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*
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* Description:
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* Manage completion of packet transmission.
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*
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****************************************************************************/
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static void mrf24j40_irqwork_txnorm(FAR struct mrf24j40_radio_s *dev)
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{
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uint8_t reg;
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enum ieee802154_status_e status;
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bool framepending;
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/* Disable tx int */
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reg = mrf24j40_getreg(dev->spi, MRF24J40_INTCON);
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reg |= MRF24J40_INTCON_TXNIE;
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mrf24j40_setreg(dev->spi, MRF24J40_INTCON, reg);
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/* Get the status from the device and copy the status into the tx desc.
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* The status for the normal FIFO is represented with bit TXNSTAT where
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* 0=success, 1= failure.
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*/
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reg = mrf24j40_getreg(dev->spi, MRF24J40_TXSTAT);
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/* TXNSTAT = 0: Transmission was successful
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* TXNSTAT = 1: Transmission failed, retry count exceeded
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*/
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if (reg & MRF24J40_TXSTAT_TXNSTAT)
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{
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2021-04-04 11:58:11 +02:00
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/* The number of retries of the most recent transmission is contained
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* in the TXNRETRY (TXSTAT 0x24<7:6>) bits.
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* The CCAFAIL (TXSTAT 0x24<5>) bit = 1 indicates if the failed
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* transmission was due to the channel busy (CSMA-CA timed out).
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2017-07-10 09:10:20 +02:00
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*/
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if (reg & MRF24J40_TXSTAT_CCAFAIL)
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{
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status = IEEE802154_STATUS_CHANNEL_ACCESS_FAILURE;
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}
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else
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{
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status = IEEE802154_STATUS_NO_ACK;
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}
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}
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else
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{
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status = IEEE802154_STATUS_SUCCESS;
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}
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framepending = (mrf24j40_getreg(dev->spi, MRF24J40_TXNCON) &
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MRF24J40_TXNCON_FPSTAT);
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if (dev->txdelayed_busy)
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{
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/* Inform the next layer of the transmission success/failure */
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dev->txdelayed_desc->conf->status = status;
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dev->txdelayed_desc->framepending = framepending;
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dev->radiocb->txdone(dev->radiocb, dev->txdelayed_desc);
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dev->txdelayed_busy = false;
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if (dev->reschedule_csma)
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{
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mrf24j40_norm_setup(dev, dev->csma_desc->frame, true);
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mrf24j40_norm_trigger(dev);
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dev->reschedule_csma = false;
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}
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}
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else
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{
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/* Inform the next layer of the transmission success/failure */
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dev->csma_desc->conf->status = status;
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dev->csma_desc->framepending = framepending;
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dev->radiocb->txdone(dev->radiocb, dev->csma_desc);
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/* We are now done with the transaction */
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dev->csma_busy = 0;
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/* Must unlock the radio before calling poll */
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2022-09-06 08:18:45 +02:00
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nxmutex_unlock(&dev->lock);
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2017-07-10 09:10:20 +02:00
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mrf24j40_dopoll_csma(dev);
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2022-09-06 08:18:45 +02:00
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while (nxmutex_lock(&dev->lock) < 0)
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2017-10-04 23:22:27 +02:00
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{
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}
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2017-07-10 09:10:20 +02:00
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}
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}
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/****************************************************************************
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* Name: mrf24j40_irqwork_gts
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*
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* Description:
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* Manage completion of packet transmission.
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*
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****************************************************************************/
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static void mrf24j40_irqwork_txgts(FAR struct mrf24j40_radio_s *dev,
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uint8_t gts)
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{
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uint8_t txstat;
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/* Disable tx int */
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txstat = mrf24j40_getreg(dev->spi, MRF24J40_INTCON);
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txstat |= MRF24J40_INTCON_TXNIE;
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mrf24j40_setreg(dev->spi, MRF24J40_INTCON, txstat);
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/* Get the status from the device and copy the status into the tx desc.
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* The status for the normal FIFO is represented with bit TXNSTAT where
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* 0=success, 1= failure.
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*/
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txstat = mrf24j40_getreg(dev->spi, MRF24J40_TXSTAT);
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if (gts == 0)
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{
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dev->csma_desc->conf->status = txstat & MRF24J40_TXSTAT_TXG1STAT;
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}
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else if (gts == 1)
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{
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dev->csma_desc->conf->status = txstat & MRF24J40_TXSTAT_TXG2STAT;
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}
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/* Inform the next layer of the transmission success/failure */
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dev->radiocb->txdone(dev->radiocb, dev->gts_desc[gts]);
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/* We are now done with the transaction */
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2019-12-05 18:49:12 +01:00
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dev->gts_busy[gts] = 0;
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2017-07-10 09:10:20 +02:00
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mrf24j40_dopoll_gts(dev);
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}
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/****************************************************************************
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* Name: mrf24j40_irqwork_rx
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*
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* Description:
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* Manage packet reception.
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*
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****************************************************************************/
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static void mrf24j40_irqwork_rx(FAR struct mrf24j40_radio_s *dev)
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{
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2017-11-01 21:15:21 +01:00
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FAR struct ieee802154_primitive_s *primitive;
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2017-07-10 09:10:20 +02:00
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FAR struct ieee802154_data_ind_s *ind;
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uint32_t addr;
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uint32_t index;
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uint8_t reg;
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wlinfo("RX interrupt\n");
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/* Disable rx int */
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reg = mrf24j40_getreg(dev->spi, MRF24J40_INTCON);
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reg |= MRF24J40_INTCON_RXIE;
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mrf24j40_setreg(dev->spi, MRF24J40_INTCON, reg);
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/* Disable packet reception. See pg. 109 of datasheet */
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mrf24j40_setreg(dev->spi, MRF24J40_BBREG1, MRF24J40_BBREG1_RXDECINV);
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/* Allocate a data_ind to put the frame in */
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2017-11-01 21:15:21 +01:00
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primitive = ieee802154_primitive_allocate();
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ind = (FAR struct ieee802154_data_ind_s *)primitive;
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2017-07-10 09:10:20 +02:00
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if (ind == NULL)
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{
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wlerr("ERROR: Unable to allocate data_ind. Discarding frame\n");
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goto done;
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}
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2017-11-01 21:15:21 +01:00
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primitive->type = IEEE802154_PRIMITIVE_IND_DATA;
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/* Allocate an IOB to put the frame into */
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2022-08-08 04:21:03 +02:00
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ind->frame = iob_alloc(false);
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2022-12-15 15:51:14 +01:00
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DEBUGASSERT(ind->frame != NULL);
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2017-11-01 21:15:21 +01:00
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2017-07-10 09:10:20 +02:00
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/* Read packet */
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addr = MRF24J40_RXBUF_BASE;
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ind->frame->io_len = mrf24j40_getreg(dev->spi, addr++);
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for (index = 0; index < ind->frame->io_len; index++)
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{
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ind->frame->io_data[index] = mrf24j40_getreg(dev->spi, addr++);
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}
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ind->lqi = mrf24j40_getreg(dev->spi, addr++);
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ind->rssi = mrf24j40_getreg(dev->spi, addr++);
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/* Reduce len by 2, we only receive frames with correct crc, no check
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* required.
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*/
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ind->frame->io_len -= 2;
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/* Callback the receiver in the next highest layer */
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dev->radiocb->rxframe(dev->radiocb, ind);
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done:
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/* Enable reception of next packet by flushing the fifo.
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* This is an MRF24J40 errata (no. 1).
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*/
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mrf24j40_setreg(dev->spi, MRF24J40_RXFLUSH, 1);
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/* Only enable RX interrupt if we are to be listening when IDLE */
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if (dev->rxenabled)
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{
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/* Enable packet reception */
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mrf24j40_setreg(dev->spi, MRF24J40_BBREG1, 0);
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reg = mrf24j40_getreg(dev->spi, MRF24J40_INTCON);
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reg &= ~MRF24J40_INTCON_RXIE;
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mrf24j40_setreg(dev->spi, MRF24J40_INTCON, reg);
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}
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}
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2019-12-05 18:49:12 +01:00
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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2017-07-10 09:10:20 +02:00
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/****************************************************************************
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* Name: mrf24j40_irqworker
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*
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* Description:
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* Perform interrupt handling logic outside of the interrupt handler (on
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* the work queue thread).
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*
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2018-03-13 16:52:27 +01:00
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* Input Parameters:
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2017-07-10 09:10:20 +02:00
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* arg - The reference to the driver structure (cast to void*)
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*
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* Returned Value:
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* None
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*
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* Assumptions:
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*
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****************************************************************************/
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void mrf24j40_irqworker(FAR void *arg)
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{
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FAR struct mrf24j40_radio_s *dev = (FAR struct mrf24j40_radio_s *)arg;
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uint8_t intstat;
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uint8_t reg;
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DEBUGASSERT(dev);
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DEBUGASSERT(dev->spi);
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/* Get exclusive access to the driver */
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2022-09-06 08:18:45 +02:00
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while (nxmutex_lock(&dev->lock) < 0)
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2017-10-04 23:22:27 +02:00
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{
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}
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2017-07-10 09:10:20 +02:00
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/* Read and store INTSTAT - this clears the register. */
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intstat = mrf24j40_getreg(dev->spi, MRF24J40_INTSTAT);
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/* Do work according to the pending interrupts */
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if ((intstat & MRF24J40_INTSTAT_HSYMTMRIF))
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{
|
2021-04-04 11:58:11 +02:00
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/* As of now the only use for the MAC timer is for delayed
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* transactions. Therefore, all we do here is trigger the TX norm FIFO
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2017-07-10 09:10:20 +02:00
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*/
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mrf24j40_norm_trigger(dev);
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/* Timers are one-shot, so disable the interrupt */
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reg = mrf24j40_getreg(dev->spi, MRF24J40_INTCON);
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reg |= MRF24J40_INTCON_HSYMTMRIE;
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mrf24j40_setreg(dev->spi, MRF24J40_INTCON, reg);
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}
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if ((intstat & MRF24J40_INTSTAT_RXIF) && dev->rxenabled)
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{
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/* A packet was received, retrieve it */
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mrf24j40_irqwork_rx(dev);
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}
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if ((intstat & MRF24J40_INTSTAT_TXNIF))
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{
|
2021-04-04 11:58:11 +02:00
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/* A packet was transmitted or failed */
|
2017-07-10 09:10:20 +02:00
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mrf24j40_irqwork_txnorm(dev);
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}
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if ((intstat & MRF24J40_INTSTAT_TXG1IF))
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{
|
2021-04-04 11:58:11 +02:00
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/* A packet was transmitted or failed */
|
2017-07-10 09:10:20 +02:00
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mrf24j40_irqwork_txgts(dev, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((intstat & MRF24J40_INTSTAT_TXG1IF))
|
|
|
|
{
|
2021-04-04 11:58:11 +02:00
|
|
|
/* A packet was transmitted or failed */
|
2017-07-10 09:10:20 +02:00
|
|
|
|
|
|
|
mrf24j40_irqwork_txgts(dev, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((intstat & MRF24J40_INTSTAT_SLPIF))
|
|
|
|
{
|
|
|
|
dev->radiocb->sfevent(dev->radiocb, IEEE802154_SFEVENT_ENDOFACTIVE);
|
|
|
|
|
|
|
|
/* Acknowledge the alert and put the device to sleep */
|
|
|
|
|
|
|
|
reg = mrf24j40_getreg(dev->spi, MRF24J40_SLPACK);
|
|
|
|
reg |= MRF24J40_SLPACK_SLPACK;
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_SLPACK, reg);
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((intstat & MRF24J40_INTSTAT_WAKEIF))
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_MAC802154_SFEVENT_VERBOSE
|
|
|
|
wlinfo("Wake Interrupt\n");
|
|
|
|
#endif
|
|
|
|
|
2017-07-13 09:18:22 +02:00
|
|
|
if (dev->devmode != IEEE802154_DEVMODE_ENDPOINT)
|
|
|
|
{
|
2021-04-04 11:58:11 +02:00
|
|
|
/* This is right before the beacon, we set the bsn here, since the
|
|
|
|
* MAC uses the SLPIF (end of active portion of superframe). to
|
|
|
|
* make any changes to the beacon. This assumes that any changes
|
|
|
|
* to the beacon be in by the time that this interrupt fires.
|
2017-07-13 09:18:22 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_BEACON_FIFO + 4, dev->bsn++);
|
|
|
|
mrf24j40_beacon_trigger(dev);
|
2019-12-05 18:49:12 +01:00
|
|
|
wlinfo("Beacon triggered. BSN: 0x%02X\n", dev->bsn - 1);
|
2017-07-13 09:18:22 +02:00
|
|
|
}
|
2017-07-10 09:10:20 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Unlock the radio device */
|
|
|
|
|
2022-09-06 08:18:45 +02:00
|
|
|
nxmutex_unlock(&dev->lock);
|
2017-07-10 09:10:20 +02:00
|
|
|
|
|
|
|
/* Re-enable GPIO interrupts */
|
|
|
|
|
|
|
|
dev->lower->enable(dev->lower, true);
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: mrf24j40_interrupt
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Hardware interrupt handler
|
|
|
|
*
|
2018-03-13 16:52:27 +01:00
|
|
|
* Input Parameters:
|
2017-07-10 09:10:20 +02:00
|
|
|
* irq - Number of the IRQ that generated the interrupt
|
|
|
|
* context - Interrupt register state save info (architecture-specific)
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* OK on success
|
|
|
|
*
|
|
|
|
* Assumptions:
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
int mrf24j40_interrupt(int irq, FAR void *context, FAR void *arg)
|
|
|
|
{
|
|
|
|
FAR struct mrf24j40_radio_s *dev = (FAR struct mrf24j40_radio_s *)arg;
|
|
|
|
|
|
|
|
DEBUGASSERT(dev != NULL);
|
|
|
|
|
|
|
|
/* In complex environments, we cannot do SPI transfers from the interrupt
|
|
|
|
* handler because semaphores are probably used to lock the SPI bus. In
|
|
|
|
* this case, we will defer processing to the worker thread. This is also
|
|
|
|
* much kinder in the use of system resources and is, therefore, probably
|
|
|
|
* a good thing to do in any event.
|
|
|
|
*/
|
|
|
|
|
|
|
|
DEBUGASSERT(work_available(&dev->irqwork));
|
|
|
|
|
|
|
|
/* Notice that further GPIO interrupts are disabled until the work is
|
|
|
|
* actually performed. This is to prevent overrun of the worker thread.
|
|
|
|
* Interrupts are re-enabled in enc_irqworker() when the work is completed.
|
|
|
|
*/
|
|
|
|
|
|
|
|
dev->lower->enable(dev->lower, false);
|
2021-04-04 11:58:11 +02:00
|
|
|
return work_queue(HPWORK, &dev->irqwork,
|
|
|
|
mrf24j40_irqworker, (FAR void *)dev, 0);
|
2017-07-10 09:10:20 +02:00
|
|
|
}
|