2021-03-24 09:25:09 +01:00
|
|
|
/****************************************************************************
|
2019-07-11 18:50:00 +02:00
|
|
|
* arch/arm/src/lpc17xx_40xx/lpc17_40_serial.h
|
2012-09-13 20:32:24 +02:00
|
|
|
*
|
2021-03-24 09:24:48 +01:00
|
|
|
* Licensed to the Apache Software Foundation (ASF) under one or more
|
|
|
|
* contributor license agreements. See the NOTICE file distributed with
|
|
|
|
* this work for additional information regarding copyright ownership. The
|
|
|
|
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
|
|
|
* "License"); you may not use this file except in compliance with the
|
|
|
|
* License. You may obtain a copy of the License at
|
2012-09-13 20:32:24 +02:00
|
|
|
*
|
2021-03-24 09:24:48 +01:00
|
|
|
* http://www.apache.org/licenses/LICENSE-2.0
|
2012-09-13 20:32:24 +02:00
|
|
|
*
|
2021-03-24 09:24:48 +01:00
|
|
|
* Unless required by applicable law or agreed to in writing, software
|
|
|
|
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
|
|
|
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
|
|
|
* License for the specific language governing permissions and limitations
|
|
|
|
* under the License.
|
2012-09-13 20:32:24 +02:00
|
|
|
*
|
2021-03-24 09:25:09 +01:00
|
|
|
****************************************************************************/
|
2012-09-13 20:32:24 +02:00
|
|
|
|
2019-07-11 18:50:00 +02:00
|
|
|
#ifndef __ARCH_ARM_SRC_LPC17XX_40XX_LPC17_40_SERIAL_H
|
|
|
|
#define __ARCH_ARM_SRC_LPC17XX_40XX_LPC17_40_SERIAL_H
|
2012-09-13 20:32:24 +02:00
|
|
|
|
2021-03-24 09:25:09 +01:00
|
|
|
/****************************************************************************
|
2012-09-13 20:32:24 +02:00
|
|
|
* Included Files
|
2021-03-24 09:25:09 +01:00
|
|
|
****************************************************************************/
|
2012-09-13 20:32:24 +02:00
|
|
|
|
|
|
|
#include <nuttx/config.h>
|
|
|
|
#include <arch/board/board.h>
|
|
|
|
|
2019-07-11 18:50:00 +02:00
|
|
|
#include "hardware/lpc17_40_uart.h"
|
|
|
|
#include "hardware/lpc17_40_syscon.h"
|
2013-01-18 20:16:44 +01:00
|
|
|
|
2019-07-11 18:50:00 +02:00
|
|
|
#include "lpc17_40_gpio.h"
|
2012-09-13 20:32:24 +02:00
|
|
|
|
2021-03-24 09:25:09 +01:00
|
|
|
/****************************************************************************
|
2012-09-13 20:32:24 +02:00
|
|
|
* Pre-processor Definitions
|
2021-03-24 09:25:09 +01:00
|
|
|
****************************************************************************/
|
2012-09-13 20:32:24 +02:00
|
|
|
|
2021-03-24 09:25:09 +01:00
|
|
|
/* Configuration ************************************************************/
|
2012-09-13 20:32:24 +02:00
|
|
|
|
|
|
|
/* Are any UARTs enabled? */
|
|
|
|
|
|
|
|
#undef HAVE_UART
|
2019-07-11 18:50:00 +02:00
|
|
|
#if defined(CONFIG_LPC17_40_UART0) || defined(CONFIG_LPC17_40_UART1) || \
|
|
|
|
defined(CONFIG_LPC17_40_UART2) || defined(CONFIG_LPC17_40_UART3)
|
2012-09-13 20:32:24 +02:00
|
|
|
# define HAVE_UART 1
|
|
|
|
#endif
|
|
|
|
|
2021-03-24 09:25:09 +01:00
|
|
|
/* Is there a serial console? There should be at most one defined.
|
|
|
|
* It could be on any UARTn, n=0,1,2,3
|
2012-09-13 20:32:24 +02:00
|
|
|
*/
|
|
|
|
|
2019-07-11 18:50:00 +02:00
|
|
|
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_LPC17_40_UART0)
|
2012-09-13 20:32:24 +02:00
|
|
|
# undef CONFIG_UART1_SERIAL_CONSOLE
|
|
|
|
# undef CONFIG_UART2_SERIAL_CONSOLE
|
|
|
|
# undef CONFIG_UART3_SERIAL_CONSOLE
|
|
|
|
# define HAVE_CONSOLE 1
|
2019-07-11 18:50:00 +02:00
|
|
|
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_LPC17_40_UART1)
|
2012-09-13 20:32:24 +02:00
|
|
|
# undef CONFIG_UART0_SERIAL_CONSOLE
|
|
|
|
# undef CONFIG_UART2_SERIAL_CONSOLE
|
|
|
|
# undef CONFIG_UART3_SERIAL_CONSOLE
|
|
|
|
# define HAVE_CONSOLE 1
|
2019-07-11 18:50:00 +02:00
|
|
|
#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_LPC17_40_UART2)
|
2012-09-13 20:32:24 +02:00
|
|
|
# undef CONFIG_UART0_SERIAL_CONSOLE
|
|
|
|
# undef CONFIG_UART1_SERIAL_CONSOLE
|
|
|
|
# undef CONFIG_UART3_SERIAL_CONSOLE
|
|
|
|
# define HAVE_CONSOLE 1
|
2019-07-11 18:50:00 +02:00
|
|
|
#elif defined(CONFIG_UART3_SERIAL_CONSOLE) && defined(CONFIG_LPC17_40_UART3)
|
2012-09-13 20:32:24 +02:00
|
|
|
# undef CONFIG_UART0_SERIAL_CONSOLE
|
|
|
|
# undef CONFIG_UART1_SERIAL_CONSOLE
|
|
|
|
# undef CONFIG_UART2_SERIAL_CONSOLE
|
|
|
|
# define HAVE_CONSOLE 1
|
|
|
|
#else
|
|
|
|
# undef CONFIG_UART0_SERIAL_CONSOLE
|
|
|
|
# undef CONFIG_UART1_SERIAL_CONSOLE
|
|
|
|
# undef CONFIG_UART2_SERIAL_CONSOLE
|
|
|
|
# undef CONFIG_UART3_SERIAL_CONSOLE
|
|
|
|
# undef HAVE_CONSOLE
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Check UART flow control (Only supported by UART1) */
|
|
|
|
|
2013-06-06 22:49:14 +02:00
|
|
|
# undef CONFIG_UART0_IFLOWCONTROL
|
|
|
|
# undef CONFIG_UART0_OFLOWCONTROL
|
|
|
|
# undef CONFIG_UART2_IFLOWCONTROL
|
|
|
|
# undef CONFIG_UART2_OFLOWCONTROL
|
|
|
|
# undef CONFIG_UART3_IFLOWCONTROL
|
|
|
|
# undef CONFIG_UART3_OFLOWCONTROL
|
2019-07-11 18:50:00 +02:00
|
|
|
#ifndef CONFIG_LPC17_40_UART1
|
2013-06-06 22:49:14 +02:00
|
|
|
# undef CONFIG_UART1_IFLOWCONTROL
|
|
|
|
# undef CONFIG_UART1_OFLOWCONTROL
|
2012-09-13 20:32:24 +02:00
|
|
|
#endif
|
|
|
|
|
2021-03-24 09:25:09 +01:00
|
|
|
/* We cannot allow the DLM/DLL divisor to become to small or will will lose
|
|
|
|
* too much accuracy. This following is a "fudge factor" that represents the
|
|
|
|
* minimum value of the divisor that we will permit.
|
2012-09-13 20:32:24 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
#define UART_MINDL 32
|
|
|
|
|
2021-03-24 09:25:09 +01:00
|
|
|
/****************************************************************************
|
2012-09-13 20:32:24 +02:00
|
|
|
* Public Types
|
2021-03-24 09:25:09 +01:00
|
|
|
****************************************************************************/
|
2012-09-13 20:32:24 +02:00
|
|
|
|
2021-03-24 09:25:09 +01:00
|
|
|
/****************************************************************************
|
2012-09-13 20:32:24 +02:00
|
|
|
* Public Data
|
2021-03-24 09:25:09 +01:00
|
|
|
****************************************************************************/
|
2012-09-13 20:32:24 +02:00
|
|
|
|
2021-03-24 09:25:09 +01:00
|
|
|
/****************************************************************************
|
2012-09-13 20:32:24 +02:00
|
|
|
* Inline Functions
|
2021-03-24 09:25:09 +01:00
|
|
|
****************************************************************************/
|
2012-09-13 20:32:24 +02:00
|
|
|
|
2021-03-24 09:25:09 +01:00
|
|
|
/****************************************************************************
|
|
|
|
* Public Functions Prototypes
|
|
|
|
****************************************************************************/
|
2012-09-13 20:32:24 +02:00
|
|
|
|
2020-01-02 22:56:27 +01:00
|
|
|
void up_setbaud(uintptr_t uartbase, uint32_t basefreq, uint32_t baud);
|
|
|
|
|
2019-07-11 18:50:00 +02:00
|
|
|
#endif /* __ARCH_ARM_SRC_LPC17XX_40XX_LPC17_40_SERIAL_H */
|