2021-06-04 09:30:49 +02:00
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/****************************************************************************
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* arch/risc-v/src/rv32m1/rv32m1_timersvc.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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2022-03-11 17:41:15 +01:00
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#include "riscv_internal.h"
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2021-06-04 09:30:49 +02:00
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#include "rv32m1.h"
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#include "hardware/rv32m1_tstmr.h"
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#include "rv32m1_timersvc.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Data Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: rv32m1_timersvc_up
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****************************************************************************/
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bool rv32m1_timersvc_up(void)
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{
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#ifdef CONFIG_RV32M1_TSTMR
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/* TSTMR starts up when System Reset and TSTMR is Enabled by Option Byte.
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* Query the Option Byte to check whether TSTMR is enabled.
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*/
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return (getreg8(RV32M1_FTFE_BASE + 0x10) & 0x01) != 0;
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#else
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return false;
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#endif
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}
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/****************************************************************************
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* Name: rv32m1_timersvc_freq
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****************************************************************************/
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uint32_t rv32m1_timersvc_freq(void)
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{
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/* TSTMR runs off 1MHz */
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return 1000000u;
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}
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/****************************************************************************
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* Name: rv32m1_timersvc_period
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****************************************************************************/
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uint32_t rv32m1_timersvc_period(void)
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{
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return 0xffffffffu;
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}
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/****************************************************************************
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* Name: rv32m1_timersvc_value
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****************************************************************************/
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uint32_t rv32m1_timersvc_value(void)
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{
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/* Read High and Low Registers completely for the Right Result */
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uint64_t value = *(volatile uint64_t *)(RV32M1_TSTMR_BASE);
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/* It is ok to return the ONLY low valud caused the it is accumulated
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* outside.
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*/
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return (uint32_t)value;
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}
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