2009-05-08 23:12:33 +02:00
|
|
|
/****************************************************************************
|
2014-03-08 19:31:06 +01:00
|
|
|
* arch/arm/src/tiva/lm_irq.c
|
2013-01-09 15:48:55 +01:00
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|
|
* arch/arm/src/chip/lm_irq.c
|
2009-05-08 23:12:33 +02:00
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|
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*
|
2014-01-15 15:09:19 +01:00
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|
|
* Copyright (C) 2009, 2011, 2013-2014 Gregory Nutt. All rights reserved.
|
2012-09-13 20:32:24 +02:00
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* Author: Gregory Nutt <gnutt@nuttx.org>
|
2009-05-08 23:12:33 +02:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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|
* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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|
/****************************************************************************
|
|
|
|
* Included Files
|
|
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|
****************************************************************************/
|
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|
|
|
#include <nuttx/config.h>
|
2009-05-14 20:55:22 +02:00
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|
|
2009-12-16 21:05:51 +01:00
|
|
|
#include <stdint.h>
|
2009-05-15 20:03:59 +02:00
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|
#include <debug.h>
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|
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|
2009-05-08 23:12:33 +02:00
|
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|
#include <nuttx/irq.h>
|
2009-05-14 20:55:22 +02:00
|
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|
#include <nuttx/arch.h>
|
2009-05-18 23:08:43 +02:00
|
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|
#include <arch/irq.h>
|
2009-05-08 23:12:33 +02:00
|
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|
2009-05-19 19:16:17 +02:00
|
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|
#include "nvic.h"
|
2013-03-18 22:10:08 +01:00
|
|
|
#include "ram_vectors.h"
|
2009-05-08 23:12:33 +02:00
|
|
|
#include "up_arch.h"
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|
|
|
#include "os_internal.h"
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|
|
|
#include "up_internal.h"
|
2013-01-08 20:27:38 +01:00
|
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|
|
#include "chip.h"
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|
|
#include "lm_gpio.h"
|
2009-05-08 23:12:33 +02:00
|
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|
|
|
|
|
/****************************************************************************
|
2009-12-16 21:05:51 +01:00
|
|
|
* Pre-processor Definitions
|
2009-05-08 23:12:33 +02:00
|
|
|
****************************************************************************/
|
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|
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|
2009-05-17 19:18:19 +02:00
|
|
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/* Get a 32-bit version of the default priority */
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|
2009-05-13 00:15:49 +02:00
|
|
|
#define DEFPRIORITY32 \
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|
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(NVIC_SYSH_PRIORITY_DEFAULT << 24 |\
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NVIC_SYSH_PRIORITY_DEFAULT << 16 |\
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|
NVIC_SYSH_PRIORITY_DEFAULT << 8 |\
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|
NVIC_SYSH_PRIORITY_DEFAULT)
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|
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|
2014-01-15 16:56:30 +01:00
|
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|
/* Given the address of a NVIC ENABLE register, this is the offset to
|
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|
* the corresponding CLEAR ENABLE register.
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|
|
*/
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|
#define NVIC_ENA_OFFSET (0)
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|
#define NVIC_CLRENA_OFFSET (NVIC_IRQ0_31_CLEAR - NVIC_IRQ0_31_ENABLE)
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|
2009-05-08 23:12:33 +02:00
|
|
|
/****************************************************************************
|
|
|
|
* Public Data
|
|
|
|
****************************************************************************/
|
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|
2011-04-07 01:01:06 +02:00
|
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|
volatile uint32_t *current_regs;
|
2009-05-08 23:12:33 +02:00
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Private Data
|
|
|
|
****************************************************************************/
|
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|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Private Functions
|
|
|
|
****************************************************************************/
|
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|
2009-05-17 19:18:19 +02:00
|
|
|
/****************************************************************************
|
2013-01-09 15:48:55 +01:00
|
|
|
* Name: lm_dumpnvic
|
2009-05-17 19:18:19 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Dump some interesting NVIC registers
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|
*
|
|
|
|
****************************************************************************/
|
|
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|
|
2013-08-03 16:22:37 +02:00
|
|
|
#if defined(CONFIG_DEBUG_IRQ)
|
2013-01-09 15:48:55 +01:00
|
|
|
static void lm_dumpnvic(const char *msg, int irq)
|
2009-05-17 19:18:19 +02:00
|
|
|
{
|
2009-05-18 23:08:43 +02:00
|
|
|
irqstate_t flags;
|
|
|
|
|
|
|
|
flags = irqsave();
|
2013-08-03 16:22:37 +02:00
|
|
|
lldbg("NVIC (%s, irq=%d):\n", msg, irq);
|
|
|
|
lldbg(" INTCTRL: %08x VECTAB: %08x\n",
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|
|
|
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
|
2009-05-18 23:08:43 +02:00
|
|
|
#if 0
|
2013-08-03 16:22:37 +02:00
|
|
|
lldbg(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
|
|
|
|
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
|
|
|
|
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
|
2009-05-18 23:08:43 +02:00
|
|
|
#endif
|
2013-08-03 16:22:37 +02:00
|
|
|
lldbg(" IRQ ENABLE: %08x %08x\n",
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|
|
|
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE));
|
|
|
|
lldbg(" SYSH_PRIO: %08x %08x %08x\n",
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|
|
|
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
|
|
|
|
getreg32(NVIC_SYSH12_15_PRIORITY));
|
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|
|
lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
|
2009-05-17 19:18:19 +02:00
|
|
|
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
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|
|
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
|
2013-08-03 16:22:37 +02:00
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|
|
lldbg(" %08x %08x %08x %08x\n",
|
2009-05-17 19:18:19 +02:00
|
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|
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
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|
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
|
2013-08-03 16:22:37 +02:00
|
|
|
lldbg(" %08x %08x %08x %08x\n",
|
2009-05-17 19:18:19 +02:00
|
|
|
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
|
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|
|
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
|
2009-05-18 23:08:43 +02:00
|
|
|
irqrestore(flags);
|
2009-05-17 19:18:19 +02:00
|
|
|
}
|
|
|
|
#else
|
2013-01-09 15:48:55 +01:00
|
|
|
# define lm_dumpnvic(msg, irq)
|
2009-05-17 19:18:19 +02:00
|
|
|
#endif
|
|
|
|
|
2009-05-15 20:03:59 +02:00
|
|
|
/****************************************************************************
|
2013-01-09 15:48:55 +01:00
|
|
|
* Name: lm_nmi, lm_busfault, lm_usagefault, lm_pendsv,
|
|
|
|
* lm_dbgmonitor, lm_pendsv, lm_reserved
|
2009-05-15 20:03:59 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Handlers for various execptions. None are handled and all are fatal
|
|
|
|
* error conditions. The only advantage these provided over the default
|
|
|
|
* unexpected interrupt handler is that they provide a diagnostic output.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
#ifdef CONFIG_DEBUG
|
2013-01-09 15:48:55 +01:00
|
|
|
static int lm_nmi(int irq, FAR void *context)
|
2009-05-15 20:03:59 +02:00
|
|
|
{
|
|
|
|
(void)irqsave();
|
|
|
|
dbg("PANIC!!! NMI received\n");
|
2013-04-25 23:19:59 +02:00
|
|
|
PANIC();
|
2009-05-15 20:03:59 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-01-09 15:48:55 +01:00
|
|
|
static int lm_busfault(int irq, FAR void *context)
|
2009-05-15 20:03:59 +02:00
|
|
|
{
|
|
|
|
(void)irqsave();
|
|
|
|
dbg("PANIC!!! Bus fault recived\n");
|
2013-04-25 23:19:59 +02:00
|
|
|
PANIC();
|
2009-05-15 20:03:59 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-01-09 15:48:55 +01:00
|
|
|
static int lm_usagefault(int irq, FAR void *context)
|
2009-05-15 20:03:59 +02:00
|
|
|
{
|
|
|
|
(void)irqsave();
|
|
|
|
dbg("PANIC!!! Usage fault received\n");
|
2013-04-25 23:19:59 +02:00
|
|
|
PANIC();
|
2009-05-15 20:03:59 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-01-09 15:48:55 +01:00
|
|
|
static int lm_pendsv(int irq, FAR void *context)
|
2009-05-15 20:03:59 +02:00
|
|
|
{
|
|
|
|
(void)irqsave();
|
2009-05-18 23:08:43 +02:00
|
|
|
dbg("PANIC!!! PendSV received\n");
|
2013-04-25 23:19:59 +02:00
|
|
|
PANIC();
|
2009-05-15 20:03:59 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-01-09 15:48:55 +01:00
|
|
|
static int lm_dbgmonitor(int irq, FAR void *context)
|
2009-05-15 20:03:59 +02:00
|
|
|
{
|
|
|
|
(void)irqsave();
|
|
|
|
dbg("PANIC!!! Debug Monitor receieved\n");
|
2013-04-25 23:19:59 +02:00
|
|
|
PANIC();
|
2009-05-15 20:03:59 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-01-09 15:48:55 +01:00
|
|
|
static int lm_reserved(int irq, FAR void *context)
|
2009-05-15 20:03:59 +02:00
|
|
|
{
|
|
|
|
(void)irqsave();
|
|
|
|
dbg("PANIC!!! Reserved interrupt\n");
|
2013-04-25 23:19:59 +02:00
|
|
|
PANIC();
|
2009-05-15 20:03:59 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2013-01-22 02:25:40 +01:00
|
|
|
/****************************************************************************
|
2013-01-22 17:09:10 +01:00
|
|
|
* Name: lm_prioritize_syscall
|
2013-01-22 02:25:40 +01:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Set the priority of an exception. This function may be needed
|
|
|
|
* internally even if support for prioritized interrupts is not enabled.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2013-01-22 17:09:10 +01:00
|
|
|
#ifdef CONFIG_ARMV7M_USEBASEPRI
|
|
|
|
static inline void lm_prioritize_syscall(int priority)
|
2013-01-22 02:25:40 +01:00
|
|
|
{
|
|
|
|
uint32_t regval;
|
|
|
|
|
2013-01-22 17:09:10 +01:00
|
|
|
/* SVCALL is system handler 11 */
|
2013-01-22 02:25:40 +01:00
|
|
|
|
2013-01-22 17:09:10 +01:00
|
|
|
regval = getreg32(NVIC_SYSH8_11_PRIORITY);
|
|
|
|
regval &= ~NVIC_SYSH_PRIORITY_PR11_MASK;
|
|
|
|
regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT);
|
|
|
|
putreg32(regval, NVIC_SYSH8_11_PRIORITY);
|
2013-01-22 02:25:40 +01:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2009-05-13 00:15:49 +02:00
|
|
|
/****************************************************************************
|
2013-01-09 15:48:55 +01:00
|
|
|
* Name: lm_irqinfo
|
2009-05-13 00:15:49 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Given an IRQ number, provide the register and bit setting to enable or
|
|
|
|
* disable the irq.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2014-01-15 16:56:30 +01:00
|
|
|
static int lm_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
|
|
|
|
uintptr_t offset)
|
2009-05-13 00:15:49 +02:00
|
|
|
{
|
2013-01-09 19:15:02 +01:00
|
|
|
DEBUGASSERT(irq >= LM_IRQ_NMI && irq < NR_IRQS);
|
2009-05-13 00:15:49 +02:00
|
|
|
|
|
|
|
/* Check for external interrupt */
|
|
|
|
|
2013-01-09 19:15:02 +01:00
|
|
|
if (irq >= LM_IRQ_INTERRUPTS)
|
2009-05-13 00:15:49 +02:00
|
|
|
{
|
2013-01-09 19:15:02 +01:00
|
|
|
if (irq < LM_IRQ_INTERRUPTS + 32)
|
2009-05-13 00:15:49 +02:00
|
|
|
{
|
2014-01-15 16:56:30 +01:00
|
|
|
*regaddr = (NVIC_IRQ0_31_ENABLE + offset);
|
2013-01-09 19:15:02 +01:00
|
|
|
*bit = 1 << (irq - LM_IRQ_INTERRUPTS);
|
2009-05-13 00:15:49 +02:00
|
|
|
}
|
|
|
|
else if (irq < NR_IRQS)
|
|
|
|
{
|
2014-01-15 16:56:30 +01:00
|
|
|
*regaddr = (NVIC_IRQ32_63_ENABLE + offset);
|
2013-01-09 19:15:02 +01:00
|
|
|
*bit = 1 << (irq - LM_IRQ_INTERRUPTS - 32);
|
2009-05-13 00:15:49 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
return ERROR; /* Invalid interrupt */
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Handler processor exceptions. Only a few can be disabled */
|
|
|
|
|
|
|
|
else
|
|
|
|
{
|
|
|
|
*regaddr = NVIC_SYSHCON;
|
2013-01-09 19:15:02 +01:00
|
|
|
if (irq == LM_IRQ_MEMFAULT)
|
2009-05-13 00:15:49 +02:00
|
|
|
{
|
|
|
|
*bit = NVIC_SYSHCON_MEMFAULTENA;
|
|
|
|
}
|
2013-01-09 19:15:02 +01:00
|
|
|
else if (irq == LM_IRQ_BUSFAULT)
|
2009-05-13 00:15:49 +02:00
|
|
|
{
|
|
|
|
*bit = NVIC_SYSHCON_BUSFAULTENA;
|
|
|
|
}
|
2013-01-09 19:15:02 +01:00
|
|
|
else if (irq == LM_IRQ_USAGEFAULT)
|
2009-05-13 00:15:49 +02:00
|
|
|
{
|
|
|
|
*bit = NVIC_SYSHCON_USGFAULTENA;
|
|
|
|
}
|
2013-01-09 19:15:02 +01:00
|
|
|
else if (irq == LM_IRQ_SYSTICK)
|
2009-05-13 00:15:49 +02:00
|
|
|
{
|
|
|
|
*regaddr = NVIC_SYSTICK_CTRL;
|
|
|
|
*bit = NVIC_SYSTICK_CTRL_ENABLE;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
return ERROR; /* Invalid or unsupported exception */
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
2009-05-08 23:12:33 +02:00
|
|
|
/****************************************************************************
|
2009-05-17 19:18:19 +02:00
|
|
|
* Public Functions
|
2009-05-08 23:12:33 +02:00
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_irqinitialize
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
void up_irqinitialize(void)
|
|
|
|
{
|
2009-05-13 00:15:49 +02:00
|
|
|
/* Disable all interrupts */
|
|
|
|
|
|
|
|
putreg32(0, NVIC_IRQ0_31_ENABLE);
|
|
|
|
putreg32(0, NVIC_IRQ32_63_ENABLE);
|
|
|
|
|
2013-03-18 22:10:08 +01:00
|
|
|
/* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
|
|
|
|
* vector table that requires special initialization.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifdef CONFIG_ARCH_RAMVECTORS
|
|
|
|
up_ramvec_initialize();
|
|
|
|
#endif
|
|
|
|
|
2009-05-13 00:15:49 +02:00
|
|
|
/* Set all interrrupts (and exceptions) to the default priority */
|
|
|
|
|
2009-05-17 19:18:19 +02:00
|
|
|
putreg32(DEFPRIORITY32, NVIC_SYSH4_7_PRIORITY);
|
|
|
|
putreg32(DEFPRIORITY32, NVIC_SYSH8_11_PRIORITY);
|
|
|
|
putreg32(DEFPRIORITY32, NVIC_SYSH12_15_PRIORITY);
|
|
|
|
|
2009-05-13 00:15:49 +02:00
|
|
|
putreg32(DEFPRIORITY32, NVIC_IRQ0_3_PRIORITY);
|
|
|
|
putreg32(DEFPRIORITY32, NVIC_IRQ4_7_PRIORITY);
|
|
|
|
putreg32(DEFPRIORITY32, NVIC_IRQ8_11_PRIORITY);
|
|
|
|
putreg32(DEFPRIORITY32, NVIC_IRQ12_15_PRIORITY);
|
|
|
|
putreg32(DEFPRIORITY32, NVIC_IRQ16_19_PRIORITY);
|
|
|
|
putreg32(DEFPRIORITY32, NVIC_IRQ20_23_PRIORITY);
|
|
|
|
putreg32(DEFPRIORITY32, NVIC_IRQ24_27_PRIORITY);
|
|
|
|
putreg32(DEFPRIORITY32, NVIC_IRQ28_31_PRIORITY);
|
|
|
|
putreg32(DEFPRIORITY32, NVIC_IRQ32_35_PRIORITY);
|
|
|
|
putreg32(DEFPRIORITY32, NVIC_IRQ36_39_PRIORITY);
|
|
|
|
putreg32(DEFPRIORITY32, NVIC_IRQ40_43_PRIORITY);
|
|
|
|
putreg32(DEFPRIORITY32, NVIC_IRQ44_47_PRIORITY);
|
2009-05-08 23:12:33 +02:00
|
|
|
|
|
|
|
/* currents_regs is non-NULL only while processing an interrupt */
|
|
|
|
|
|
|
|
current_regs = NULL;
|
|
|
|
|
2009-05-14 22:50:43 +02:00
|
|
|
/* Initialize support for GPIO interrupts if included in this build */
|
|
|
|
|
2013-01-09 15:48:55 +01:00
|
|
|
#ifndef CONFIG_LM_DISABLE_GPIO_IRQS
|
2009-05-14 22:50:43 +02:00
|
|
|
#ifdef CONFIG_HAVE_WEAKFUNCTIONS
|
|
|
|
if (gpio_irqinitialize != NULL)
|
|
|
|
#endif
|
|
|
|
{
|
|
|
|
gpio_irqinitialize();
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2009-05-18 23:08:43 +02:00
|
|
|
/* Attach the SVCall and Hard Fault exception handlers. The SVCall
|
|
|
|
* exception is used for performing context switches; The Hard Fault
|
|
|
|
* must also be caught because a SVCall may show up as a Hard Fault
|
|
|
|
* under certain conditions.
|
2009-05-13 21:53:16 +02:00
|
|
|
*/
|
|
|
|
|
2013-01-09 19:15:02 +01:00
|
|
|
irq_attach(LM_IRQ_SVCALL, up_svcall);
|
|
|
|
irq_attach(LM_IRQ_HARDFAULT, up_hardfault);
|
2009-05-18 23:08:43 +02:00
|
|
|
|
|
|
|
/* Set the priority of the SVCall interrupt */
|
|
|
|
|
2009-05-14 20:55:22 +02:00
|
|
|
#ifdef CONFIG_ARCH_IRQPRIO
|
2013-01-09 19:15:02 +01:00
|
|
|
/* up_prioritize_irq(LM_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
|
2013-01-22 02:25:40 +01:00
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_ARMV7M_USEBASEPRI
|
2013-01-22 17:09:10 +01:00
|
|
|
lm_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
|
2009-05-14 20:55:22 +02:00
|
|
|
#endif
|
2009-05-13 21:53:16 +02:00
|
|
|
|
2011-04-06 03:51:07 +02:00
|
|
|
/* If the MPU is enabled, then attach and enable the Memory Management
|
|
|
|
* Fault handler.
|
|
|
|
*/
|
|
|
|
|
2011-08-05 23:57:49 +02:00
|
|
|
#ifdef CONFIG_ARMV7M_MPU
|
2013-01-09 19:15:02 +01:00
|
|
|
irq_attach(LM_IRQ_MEMFAULT, up_memfault);
|
|
|
|
up_enable_irq(LM_IRQ_MEMFAULT);
|
2011-04-06 03:51:07 +02:00
|
|
|
#endif
|
|
|
|
|
2009-05-14 20:55:22 +02:00
|
|
|
/* Attach all other processor exceptions (except reset and sys tick) */
|
2009-05-08 23:12:33 +02:00
|
|
|
|
|
|
|
#ifdef CONFIG_DEBUG
|
2013-01-09 19:15:02 +01:00
|
|
|
irq_attach(LM_IRQ_NMI, lm_nmi);
|
2011-08-05 23:57:49 +02:00
|
|
|
#ifndef CONFIG_ARMV7M_MPU
|
2013-01-09 19:15:02 +01:00
|
|
|
irq_attach(LM_IRQ_MEMFAULT, up_memfault);
|
2011-04-06 03:51:07 +02:00
|
|
|
#endif
|
2013-01-09 19:15:02 +01:00
|
|
|
irq_attach(LM_IRQ_BUSFAULT, lm_busfault);
|
|
|
|
irq_attach(LM_IRQ_USAGEFAULT, lm_usagefault);
|
|
|
|
irq_attach(LM_IRQ_PENDSV, lm_pendsv);
|
|
|
|
irq_attach(LM_IRQ_DBGMONITOR, lm_dbgmonitor);
|
|
|
|
irq_attach(LM_IRQ_RESERVED, lm_reserved);
|
2009-05-08 23:12:33 +02:00
|
|
|
#endif
|
|
|
|
|
2013-01-09 15:48:55 +01:00
|
|
|
lm_dumpnvic("initial", NR_IRQS);
|
2009-05-17 19:18:19 +02:00
|
|
|
|
2009-05-08 23:12:33 +02:00
|
|
|
#ifndef CONFIG_SUPPRESS_INTERRUPTS
|
|
|
|
|
|
|
|
/* And finally, enable interrupts */
|
|
|
|
|
2013-01-22 15:37:17 +01:00
|
|
|
irqenable();
|
2009-05-08 23:12:33 +02:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_disable_irq
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Disable the IRQ specified by 'irq'
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
void up_disable_irq(int irq)
|
|
|
|
{
|
2014-01-15 16:56:30 +01:00
|
|
|
uintptr_t regaddr;
|
2009-12-16 21:05:51 +01:00
|
|
|
uint32_t regval;
|
|
|
|
uint32_t bit;
|
2009-05-13 00:15:49 +02:00
|
|
|
|
2014-01-15 16:56:30 +01:00
|
|
|
if (lm_irqinfo(irq, ®addr, &bit, NVIC_CLRENA_OFFSET) == 0)
|
2009-05-13 00:15:49 +02:00
|
|
|
{
|
2014-01-15 22:26:32 +01:00
|
|
|
/* Modify the appropriate bit in the register to disable the interrupt.
|
|
|
|
* For normal interrupts, we need to set the bit in the associated
|
|
|
|
* Interrupt Clear Enable register. For other exceptions, we need to
|
|
|
|
* clear the bit in the System Handler Control and State Register.
|
2014-01-15 16:56:30 +01:00
|
|
|
*/
|
|
|
|
|
|
|
|
if (irq >= LM_IRQ_INTERRUPTS)
|
|
|
|
{
|
2014-01-15 22:26:32 +01:00
|
|
|
putreg32(bit, regaddr);
|
2014-01-15 16:56:30 +01:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2014-01-15 22:26:32 +01:00
|
|
|
regval = getreg32(regaddr);
|
2014-01-15 16:56:30 +01:00
|
|
|
regval &= ~bit;
|
2014-01-15 22:26:32 +01:00
|
|
|
putreg32(regval, regaddr);
|
2014-01-15 16:56:30 +01:00
|
|
|
}
|
2009-05-13 00:15:49 +02:00
|
|
|
}
|
2014-01-15 15:09:19 +01:00
|
|
|
|
2013-01-09 15:48:55 +01:00
|
|
|
lm_dumpnvic("disable", irq);
|
2009-05-08 23:12:33 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_enable_irq
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Enable the IRQ specified by 'irq'
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
void up_enable_irq(int irq)
|
|
|
|
{
|
2014-01-15 16:56:30 +01:00
|
|
|
uintptr_t regaddr;
|
2009-12-16 21:05:51 +01:00
|
|
|
uint32_t regval;
|
|
|
|
uint32_t bit;
|
2009-05-13 00:15:49 +02:00
|
|
|
|
2014-01-15 16:56:30 +01:00
|
|
|
if (lm_irqinfo(irq, ®addr, &bit, NVIC_ENA_OFFSET) == 0)
|
2009-05-13 00:15:49 +02:00
|
|
|
{
|
2014-01-15 22:26:32 +01:00
|
|
|
/* Modify the appropriate bit in the register to enable the interrupt.
|
|
|
|
* For normal interrupts, we need to set the bit in the associated
|
|
|
|
* Interrupt Set Enable register. For other exceptions, we need to
|
|
|
|
* set the bit in the System Handler Control and State Register.
|
|
|
|
*/
|
2009-05-13 00:15:49 +02:00
|
|
|
|
2014-01-15 22:26:32 +01:00
|
|
|
if (irq >= LM_IRQ_INTERRUPTS)
|
|
|
|
{
|
|
|
|
putreg32(bit, regaddr);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
regval = getreg32(regaddr);
|
|
|
|
regval |= bit;
|
|
|
|
putreg32(regval, regaddr);
|
|
|
|
}
|
2009-05-13 00:15:49 +02:00
|
|
|
}
|
2014-01-15 15:09:19 +01:00
|
|
|
|
2013-01-09 15:48:55 +01:00
|
|
|
lm_dumpnvic("enable", irq);
|
2009-05-08 23:12:33 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
2014-01-15 15:09:19 +01:00
|
|
|
* Name: up_ack_irq
|
2009-05-08 23:12:33 +02:00
|
|
|
*
|
|
|
|
* Description:
|
2014-01-15 15:09:19 +01:00
|
|
|
* Acknowledge the IRQ
|
2009-05-08 23:12:33 +02:00
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2014-01-15 15:09:19 +01:00
|
|
|
void up_ack_irq(int irq)
|
2009-05-08 23:12:33 +02:00
|
|
|
{
|
|
|
|
}
|
|
|
|
|
2009-05-13 00:15:49 +02:00
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_prioritize_irq
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Set the priority of an IRQ.
|
|
|
|
*
|
|
|
|
* Since this API is not supported on all architectures, it should be
|
|
|
|
* avoided in common implementations where possible.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
#ifdef CONFIG_ARCH_IRQPRIO
|
|
|
|
int up_prioritize_irq(int irq, int priority)
|
|
|
|
{
|
2009-12-16 21:05:51 +01:00
|
|
|
uint32_t regaddr;
|
|
|
|
uint32_t regval;
|
2009-05-13 00:15:49 +02:00
|
|
|
int shift;
|
|
|
|
|
2013-01-22 02:25:40 +01:00
|
|
|
DEBUGASSERT(irq >= LM_IRQ_MEMFAULT && irq < NR_IRQS &&
|
2013-12-21 18:03:38 +01:00
|
|
|
(unsigned)priority <= NVIC_SYSH_PRIORITY_MIN);
|
2009-05-13 00:15:49 +02:00
|
|
|
|
2013-01-09 19:15:02 +01:00
|
|
|
if (irq < LM_IRQ_INTERRUPTS)
|
2009-05-13 00:15:49 +02:00
|
|
|
{
|
2013-01-22 17:09:10 +01:00
|
|
|
/* NVIC_SYSH_PRIORITY() maps {0..15} to one of three priority
|
|
|
|
* registers (0-3 are invalid)
|
|
|
|
*/
|
|
|
|
|
2009-05-13 00:15:49 +02:00
|
|
|
regaddr = NVIC_SYSH_PRIORITY(irq);
|
2013-01-22 17:09:10 +01:00
|
|
|
irq -= 4;
|
2009-05-13 00:15:49 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2013-01-22 17:09:10 +01:00
|
|
|
/* NVIC_IRQ_PRIORITY() maps {0..} to one of many priority registers */
|
|
|
|
|
2013-01-09 19:15:02 +01:00
|
|
|
irq -= LM_IRQ_INTERRUPTS;
|
2009-05-13 00:15:49 +02:00
|
|
|
regaddr = NVIC_IRQ_PRIORITY(irq);
|
|
|
|
}
|
|
|
|
|
|
|
|
regval = getreg32(regaddr);
|
|
|
|
shift = ((irq & 3) << 3);
|
|
|
|
regval &= ~(0xff << shift);
|
|
|
|
regval |= (priority << shift);
|
|
|
|
putreg32(regval, regaddr);
|
2009-05-17 19:18:19 +02:00
|
|
|
|
2013-01-09 15:48:55 +01:00
|
|
|
lm_dumpnvic("prioritize", irq);
|
2009-05-13 00:15:49 +02:00
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
#endif
|