2023-11-04 21:23:55 +01:00
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=================
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Critical Sections
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=================
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2023-11-04 21:59:24 +01:00
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Types and Effects of Critical Sections
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======================================
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A critical section is a short sequence of code where exclusive execution is
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assured by globally disabling other activities while that code sequence executes.
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When we discuss critical sections here we really refer to one of two mechanisms:
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* **Critical Section proper** A critical section is established by calling
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``enter_critical_section()``; the code sequence exits the critical section by
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calling ``leave_critical_section()``. For the single CPU case, this amounts to
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simply disabling interrupts but is more complex in the SMP case where spinlocks
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are also involved.
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* **Disabling Pre-emption** This is a related mechanism that is lumped into this
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discussion because of the similarity of its effects on the system. When pre-emption
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is disabled (via ``sched_lock()``), interrupts remain enabled, but context switches
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may not occur; the current task is locked in place and cannot be suspended until
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the scheduler is unlocked (via ``sched_unlock()``).
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The use of either mechanism will always harm real-time performance.
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The effects of critical sections on real-time performance is discussed in
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2023-11-05 10:16:13 +01:00
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:doc:`/implementation/preemption_latency`.
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2023-11-04 21:59:24 +01:00
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The end result is that a certain amount of **jitter** is added to the real-time response.
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Critical sections cannot be avoided within the OS and, as a consequence, a certain
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amount of "jitter" in the response time is expected. The important thing is to monitor
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the maximum time that critical sections are in place in order to manage that jitter so
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that the variability in response time is within an acceptable range.
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NOTE: This discussion applies to Normal interrupt processing. Most of this discussion
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does not apply to :doc:`/guides/zerolatencyinterrupts`. Those interrupts are not masked
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in the same fashion and none of the issues address in this page apply to those
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interrupts.
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2023-11-04 21:23:55 +01:00
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Single CPU Critical Sections
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============================
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OS Interfaces
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-------------
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Before we talk about SMP Critical Sections let's first review the internal OS
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interfaces avaiable and what they do in the single CPU case:
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* ``up_irq_save()`` (and its companion, ``up_irq_restore()``). These simple
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interfaces just enable and disable interrupts globally. This is the simplest
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way to establish a critical section in the single CPU case. It does have
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side-effects to real-time behavior as discussed elsewhere.
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* ``up_irq_save()`` should never be called directly, however. Instead, the wrapper
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macros enter_critical_section() (and its companion ``leave_critical_section()``)
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or ``spin_lock_irqsave()`` (and ``spin_unlock_irqrestore()``) should be used.
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In the single CPU case, these macros are defined to be simply ``up_irq_save()``
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(or ``up_irq_save()``). Rather than being called directly, they should always
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be called indirectly through these macros so that the code will function in the
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SMP environment as well.
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* Finally, there is ``sched_lock()`` (and ``sched_unlock()``) that disable (and
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enable) pre-emption. That is, ``sched_lock()`` will lock your kernel thread in
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place and prevent other tasks from running. Interrupts are still enabled, but
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other tasks cannot run.
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Using sched_lock() for Critical Sections – **DON'T**
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----------------------------------------------------
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In the single CPU case, ``sched_lock()`` can do a pretty good job of establishing a
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critical section too. After all, if no other tasks can run on the single CPU,
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then that task has pretty much exclusive access to all resources (provided that
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those resources are not shared with interrupt handlers). However, ``sched_lock()``
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must never be used to establish a critical section because it does not work the
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same way in the SMP case. In the SMP case, locking the scheduer does not provide
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any kind of exclusive access to resources. Tasks running on other CPUs are still
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free to do whatever they wish.
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SMP Critical Sections
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=====================
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``up_irq_save()`` and ``up_irq_restore()``
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------------------------------------------
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As mentioned, ``up_irq_save()`` and ``up_irq_restore()`` should never be called
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directly. That is because the behavior is different in multiple CPU systems. In
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the multiple CPU case, these functions only enable (or disable) interrupts on the
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local CPU. They have no effect on interrupts in the other CPUs and hence really
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accomplish very little. Certainly they do not provide a critical section in any
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sense.
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``enter_critical_section()`` and ``leave_critical_section()``
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-------------------------------------------------------------
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**spinlocks**
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In order to establish a critical section, we also need to employ spinlocks. Spins
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locks are simply loops that execute in one processor. If processor A sets spinlock
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x, then processor B would have to wait for the spinlock like:
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.. code-block:: C
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while (test_and_set(x))
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{
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}
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Where test and set is an atomic operation that sets the value of a memory location
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but also returns its previous value. Here we are talking about atomic in terms of
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memory bus operations: The testing and setting of the memory location must be atomic
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with respect to other bus operations. Special hardware support of some kind is
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necessary to implement ``test_and_set()`` logic.
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When Task A released the lock x, Task B will successfully take the spinlock and
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continue.
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**Implementation**
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Without going into the details of the implementation of ``enter_critical_section()``
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suffice it to say that it (1) disables interrupts on the local CPU and (2) uses
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spinlocks to assure exclusive access to a code sequence across all CPUs.
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NOTE that a critical section is indeed created: While within the critical section,
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the code does have exclusive access to the resource being protected. However the
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behavior is really very different:
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* In the single CPU case, disable interrupts stops all possible activity from any
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other task. The single CPU becomes single threaded and un-interruptible.
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* In the SMP case, tasks continue to run on other CPUs. It is only when those other
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tasks attempt to enter a code sequence protected by the critical section that those
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tasks on other CPUs will be stopped. They will be stopped waiting on a spinlock.
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``spin_lock_irqsave()`` and ``spin_unlock_irqrestore()``
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--------------------------------------------------------
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**Generic Interrupt Controller (GIC)**
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ARM provides a special, optional sub-system called MPCore that provides
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multi-core support. One MPCore component is the Generic Interrupt Controller
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or GIC. The GIC supports 16 inter-processor interrupts and is a key component for
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implementing SMP on those platforms. The are called Software Generated Interrupts
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or SGIs.
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One odd behavior of the GIC is that the SGIs cannot be disabled (at least not
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using the standard ARM global interrupt disable logic). So disabling local
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interrupts does not prevent these GIC interrupts.
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This causes numerous complexities and significant overhead in establishing a
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critical section.
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**ARMv7-M NVIC**
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The GIC is available in all recent ARM architectures. However, most embedded
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ARM7-M multi-core CPUs just incorporate the inter-processor interrupts as a
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normal interrupt that is mask-able via the NVIC (each CPU will have its own NVIC).
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This means in those cases, the critical section logic can be greatly simplified.
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**Implementation**
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For the case of the GIC with no support for disabling interrupts,
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``spin_lock_irqsave()`` and ``spin_unlock_irqstore()`` are equivalent to
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``enter_critical_section()`` and ``leave_critical_section()``. In is only in the
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case where inter-processor interrupts can be disabled that there is a difference.
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In that case, ``spin_lock_irqsave()`` will disable local interrupts and take
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a spinlock. This is really very simple and efficient implementation of a critical
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section.
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There are two important things to note, however:
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* The logic within this critical section must never suspend! For example, if
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code were to call ``spin_lock_irqsave()`` then ``sleep()``, then the sleep
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would occur with the spinlock in the lock state and the whole system could
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be blocked. Rather, ``spin_lock_irqsave()`` can only be used with straight
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line code.
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* This is a different critical section than the one established via
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``enter_critical_section()``. Taking one critical section, does not prevent
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logic on another CPU from taking the other critical section and the result
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is that you make not have the protection that you think you have.
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``sched_lock()`` and ``sched_unlock()``
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---------------------------------------
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Other than some details, the SMP ``sched_lock()`` works much like it does in
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the single CPU case. Here are the caveats:
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* As in the single CPU case, the case that calls ``sched_lock()`` is locked
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in place and cannot be suspected.
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* However, tasks will continue to run on other CPUs so ``sched_lock()`` cannot
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be used as a critical section.
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* Tasks on other CPUs are also locked in place. However, they may opt to suspend
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themselves at any time (say, via ``sleep()``). In that case, only the CPU's
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IDLE task will be permitted to run.
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2023-11-04 21:59:24 +01:00
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The Critical Section Monitor
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============================
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Internal OS Hooks
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-----------------
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**The Critical Section Monitor**
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In order to measure the time that tasks hold critical sections, the OS supports
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a Critical Section Monitor. This is internal instrumentation that records the
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time that a task holds a critical section. It also records the amount of time
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that interrupts are disabled globally. The Critical Section Monitor then retains
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the maximum time that the critical section is in place, both per-task and globally.
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The Critical Section Monitor is enabled with the following setting in the
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configuration::
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CONFIG_SCHED_CRITMONITOR=y
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**Perf Timers interface**
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.. todo:: missing description for perf_xxx interface
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**Per Thread and Global Critical Sections**
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In NuttX critical sections are controlled on a per-task basis. For example,
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consider the following code sequence:
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.. code-block:: C
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irqstate_t flags = enter_critical_section();
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sleep(5);
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leave_critical_section(flags);
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The task, say Task A, establishes the critical section with
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``enter_critical_section()``, but when Task A is suspended by the ``sleep(5)``
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statement, it relinquishes the critical section. The state of the system will
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then be determined by the next task to be resumed, say Task B: Typically, the
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next task will not be in a critical section and so the critical section is
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broken while the task sleeps. That critical section will be re-established when
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that Task A runs again after the sleep time expires.
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However, if Task B that is resumed is also within a critical section, then the
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critical section will be extended even longer! This is why the global time that
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the critical section in place may be longer than any time that an individual
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thread holds the critical section.
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ProcFS
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------
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The OS reports these maximum times via the ProcFS file system, typically
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mounted at ``/proc``:
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* The ``/proc/<ID>/critmon`` pseudo-file reports the per-thread maximum value
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for thread ID = <ID>. There is one instance of this critmon file for each
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active task in the system.
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* The ``/proc/critmon`` pseuo-file reports similar information for the global
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state of the CPU.
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The form of the output from the ``/proc/<ID>/critmon`` file is::
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X.XXXXXXXXX,X.XXXXXXXXX
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Where ``X.XXXXXXXXX`` is the time in seconds with nanosecond precision
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(but not necessarily accuracy, accuracy is dependent on the timing clock
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source). The first number is the maximum time that the held pre-emption
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disabled; the second number number is the longest duration that the critical
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section was held.
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This file cat be read from NSH like:
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.. code-block:: bash
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nsh> cat /proc/1/critmon
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0.000009610,0.000001165
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The form of the output from the ``/proc/critmon`` file is simlar::
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X,X.XXXXXXXXX,X.XXXXXXXXX
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Where the first X is the CPU number and the following two numbers have the
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same interpretation as for ``/proc/<ID>/critmon``. In the single CPU case,
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there will be one line in the pseudo-file with ``X=0``; in the SMP case
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there will be multiple lines, one for each CPU.
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This file can also be read from NSH:
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.. code-block:: bash
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nsh> cat /proc/critmon
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0,0.000009902,0.000023590
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These statistics are cleared each time that the pseudo-file is read so that
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the reported values are the maximum since the last time that the ProcFS pseudo
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file was read.
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``apps/system/critmon``
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-----------------------
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Also available is a application daemon at ``apps/sysem/critmon``. This daemon
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periodically reads the ProcFS files described above and dumps the output to
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stdout. This daemon is enabled with:
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.. code-block:: bash
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nsh> critmon_start
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Csection Monitor: Started: 3
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Csection Monitor: Running: 3
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nsh>
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PRE-EMPTION CSECTION PID DESCRIPTION
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MAX DISABLE MAX TIME
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0.000100767 0.000005242 --- CPU 0
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0.000000292 0.000023590 0 Idle Task
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0.000036696 0.000004078 1 init
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0.000000000 0.000014562 3 Csection Monitor
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...
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And can be stopped with:
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.. code-block:: bash
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nsh> critmon_stop
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Csection Monitor: Stopping: 3
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Csection Monitor: Stopped: 3
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IRQ Monitor and Worst Case Response Time
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========================================
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The IRQ Monitor is additional OS instrumentation. A full discusssion of the
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IRQ Monitor is beyond the scope of this page. Suffice it to say:
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* The IRQ Monitor is enabled with ``CONFIG_SCHED_IRQMONITOR=y``.
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* The data collected by the IRQ Monitor is provided in ``/proc/irqs``.
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* This data can also be viewed using the ``nsh> irqinfo`` command.
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* This data includes the number of interrupts received for each IRQ and the
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time required to process the interrupt, from entry into the attached
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interrupt handler until exit from the interrupt handler.
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From this information we can calculate the worst case response time from
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interrupt request until a task runs that can process the the interrupt.
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That worst cast response time, ``Tresp``, is given by:
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* ``Tresp1 = Tcrit + Tintr + C1``
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* ``Tresp2 = Tintr + Tpreempt + C2``
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* ``Tresp = MAX(Tresp1, Tresp2)``
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Where:
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* ``C1`` and ``C2`` are unknown, irreducible constants that reflect such things as
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hardware interrupt latency and context switching time,
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* ``Tcrit`` is the longest observed time within a critical section,
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* ``Tintr`` is the time required for interrupt handler execution for the event
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of interest, and
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* ``Tpreempt`` is the longest observed time with preemption disabled.
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NOTES:
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#. This calculation assumes that the task of interest is the highest priority task
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in the system. It does not consider the possibility of the responding task being
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delayed due to insufficient priority.
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#. This calculation does not address the case where the interfering task has both
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preemption disabled and holds the critical section. Certainly Tresp1 is valid
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in this case, but Tresp2 is not. There might some additional, unmeasured delay
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after the interrupt and before the responding task can run depending on the order
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in which the critical section is released and preemption is re-enabled:
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* When the task leaves the critical section, the pending interrupt will execute
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immediately with or without preemption enabled.
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* If preemption is enabled first, then the will be no delay after the interrupt
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because preemption will be enabled when the interrupt returns.
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* If the task leaves critical section first, then there will be some small delay
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of unknown duration after the interrupts returns and before the responding
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task can run because preemption will be disabled when the interrupt returns.
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#. This calculation does not address concurrent interrupts. All interrupts run at the
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same priority and if an interrupt request occurs while within an interrupt handler,
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then it must pend until completion of that interrupt. So perhaps the above formula
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for ``Tresp1`` should instead be the following? (This assumes that hardware arbitration
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is such that the interrupt of interest will be deferred by no more than one interrupt).
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Concurrent, nested interrupts might be better supported with prioritized.
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See more: :doc:`/guides/nestedinterrupts`.
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* ``Tresp1 = Tcrit + Tintrmax + Tintr + C1``
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Where:
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* ``Tintrmax`` is the longest interrupt processing time of all interrupt sources
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(excluding the interrupt for the event under consideration).
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What can you do?
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----------------
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What can you do if the timing data indicates that you cannot meet your deadline?
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You have these options:
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#. Use these tools to find the exact function that holds the critical section or
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disables preemption too long. Then optimize that function so that it releases
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that resource sooner. Often critical sections are established over long sequences
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or code when they could be re-designed to use critical sections over shorter code
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sequences.
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#. In some cases, use of critical sections or disabling of pre-emption could replaced
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with a locking semaphore. The scope of the locking effect for the use of such locks
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is not global but is limited only to tasks that share the same resource. Critical
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sections should correctly be used only to protect resources that are shared between
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tasking level logic and interrupt level logic.
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#. Switch to :doc:`/guides/zerolatencyinterrupts`. Those interrupts are not subject
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to most of the issues discussed in this page.
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**NOTE**
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There are a few places in the OS were preemption is disabled via ``sched_lock()`` in
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order to establish a critical section. That is an incorrect use of ``sched_lock()``.
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``sched_lock()`` simply prevents the currently executing task from being suspended.
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For the case of the single CPU platform, that does effectively create a critical
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section: Since no other task can run, the locking task does have exclusive access
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to all resources that are not shared with interrupt level logic.
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But in the multi-CPU SMP case that is not true. ``sched_lock()`` still keeps the
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current task running on CPU from being suspended, but it does not support any
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exclusivity in accesses because there will be other tasks running on other CPUs
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that may access the same resources.
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