2019-08-12 18:06:40 +02:00
|
|
|
/****************************************************************************
|
|
|
|
|
* boards/arm/imxrt/imxrt1050-evk/include/board.h
|
2018-04-12 17:31:09 +02:00
|
|
|
*
|
|
|
|
|
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
|
2018-10-24 00:54:28 +02:00
|
|
|
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
|
|
|
|
* David Sidrane <david_s5@nscdg.com>
|
2018-11-13 13:41:27 +01:00
|
|
|
* Dave Marples <dave@marples.net>
|
2018-04-12 17:31:09 +02:00
|
|
|
*
|
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
|
* modification, are permitted provided that the following conditions
|
|
|
|
|
* are met:
|
|
|
|
|
*
|
|
|
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
|
|
|
* notice, this list of conditions and the following disclaimer.
|
|
|
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
|
|
|
* notice, this list of conditions and the following disclaimer in
|
|
|
|
|
* the documentation and/or other materials provided with the
|
|
|
|
|
* distribution.
|
|
|
|
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
|
|
|
|
* used to endorse or promote products derived from this software
|
|
|
|
|
* without specific prior written permission.
|
|
|
|
|
*
|
|
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
|
|
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
|
|
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
|
|
|
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
|
|
|
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|
|
|
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
|
|
|
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
|
|
|
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
|
|
|
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
|
|
|
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
|
|
|
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
|
|
|
* POSSIBILITY OF SUCH DAMAGE.
|
|
|
|
|
*
|
2019-08-12 18:06:40 +02:00
|
|
|
****************************************************************************/
|
2018-04-12 17:31:09 +02:00
|
|
|
|
2019-08-07 22:49:39 +02:00
|
|
|
#ifndef __BOARDS_ARM_IMXRT_IMXRT1050_EVK_INCLUDE_BOARD_H
|
|
|
|
|
#define __BOARDS_ARM_IMXRT_IMXRT1050_EVK_INCLUDE_BOARD_H
|
2018-04-12 17:31:09 +02:00
|
|
|
|
2019-08-12 18:06:40 +02:00
|
|
|
/****************************************************************************
|
2018-04-12 17:31:09 +02:00
|
|
|
* Included Files
|
2019-08-12 18:06:40 +02:00
|
|
|
****************************************************************************/
|
2018-04-12 17:31:09 +02:00
|
|
|
|
|
|
|
|
#include <nuttx/config.h>
|
|
|
|
|
|
2019-09-29 17:41:16 +02:00
|
|
|
/* Do not include i.MXRT header files here */
|
|
|
|
|
|
2019-08-12 18:06:40 +02:00
|
|
|
/****************************************************************************
|
2018-04-12 17:31:09 +02:00
|
|
|
* Pre-processor Definitions
|
2019-08-12 18:06:40 +02:00
|
|
|
****************************************************************************/
|
2018-09-26 15:57:45 +02:00
|
|
|
|
2019-08-12 18:06:40 +02:00
|
|
|
/* Clocking *****************************************************************/
|
2018-04-12 17:31:09 +02:00
|
|
|
|
2018-10-24 00:54:28 +02:00
|
|
|
/* Set VDD_SOC to 1.25V */
|
2018-04-12 17:31:09 +02:00
|
|
|
|
|
|
|
|
#define IMXRT_VDD_SOC (0x12)
|
|
|
|
|
|
2018-10-24 00:54:28 +02:00
|
|
|
/* Set Arm PLL (PLL1) to fOut = (24Mhz * ARM_PLL_DIV_SELECT/2) / ARM_PODF_DIVISOR
|
|
|
|
|
* 600Mhz = (24Mhz * ARM_PLL_DIV_SELECT/2) / ARM_PODF_DIVISOR
|
|
|
|
|
* ARM_PLL_DIV_SELECT = 100
|
|
|
|
|
* ARM_PODF_DIVISOR = 2
|
|
|
|
|
* 600Mhz = (24Mhz * 100/2) / 2
|
2018-04-12 17:31:09 +02:00
|
|
|
*
|
2018-10-24 00:54:28 +02:00
|
|
|
* AHB_CLOCK_ROOT = PLL1fOut / IMXRT_AHB_PODF_DIVIDER
|
|
|
|
|
* 1Hz to 600 Mhz = 600Mhz / IMXRT_ARM_CLOCK_DIVIDER
|
|
|
|
|
* IMXRT_ARM_CLOCK_DIVIDER = 1
|
|
|
|
|
* 600Mhz = 600Mhz / 1
|
|
|
|
|
*
|
|
|
|
|
* PRE_PERIPH_CLK_SEL = PRE_PERIPH_CLK_SEL_PLL1
|
2019-11-09 00:08:48 +01:00
|
|
|
* PERIPH_CLK_SEL = 1 (0 select PERIPH_CLK2_PODF,
|
|
|
|
|
* 1 select PRE_PERIPH_CLK_SEL_PLL1)
|
2018-10-24 00:54:28 +02:00
|
|
|
* PERIPH_CLK = 600Mhz
|
|
|
|
|
*
|
|
|
|
|
* IPG_CLOCK_ROOT = AHB_CLOCK_ROOT / IMXRT_IPG_PODF_DIVIDER
|
|
|
|
|
* IMXRT_IPG_PODF_DIVIDER = 4
|
|
|
|
|
* 150Mhz = 600Mhz / 4
|
|
|
|
|
*
|
2019-11-09 00:08:48 +01:00
|
|
|
* PERCLK_CLOCK_ROOT = IPG_CLOCK_ROOT / IMXRT_PERCLK_PODF_DIVIDER
|
|
|
|
|
* IMXRT_PERCLK_PODF_DIVIDER = 9
|
|
|
|
|
* 16.6Mhz = 150Mhz / 9
|
2018-10-24 00:54:28 +02:00
|
|
|
*
|
2019-11-09 00:08:48 +01:00
|
|
|
* SEMC_CLK_ROOT = 600Mhz / IMXRT_SEMC_PODF_DIVIDER
|
|
|
|
|
* (labeled AIX_PODF in 18.2)
|
2018-10-24 00:54:28 +02:00
|
|
|
* IMXRT_SEMC_PODF_DIVIDER = 8
|
|
|
|
|
* 75Mhz = 600Mhz / 8
|
|
|
|
|
*
|
|
|
|
|
* Set Sys PLL (PLL2) to fOut = (24Mhz * (20+(2*(DIV_SELECT)))
|
|
|
|
|
* 528Mhz = (24Mhz * (20+(2*(1)))
|
|
|
|
|
*
|
|
|
|
|
* Set USB1 PLL (PLL3) to fOut = (24Mhz * 20)
|
|
|
|
|
* 480Mhz = (24Mhz * 20)
|
2019-11-09 00:08:48 +01:00
|
|
|
*
|
2019-12-12 15:33:05 +01:00
|
|
|
* Set LPSPI PLL3 PFD0 to fOut = (480Mhz / 12 * 18)
|
|
|
|
|
* 720Mhz = (480Mhz / 12 * 18)
|
|
|
|
|
* 90Mhz = (720Mhz / LSPI_PODF_DIVIDER)
|
|
|
|
|
*
|
|
|
|
|
* Set LPI2C PLL3 / 8 to fOut = (480Mhz / 8)
|
|
|
|
|
* 60Mhz = (480Mhz / 8)
|
|
|
|
|
* 12Mhz = (60Mhz / LSPI_PODF_DIVIDER)
|
|
|
|
|
*
|
2019-11-09 00:08:48 +01:00
|
|
|
* These clock frequencies can be verified via the CCM_CLKO1 pin and sending
|
|
|
|
|
* the appropriate clock to it with something like;
|
|
|
|
|
*
|
|
|
|
|
* putreg32( <Clk number> | CCM_CCOSR_CLKO1_EN , IMXRT_CCM_CCOSR);
|
|
|
|
|
* imxrt_config_gpio(GPIO_CCM_CLKO1);
|
2018-04-12 17:31:09 +02:00
|
|
|
*/
|
|
|
|
|
|
2019-11-29 21:54:08 +01:00
|
|
|
#define BOARD_XTAL_FREQUENCY 24000000
|
|
|
|
|
#define IMXRT_PRE_PERIPH_CLK_SEL CCM_CBCMR_PRE_PERIPH_CLK_SEL_PLL1
|
|
|
|
|
#define IMXRT_PERIPH_CLK_SEL CCM_CBCDR_PERIPH_CLK_SEL_PRE_PERIPH
|
|
|
|
|
#define IMXRT_ARM_PLL_DIV_SELECT 100
|
|
|
|
|
#define IMXRT_ARM_PODF_DIVIDER 2
|
|
|
|
|
#define IMXRT_AHB_PODF_DIVIDER 1
|
|
|
|
|
#define IMXRT_IPG_PODF_DIVIDER 4
|
|
|
|
|
#define IMXRT_PERCLK_CLK_SEL CCM_CSCMR1_PERCLK_CLK_SEL_IPG_CLK_ROOT
|
|
|
|
|
#define IMXRT_PERCLK_PODF_DIVIDER 9
|
|
|
|
|
#define IMXRT_SEMC_PODF_DIVIDER 8
|
|
|
|
|
#define IMXRT_LPSPI_CLK_SELECT CCM_CBCMR_LPSPI_CLK_SEL_PLL3_PFD0
|
|
|
|
|
#define IMXRT_LSPI_PODF_DIVIDER 8
|
2019-12-12 15:33:05 +01:00
|
|
|
|
|
|
|
|
#define IMXRT_LPSPI_CLK_SELECT CCM_CBCMR_LPSPI_CLK_SEL_PLL3_PFD0
|
|
|
|
|
#define IMXRT_LSPI_PODF_DIVIDER 8
|
|
|
|
|
|
|
|
|
|
#define IMXRT_LPI2C_CLK_SELECT CCM_CSCDR2_LPI2C_CLK_SEL_PLL3_60M
|
|
|
|
|
#define IMXRT_LSI2C_PODF_DIVIDER 5
|
|
|
|
|
|
2018-11-09 01:52:50 +01:00
|
|
|
#define IMXRT_USDHC1_CLK_SELECT CCM_CSCMR1_USDHC1_CLK_SEL_PLL2_PFD0
|
2019-11-29 21:54:08 +01:00
|
|
|
#define IMXRT_USDHC1_PODF_DIVIDER 2
|
2018-04-12 17:31:09 +02:00
|
|
|
|
2019-11-29 21:54:08 +01:00
|
|
|
#define IMXRT_SYS_PLL_SELECT CCM_ANALOG_PLL_SYS_DIV_SELECT_22
|
2018-04-12 17:31:09 +02:00
|
|
|
|
2020-01-13 21:34:17 +01:00
|
|
|
#define IMXRT_USB1_PLL_DIV_SELECT CCM_ANALOG_PLL_USB1_DIV_SELECT_20
|
|
|
|
|
|
2018-04-12 17:31:09 +02:00
|
|
|
#define BOARD_CPU_FREQUENCY \
|
2018-10-24 00:54:28 +02:00
|
|
|
(BOARD_XTAL_FREQUENCY * (IMXRT_ARM_PLL_DIV_SELECT / 2)) / IMXRT_ARM_PODF_DIVIDER
|
2018-04-12 17:31:09 +02:00
|
|
|
|
2019-11-29 21:54:08 +01:00
|
|
|
/* Define this to enable tracing */
|
|
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
|
# define IMXRT_TRACE_PODF_DIVIDER 1
|
|
|
|
|
# define IMXRT_TRACE_CLK_SELECT CCM_CBCMR_TRACE_CLK_SEL_PLL2_PFD0
|
|
|
|
|
#endif
|
|
|
|
|
|
2019-08-12 18:06:40 +02:00
|
|
|
/* LED definitions **********************************************************/
|
2018-11-12 20:47:44 +01:00
|
|
|
|
2019-08-12 18:06:40 +02:00
|
|
|
/* There are four LED status indicators located on the EVK Board.
|
|
|
|
|
* The functions of these LEDs include:
|
2018-04-12 17:31:09 +02:00
|
|
|
*
|
|
|
|
|
* - Main Power Supply(D3)
|
|
|
|
|
* Green: DC 5V main supply is normal.
|
|
|
|
|
* Red: J2 input voltage is over 5.6V.
|
|
|
|
|
* Off: The board is not powered.
|
|
|
|
|
* - Reset RED LED(D15)
|
|
|
|
|
* - OpenSDA LED(D16)
|
|
|
|
|
* - USER LED(D18)
|
|
|
|
|
*
|
|
|
|
|
* Only a single LED, D18, is under software control.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
/* LED index values for use with board_userled() */
|
|
|
|
|
|
|
|
|
|
#define BOARD_USERLED 0
|
|
|
|
|
#define BOARD_NLEDS 1
|
|
|
|
|
|
|
|
|
|
/* LED bits for use with board_userled_all() */
|
|
|
|
|
|
|
|
|
|
#define BOARD_USERLED_BIT (1 << BOARD_USERLED)
|
|
|
|
|
|
|
|
|
|
/* This LED is not used by the board port unless CONFIG_ARCH_LEDS is
|
|
|
|
|
* defined. In that case, the usage by the board port is defined in
|
2018-06-09 00:27:14 +02:00
|
|
|
* include/board.h and src/imxrt_autoleds.c. The LED is used to encode
|
2018-04-12 17:31:09 +02:00
|
|
|
* OS-related events as follows:
|
|
|
|
|
*
|
|
|
|
|
* -------------------- ----------------------------- ------
|
|
|
|
|
* SYMBOL Meaning LED
|
2019-08-12 18:06:40 +02:00
|
|
|
* -------------------- ----------------------------- ------
|
|
|
|
|
*/
|
2018-04-12 17:31:09 +02:00
|
|
|
|
|
|
|
|
#define LED_STARTED 0 /* NuttX has been started OFF */
|
|
|
|
|
#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF */
|
|
|
|
|
#define LED_IRQSENABLED 0 /* Interrupts enabled OFF */
|
|
|
|
|
#define LED_STACKCREATED 1 /* Idle stack created ON */
|
|
|
|
|
#define LED_INIRQ 2 /* In an interrupt N/C */
|
|
|
|
|
#define LED_SIGNAL 2 /* In a signal handler N/C */
|
|
|
|
|
#define LED_ASSERTION 2 /* An assertion failed N/C */
|
|
|
|
|
#define LED_PANIC 3 /* The system has crashed FLASH */
|
|
|
|
|
#undef LED_IDLE /* Not used */
|
|
|
|
|
|
|
|
|
|
/* Thus if the LED is statically on, NuttX has successfully booted and is,
|
|
|
|
|
* apparently, running normally. If the LED is flashing at approximately
|
|
|
|
|
* 2Hz, then a fatal error has been detected and the system has halted.
|
|
|
|
|
*/
|
|
|
|
|
|
2019-08-12 18:06:40 +02:00
|
|
|
/* Button definitions *******************************************************/
|
2018-11-12 20:47:44 +01:00
|
|
|
|
2018-05-01 22:41:19 +02:00
|
|
|
/* The IMXRT board has one external user button
|
|
|
|
|
*
|
2018-05-02 17:19:42 +02:00
|
|
|
* 1. SW8 (IRQ88) GPIO5-00
|
2018-05-01 22:41:19 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#define BUTTON_SW8 0
|
|
|
|
|
|
|
|
|
|
#define BUTTON_SW8_BIT (1 << BUTTON_SW8)
|
2018-04-12 17:31:09 +02:00
|
|
|
|
2019-08-12 18:06:40 +02:00
|
|
|
/* SDIO *********************************************************************/
|
2018-11-01 01:25:19 +01:00
|
|
|
|
2019-08-12 18:06:40 +02:00
|
|
|
/* Pin drive characteristics - drive strength in particular may need tuning
|
|
|
|
|
* for specific boards, but has been checked by scope on the EVKB to make
|
|
|
|
|
* sure shapes are square with minimal ringing.
|
2018-11-12 20:47:44 +01:00
|
|
|
*/
|
2018-11-01 01:25:19 +01:00
|
|
|
|
2019-11-09 00:08:48 +01:00
|
|
|
#define PIN_USDHC1_D0 (GPIO_USDHC1_DATA0 | IOMUX_USDHC1_DATAX_DEFAULT)
|
|
|
|
|
#define PIN_USDHC1_D1 (GPIO_USDHC1_DATA1 | IOMUX_USDHC1_DATAX_DEFAULT)
|
|
|
|
|
#define PIN_USDHC1_D2 (GPIO_USDHC1_DATA2 | IOMUX_USDHC1_DATAX_DEFAULT)
|
|
|
|
|
#define PIN_USDHC1_D3 (GPIO_USDHC1_DATA3 | IOMUX_USDHC1_DATAX_DEFAULT)
|
|
|
|
|
#define PIN_USDHC1_DCLK (GPIO_USDHC1_CLK | IOMUX_USDHC1_CLK_DEFAULT)
|
|
|
|
|
#define PIN_USDHC1_CMD (GPIO_USDHC1_CMD | IOMUX_USDHC1_CMD_DEFAULT)
|
|
|
|
|
#define PIN_USDHC1_CD (GPIO_USDHC1_CD_2 | IOMUX_USDHC1_CLK_DEFAULT)
|
2018-11-01 01:25:19 +01:00
|
|
|
|
|
|
|
|
/* 386 KHz for initial inquiry stuff */
|
|
|
|
|
|
|
|
|
|
#define BOARD_USDHC_IDMODE_PRESCALER USDHC_SYSCTL_SDCLKFS_DIV256
|
|
|
|
|
#define BOARD_USDHC_IDMODE_DIVISOR USDHC_SYSCTL_DVS_DIV(2)
|
|
|
|
|
|
|
|
|
|
/* 24.8MHz for other modes */
|
|
|
|
|
|
|
|
|
|
#define BOARD_USDHC_MMCMODE_PRESCALER USDHC_SYSCTL_SDCLKFS_DIV8
|
2018-11-13 13:41:27 +01:00
|
|
|
#define BOARD_USDHC_MMCMODE_DIVISOR USDHC_SYSCTL_DVS_DIV(1)
|
2018-11-01 01:25:19 +01:00
|
|
|
|
|
|
|
|
#define BOARD_USDHC_SD1MODE_PRESCALER USDHC_SYSCTL_SDCLKFS_DIV8
|
2018-11-13 13:41:27 +01:00
|
|
|
#define BOARD_USDHC_SD1MODE_DIVISOR USDHC_SYSCTL_DVS_DIV(1)
|
2018-11-01 01:25:19 +01:00
|
|
|
|
|
|
|
|
#define BOARD_USDHC_SD4MODE_PRESCALER USDHC_SYSCTL_SDCLKFS_DIV8
|
2018-11-13 13:41:27 +01:00
|
|
|
#define BOARD_USDHC_SD4MODE_DIVISOR USDHC_SYSCTL_DVS_DIV(1)
|
2018-11-01 01:25:19 +01:00
|
|
|
|
2019-11-09 19:18:13 +01:00
|
|
|
/* LCD *********************************************************************/
|
2019-11-09 00:08:48 +01:00
|
|
|
|
2019-11-09 19:18:13 +01:00
|
|
|
#ifdef CONFIG_IMXRT_LCD
|
|
|
|
|
/* LCD controller */
|
|
|
|
|
|
|
|
|
|
# define GPIO_LCD_DATA23 GPIO_LCD_DATA23_1
|
|
|
|
|
# define GPIO_LCD_DATA22 GPIO_LCD_DATA22_1
|
|
|
|
|
# define GPIO_LCD_DATA21 GPIO_LCD_DATA21_1
|
|
|
|
|
# define GPIO_LCD_DATA20 GPIO_LCD_DATA20_1
|
|
|
|
|
# define GPIO_LCD_DATA19 GPIO_LCD_DATA19_1
|
|
|
|
|
# define GPIO_LCD_DATA18 GPIO_LCD_DATA18_1
|
|
|
|
|
# define GPIO_LCD_DATA17 GPIO_LCD_DATA17_1
|
|
|
|
|
# define GPIO_LCD_DATA16 GPIO_LCD_DATA16_1
|
|
|
|
|
# define GPIO_LCD_DATA15 GPIO_LCD_DATA15_1
|
|
|
|
|
# define GPIO_LCD_DATA14 GPIO_LCD_DATA14_1
|
|
|
|
|
# define GPIO_LCD_DATA13 GPIO_LCD_DATA13_1
|
|
|
|
|
# define GPIO_LCD_DATA12 GPIO_LCD_DATA12_1
|
|
|
|
|
# define GPIO_LCD_DATA11 GPIO_LCD_DATA11_1
|
|
|
|
|
# define GPIO_LCD_DATA10 GPIO_LCD_DATA10_1
|
|
|
|
|
# define GPIO_LCD_DATA09 GPIO_LCD_DATA09_1
|
|
|
|
|
# define GPIO_LCD_DATA08 GPIO_LCD_DATA08_1
|
|
|
|
|
# define GPIO_LCD_DATA07 GPIO_LCD_DATA07_1
|
|
|
|
|
# define GPIO_LCD_DATA06 GPIO_LCD_DATA06_1
|
|
|
|
|
# define GPIO_LCD_DATA05 GPIO_LCD_DATA05_1
|
|
|
|
|
# define GPIO_LCD_DATA04 GPIO_LCD_DATA04_1
|
|
|
|
|
# define GPIO_LCD_DATA03 GPIO_LCD_DATA03_1
|
|
|
|
|
# define GPIO_LCD_DATA02 GPIO_LCD_DATA02_1
|
|
|
|
|
# define GPIO_LCD_DATA01 GPIO_LCD_DATA01_1
|
|
|
|
|
# define GPIO_LCD_DATA00 GPIO_LCD_DATA00_1
|
|
|
|
|
# define GPIO_LCD_ENABLE GPIO_LCD_ENABLE_1
|
|
|
|
|
# define GPIO_LCD_HSYNC GPIO_LCD_HSYNC_1
|
|
|
|
|
# define GPIO_LCD_VSYNC GPIO_LCD_VSYNC_1
|
|
|
|
|
# define GPIO_LCD_CLK GPIO_LCD_CLK_1
|
|
|
|
|
#endif
|
2019-11-09 00:08:48 +01:00
|
|
|
|
2019-08-12 18:06:40 +02:00
|
|
|
/* ETH Disambiguation *******************************************************/
|
|
|
|
|
|
2019-11-09 00:08:48 +01:00
|
|
|
#define GPIO_ENET_TX_DATA00 (GPIO_ENET_TX_DATA00_1| \
|
|
|
|
|
IOMUX_ENET_DATA_DEFAULT) /* GPIO_B1_07 */
|
|
|
|
|
#define GPIO_ENET_TX_DATA01 (GPIO_ENET_TX_DATA01_1| \
|
|
|
|
|
IOMUX_ENET_DATA_DEFAULT) /* GPIO_B1_08 */
|
|
|
|
|
#define GPIO_ENET_RX_DATA00 (GPIO_ENET_RX_DATA00_1| \
|
|
|
|
|
IOMUX_ENET_DATA_DEFAULT) /* GPIO_B1_04 */
|
|
|
|
|
#define GPIO_ENET_RX_DATA01 (GPIO_ENET_RX_DATA01_1| \
|
|
|
|
|
IOMUX_ENET_DATA_DEFAULT) /* GPIO_B1_05 */
|
|
|
|
|
#define GPIO_ENET_MDIO (GPIO_ENET_MDIO_3|IOMUX_ENET_MDIO_DEFAULT) /* GPIO_EMC_41 */
|
|
|
|
|
#define GPIO_ENET_MDC (GPIO_ENET_MDC_3|IOMUX_ENET_MDC_DEFAULT) /* GPIO_EMC_40 */
|
|
|
|
|
#define GPIO_ENET_RX_EN (GPIO_ENET_RX_EN_1|IOMUX_ENET_EN_DEFAULT) /* GPIO_B1_06 */
|
|
|
|
|
#define GPIO_ENET_RX_ER (GPIO_ENET_RX_ER_1|IOMUX_ENET_RXERR_DEFAULT) /* GPIO_B1_11 */
|
|
|
|
|
#define GPIO_ENET_TX_CLK (GPIO_ENET_REF_CLK_2|\
|
|
|
|
|
IOMUX_ENET_TX_CLK_DEFAULT) /* GPIO_B1_10 */
|
|
|
|
|
#define GPIO_ENET_TX_EN (GPIO_ENET_TX_EN_1|IOMUX_ENET_EN_DEFAULT) /* GPIO_B1_09 */
|
2019-05-01 00:08:46 +02:00
|
|
|
|
2019-08-12 18:06:40 +02:00
|
|
|
/* PIO Disambiguation *******************************************************/
|
2018-11-12 20:47:44 +01:00
|
|
|
|
2018-05-15 00:07:34 +02:00
|
|
|
/* LPUARTs
|
|
|
|
|
*
|
2019-11-09 00:08:48 +01:00
|
|
|
* Virtual console port provided by OpenSDA on UART1 and
|
|
|
|
|
* Arduino RS-232 Shield on UART3.
|
2018-05-15 00:07:34 +02:00
|
|
|
*
|
|
|
|
|
*/
|
|
|
|
|
|
2019-11-09 00:08:48 +01:00
|
|
|
#define GPIO_LPUART1_RX (GPIO_LPUART1_RX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B0_13 */
|
|
|
|
|
#define GPIO_LPUART1_TX (GPIO_LPUART1_TX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B0_12 */
|
|
|
|
|
#define GPIO_LPUART3_RX (GPIO_LPUART3_RX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B1_07 */
|
|
|
|
|
#define GPIO_LPUART3_TX (GPIO_LPUART3_TX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B1_06 */
|
2018-05-15 00:07:34 +02:00
|
|
|
|
2018-09-26 15:57:45 +02:00
|
|
|
/* LPI2Cs
|
|
|
|
|
*
|
2019-11-09 00:08:48 +01:00
|
|
|
* Arduino Connector LPI2C1 and audio/gyro IO on LPI2C3.
|
2018-09-26 15:57:45 +02:00
|
|
|
*/
|
|
|
|
|
|
2019-11-09 00:08:48 +01:00
|
|
|
#define GPIO_LPI2C1_SDA (GPIO_LPI2C1_SDA_2|IOMUX_LPI2C_DEFAULT) /* GPIO_AD_B1_01 */
|
|
|
|
|
#define GPIO_LPI2C1_SCL (GPIO_LPI2C1_SCL_2|IOMUX_LPI2C_DEFAULT) /* GPIO_AD_B1_00 */
|
|
|
|
|
#define GPIO_LPI2C3_SDA (GPIO_LPI2C3_SDA_2|IOMUX_LPI2C_DEFAULT) /* GPIO_AD_B1_01 */
|
|
|
|
|
#define GPIO_LPI2C3_SCL (GPIO_LPI2C3_SCL_2|IOMUX_LPI2C_DEFAULT) /* GPIO_AD_B1_00 */
|
2018-10-13 14:38:33 +02:00
|
|
|
|
2018-10-31 19:50:05 +01:00
|
|
|
/* LPSPI
|
|
|
|
|
*
|
|
|
|
|
* Arduino Connector
|
|
|
|
|
*
|
|
|
|
|
* J24 D09 GPIO_AD_B0_02 LPSPI3_SDI
|
|
|
|
|
* J24 D14 GPIO_AD_B0_01 LPSPI3_SDO
|
|
|
|
|
* J24 D15 GPIO_AD_B0_00 LPSPI3_SCK
|
|
|
|
|
*/
|
|
|
|
|
|
2019-11-09 00:08:48 +01:00
|
|
|
#define GPIO_LPSPI3_SCK (GPIO_LPSPI3_SCK_2|IOMUX_LPSPI_DEFAULT) /* GPIO_AD_B0_00 */
|
|
|
|
|
#define GPIO_LPSPI3_MISO (GPIO_LPSPI3_SDI_2|IOMUX_LPSPI_DEFAULT) /* GPIO_AD_B0_02 */
|
|
|
|
|
#define GPIO_LPSPI3_MOSI (GPIO_LPSPI3_SDO_2|IOMUX_LPSPI_DEFAULT) /* GPIO_AD_B0_01 */
|
2018-10-31 19:50:05 +01:00
|
|
|
|
2019-08-12 18:06:40 +02:00
|
|
|
/****************************************************************************
|
2018-04-12 17:31:09 +02:00
|
|
|
* Public Types
|
2019-08-12 18:06:40 +02:00
|
|
|
****************************************************************************/
|
2018-04-12 17:31:09 +02:00
|
|
|
|
2019-08-12 18:06:40 +02:00
|
|
|
/****************************************************************************
|
2018-04-12 17:31:09 +02:00
|
|
|
* Public Data
|
2019-08-12 18:06:40 +02:00
|
|
|
****************************************************************************/
|
2018-04-12 17:31:09 +02:00
|
|
|
|
|
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
|
|
|
|
|
|
#undef EXTERN
|
|
|
|
|
#if defined(__cplusplus)
|
|
|
|
|
#define EXTERN extern "C"
|
|
|
|
|
extern "C"
|
|
|
|
|
{
|
|
|
|
|
#else
|
|
|
|
|
#define EXTERN extern
|
|
|
|
|
#endif
|
|
|
|
|
|
2019-08-12 18:06:40 +02:00
|
|
|
/****************************************************************************
|
2018-04-12 17:31:09 +02:00
|
|
|
* Public Functions
|
2019-08-12 18:06:40 +02:00
|
|
|
****************************************************************************/
|
2018-04-12 17:31:09 +02:00
|
|
|
|
|
|
|
|
#undef EXTERN
|
|
|
|
|
#if defined(__cplusplus)
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#endif /* __ASSEMBLY__ */
|
2019-08-07 22:49:39 +02:00
|
|
|
#endif /* __BOARDS_ARM_IMXRT_IMXRT1050_EVK_INCLUDE_BOARD_H */
|
