481 lines
12 KiB
ArmAsm
481 lines
12 KiB
ArmAsm
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/****************************************************************************
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* libs/libc/machine/xtensa/arch_memset.S
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include "xtensa_asm.h"
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#include <arch/chip/core-isa.h>
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#include <arch/xtensa/xtensa_abi.h>
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/****************************************************************************
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* Pre-processor Macros
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****************************************************************************/
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/* set to 1 when running on ISS (simulator) with the
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lint or ferret client, or 0 to save a few cycles */
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#define SIM_CHECKS_ALIGNMENT 0
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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.text
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.begin schedule
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.global memmove
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/*
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* Byte by byte copy
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*/
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.align 4
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.byte 0 # 1 mod 4 alignment for LOOPNEZ
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# (0 mod 4 alignment for LBEG)
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.Lbytecopy:
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#if XCHAL_HAVE_LOOPS
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loopnez a4, .Lbytecopydone
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#else /* !XCHAL_HAVE_LOOPS */
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beqz a4, .Lbytecopydone
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add a7, a3, a4 # a7 = end address for source
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#endif /* !XCHAL_HAVE_LOOPS */
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.Lnextbyte:
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l8ui a6, a3, 0
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addi a3, a3, 1
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s8i a6, a5, 0
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addi a5, a5, 1
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#if !XCHAL_HAVE_LOOPS
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bne a3, a7, .Lnextbyte # continue loop if $a3:src != $a7:src_end
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#endif /* !XCHAL_HAVE_LOOPS */
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.Lbytecopydone:
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RET(16)
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/*
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* Destination is unaligned
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*/
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.align 4
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.Ldst1mod2: # dst is only byte aligned
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_bltui a4, 7, .Lbytecopy # do short copies byte by byte
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# copy 1 byte
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l8ui a6, a3, 0
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addi a3, a3, 1
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addi a4, a4, -1
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s8i a6, a5, 0
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addi a5, a5, 1
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_bbci.l a5, 1, .Ldstaligned # if dst is now aligned, then
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# return to main algorithm
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.Ldst2mod4: # dst 16-bit aligned
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# copy 2 bytes
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_bltui a4, 6, .Lbytecopy # do short copies byte by byte
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l8ui a6, a3, 0
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l8ui a7, a3, 1
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addi a3, a3, 2
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addi a4, a4, -2
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s8i a6, a5, 0
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s8i a7, a5, 1
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addi a5, a5, 2
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j .Ldstaligned # dst is now aligned, return to main algorithm
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.Lcommon:
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bbsi.l a2, 0, .Ldst1mod2 # if dst is 1 mod 2
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bbsi.l a2, 1, .Ldst2mod4 # if dst is 2 mod 4
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.Ldstaligned: # return here from .Ldst?mod? once dst is aligned
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srli a7, a4, 4 # number of loop iterations with 16B
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# per iteration
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movi a8, 3 # if source is not aligned,
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bany a3, a8, .Lsrcunaligned # then use shifting copy
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/*
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* Destination and source are word-aligned, use word copy.
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*/
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# copy 16 bytes per iteration for word-aligned dst and word-aligned src
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#if XCHAL_HAVE_LOOPS
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loopnez a7, .Loop1done
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#else /* !XCHAL_HAVE_LOOPS */
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beqz a7, .Loop1done
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slli a8, a7, 4
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add a8, a8, a3 # a8 = end of last 16B source chunk
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#endif /* !XCHAL_HAVE_LOOPS */
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.Loop1:
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l32i a6, a3, 0
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l32i a7, a3, 4
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s32i a6, a5, 0
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l32i a6, a3, 8
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s32i a7, a5, 4
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l32i a7, a3, 12
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s32i a6, a5, 8
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addi a3, a3, 16
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s32i a7, a5, 12
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addi a5, a5, 16
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#if !XCHAL_HAVE_LOOPS
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bne a3, a8, .Loop1 # continue loop if a3:src != a8:src_end
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#endif /* !XCHAL_HAVE_LOOPS */
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.Loop1done:
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bbci.l a4, 3, .L2
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# copy 8 bytes
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l32i a6, a3, 0
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l32i a7, a3, 4
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addi a3, a3, 8
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s32i a6, a5, 0
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s32i a7, a5, 4
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addi a5, a5, 8
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.L2:
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bbsi.l a4, 2, .L3
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bbsi.l a4, 1, .L4
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bbsi.l a4, 0, .L5
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RET(16)
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.L3:
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# copy 4 bytes
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l32i a6, a3, 0
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addi a3, a3, 4
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s32i a6, a5, 0
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addi a5, a5, 4
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bbsi.l a4, 1, .L4
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bbsi.l a4, 0, .L5
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RET(16)
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.L4:
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# copy 2 bytes
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l16ui a6, a3, 0
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addi a3, a3, 2
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s16i a6, a5, 0
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addi a5, a5, 2
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bbsi.l a4, 0, .L5
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RET(16)
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.L5:
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# copy 1 byte
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l8ui a6, a3, 0
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s8i a6, a5, 0
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RET(16)
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/*
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* Destination is aligned, Source is unaligned
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*/
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.align 4
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.Lsrcunaligned:
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_beqz a4, .Ldone # avoid loading anything for zero-length copies
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# copy 16 bytes per iteration for word-aligned dst and unaligned src
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ssa8 a3 # set shift amount from byte offset
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#if XCHAL_UNALIGNED_LOAD_EXCEPTION || SIM_CHECKS_ALIGNMENT
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and a11, a3, a8 # save unalignment offset for below
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sub a3, a3, a11 # align a3
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#endif
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l32i a6, a3, 0 # load first word
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#if XCHAL_HAVE_LOOPS
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loopnez a7, .Loop2done
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#else /* !XCHAL_HAVE_LOOPS */
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beqz a7, .Loop2done
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slli a10, a7, 4
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add a10, a10, a3 # a10 = end of last 16B source chunk
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#endif /* !XCHAL_HAVE_LOOPS */
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.Loop2:
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l32i a7, a3, 4
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l32i a8, a3, 8
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src_b a6, a6, a7
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s32i a6, a5, 0
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l32i a9, a3, 12
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src_b a7, a7, a8
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s32i a7, a5, 4
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l32i a6, a3, 16
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src_b a8, a8, a9
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s32i a8, a5, 8
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addi a3, a3, 16
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src_b a9, a9, a6
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s32i a9, a5, 12
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addi a5, a5, 16
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#if !XCHAL_HAVE_LOOPS
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bne a3, a10, .Loop2 # continue loop if a3:src != a10:src_end
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#endif /* !XCHAL_HAVE_LOOPS */
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.Loop2done:
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bbci.l a4, 3, .L12
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# copy 8 bytes
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l32i a7, a3, 4
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l32i a8, a3, 8
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src_b a6, a6, a7
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s32i a6, a5, 0
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addi a3, a3, 8
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src_b a7, a7, a8
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s32i a7, a5, 4
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addi a5, a5, 8
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mov a6, a8
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.L12:
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bbci.l a4, 2, .L13
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# copy 4 bytes
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l32i a7, a3, 4
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addi a3, a3, 4
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src_b a6, a6, a7
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s32i a6, a5, 0
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addi a5, a5, 4
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mov a6, a7
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.L13:
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#if XCHAL_UNALIGNED_LOAD_EXCEPTION || SIM_CHECKS_ALIGNMENT
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add a3, a3, a11 # readjust a3 with correct misalignment
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#endif
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bbsi.l a4, 1, .L14
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bbsi.l a4, 0, .L15
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.Ldone: RET(16)
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.L14:
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# copy 2 bytes
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l8ui a6, a3, 0
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l8ui a7, a3, 1
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addi a3, a3, 2
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s8i a6, a5, 0
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s8i a7, a5, 1
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addi a5, a5, 2
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bbsi.l a4, 0, .L15
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RET(16)
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.L15:
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# copy 1 byte
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l8ui a6, a3, 0
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s8i a6, a5, 0
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RET(16)
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/*
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* Byte by byte copy
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*/
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.align 4
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.byte 0 # 1 mod 4 alignment for LOOPNEZ
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# (0 mod 4 alignment for LBEG)
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.Lbackbytecopy:
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#if XCHAL_HAVE_LOOPS
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loopnez a4, .Lbackbytecopydone
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#else /* !XCHAL_HAVE_LOOPS */
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beqz a4, .Lbackbytecopydone
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sub a7, a3, a4 # a7 = start address for source
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#endif /* !XCHAL_HAVE_LOOPS */
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.Lbacknextbyte:
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addi a3, a3, -1
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l8ui a6, a3, 0
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addi a5, a5, -1
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s8i a6, a5, 0
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#if !XCHAL_HAVE_LOOPS
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bne a3, a7, .Lbacknextbyte # continue loop if
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# $a3:src != $a7:src_start
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#endif /* !XCHAL_HAVE_LOOPS */
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.Lbackbytecopydone:
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RET(16)
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/*
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* Destination is unaligned
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*/
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.align 4
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.Lbackdst1mod2: # dst is only byte aligned
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_bltui a4, 7, .Lbackbytecopy # do short copies byte by byte
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# copy 1 byte
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addi a3, a3, -1
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l8ui a6, a3, 0
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addi a5, a5, -1
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s8i a6, a5, 0
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addi a4, a4, -1
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_bbci.l a5, 1, .Lbackdstaligned # if dst is now aligned, then
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# return to main algorithm
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.Lbackdst2mod4: # dst 16-bit aligned
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# copy 2 bytes
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_bltui a4, 6, .Lbackbytecopy # do short copies byte by byte
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addi a3, a3, -2
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l8ui a6, a3, 0
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l8ui a7, a3, 1
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addi a5, a5, -2
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s8i a6, a5, 0
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s8i a7, a5, 1
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addi a4, a4, -2
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j .Lbackdstaligned # dst is now aligned,
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# return to main algorithm
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.align 4
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memmove:
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ENTRY(16)
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# a2/ dst, a3/ src, a4/ len
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mov a5, a2 # copy dst so that a2 is return value
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.Lmovecommon:
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sub a6, a5, a3
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bgeu a6, a4, .Lcommon
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add a5, a5, a4
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add a3, a3, a4
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bbsi.l a5, 0, .Lbackdst1mod2 # if dst is 1 mod 2
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bbsi.l a5, 1, .Lbackdst2mod4 # if dst is 2 mod 4
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.Lbackdstaligned: # return here from .Lbackdst?mod? once dst is aligned
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srli a7, a4, 4 # number of loop iterations with 16B
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# per iteration
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movi a8, 3 # if source is not aligned,
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bany a3, a8, .Lbacksrcunaligned # then use shifting copy
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/*
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* Destination and source are word-aligned, use word copy.
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*/
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# copy 16 bytes per iteration for word-aligned dst and word-aligned src
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#if XCHAL_HAVE_LOOPS
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loopnez a7, .backLoop1done
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#else /* !XCHAL_HAVE_LOOPS */
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beqz a7, .backLoop1done
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slli a8, a7, 4
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sub a8, a3, a8 # a8 = start of first 16B source chunk
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#endif /* !XCHAL_HAVE_LOOPS */
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.backLoop1:
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addi a3, a3, -16
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l32i a7, a3, 12
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l32i a6, a3, 8
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addi a5, a5, -16
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s32i a7, a5, 12
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l32i a7, a3, 4
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s32i a6, a5, 8
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l32i a6, a3, 0
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s32i a7, a5, 4
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s32i a6, a5, 0
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#if !XCHAL_HAVE_LOOPS
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bne a3, a8, .backLoop1 # continue loop if a3:src != a8:src_start
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#endif /* !XCHAL_HAVE_LOOPS */
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.backLoop1done:
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bbci.l a4, 3, .Lback2
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# copy 8 bytes
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addi a3, a3, -8
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l32i a6, a3, 0
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l32i a7, a3, 4
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addi a5, a5, -8
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s32i a6, a5, 0
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s32i a7, a5, 4
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.Lback2:
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bbsi.l a4, 2, .Lback3
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bbsi.l a4, 1, .Lback4
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bbsi.l a4, 0, .Lback5
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RET(16)
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.Lback3:
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# copy 4 bytes
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addi a3, a3, -4
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l32i a6, a3, 0
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addi a5, a5, -4
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s32i a6, a5, 0
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bbsi.l a4, 1, .Lback4
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bbsi.l a4, 0, .Lback5
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RET(16)
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.Lback4:
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# copy 2 bytes
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addi a3, a3, -2
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l16ui a6, a3, 0
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addi a5, a5, -2
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s16i a6, a5, 0
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bbsi.l a4, 0, .Lback5
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RET(16)
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.Lback5:
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# copy 1 byte
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addi a3, a3, -1
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l8ui a6, a3, 0
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addi a5, a5, -1
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s8i a6, a5, 0
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RET(16)
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/*
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* Destination is aligned, Source is unaligned
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*/
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.align 4
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.Lbacksrcunaligned:
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_beqz a4, .Lbackdone # avoid loading anything for zero-length copies
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# copy 16 bytes per iteration for word-aligned dst and unaligned src
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ssa8 a3 # set shift amount from byte offset
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#define SIM_CHECKS_ALIGNMENT 1 /* set to 1 when running on ISS with
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* the lint or ferret client, or 0
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* to save a few cycles */
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|
#if XCHAL_UNALIGNED_LOAD_EXCEPTION || SIM_CHECKS_ALIGNMENT
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and a11, a3, a8 # save unalignment offset for below
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sub a3, a3, a11 # align a3
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#endif
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l32i a6, a3, 0 # load first word
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#if XCHAL_HAVE_LOOPS
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loopnez a7, .backLoop2done
|
||
|
#else /* !XCHAL_HAVE_LOOPS */
|
||
|
beqz a7, .backLoop2done
|
||
|
slli a10, a7, 4
|
||
|
sub a10, a3, a10 # a10 = start of first 16B source chunk
|
||
|
#endif /* !XCHAL_HAVE_LOOPS */
|
||
|
.backLoop2:
|
||
|
addi a3, a3, -16
|
||
|
l32i a7, a3, 12
|
||
|
l32i a8, a3, 8
|
||
|
addi a5, a5, -16
|
||
|
src_b a6, a7, a6
|
||
|
s32i a6, a5, 12
|
||
|
l32i a9, a3, 4
|
||
|
src_b a7, a8, a7
|
||
|
s32i a7, a5, 8
|
||
|
l32i a6, a3, 0
|
||
|
src_b a8, a9, a8
|
||
|
s32i a8, a5, 4
|
||
|
src_b a9, a6, a9
|
||
|
s32i a9, a5, 0
|
||
|
#if !XCHAL_HAVE_LOOPS
|
||
|
bne a3, a10, .backLoop2 # continue loop if a3:src != a10:src_start
|
||
|
#endif /* !XCHAL_HAVE_LOOPS */
|
||
|
.backLoop2done:
|
||
|
bbci.l a4, 3, .Lback12
|
||
|
# copy 8 bytes
|
||
|
addi a3, a3, -8
|
||
|
l32i a7, a3, 4
|
||
|
l32i a8, a3, 0
|
||
|
addi a5, a5, -8
|
||
|
src_b a6, a7, a6
|
||
|
s32i a6, a5, 4
|
||
|
src_b a7, a8, a7
|
||
|
s32i a7, a5, 0
|
||
|
mov a6, a8
|
||
|
.Lback12:
|
||
|
bbci.l a4, 2, .Lback13
|
||
|
# copy 4 bytes
|
||
|
addi a3, a3, -4
|
||
|
l32i a7, a3, 0
|
||
|
addi a5, a5, -4
|
||
|
src_b a6, a7, a6
|
||
|
s32i a6, a5, 0
|
||
|
mov a6, a7
|
||
|
.Lback13:
|
||
|
#if XCHAL_UNALIGNED_LOAD_EXCEPTION || SIM_CHECKS_ALIGNMENT
|
||
|
add a3, a3, a11 # readjust a3 with correct misalignment
|
||
|
#endif
|
||
|
bbsi.l a4, 1, .Lback14
|
||
|
bbsi.l a4, 0, .Lback15
|
||
|
.Lbackdone:
|
||
|
RET(16)
|
||
|
.Lback14:
|
||
|
# copy 2 bytes
|
||
|
addi a3, a3, -2
|
||
|
l8ui a6, a3, 0
|
||
|
l8ui a7, a3, 1
|
||
|
addi a5, a5, -2
|
||
|
s8i a6, a5, 0
|
||
|
s8i a7, a5, 1
|
||
|
bbsi.l a4, 0, .Lback15
|
||
|
RET(16)
|
||
|
.Lback15:
|
||
|
# copy 1 byte
|
||
|
addi a3, a3, -1
|
||
|
addi a5, a5, -1
|
||
|
l8ui a6, a3, 0
|
||
|
s8i a6, a5, 0
|
||
|
RET(16)
|
||
|
|
||
|
.end schedule
|
||
|
.size memmove, . - memmove
|