2017-04-14 16:06:01 +02:00
|
|
|
/****************************************************************************
|
2018-12-16 17:50:16 +01:00
|
|
|
* arch/arm/include/stm32f0/irq.h
|
2017-04-14 16:06:01 +02:00
|
|
|
*
|
|
|
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
|
|
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
2017-04-14 16:13:18 +02:00
|
|
|
* Alan Carvalho de Assis <acassis@gmail.com>
|
2017-04-14 16:06:01 +02:00
|
|
|
*
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
* modification, are permitted provided that the following conditions
|
|
|
|
* are met:
|
|
|
|
*
|
|
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer.
|
|
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer in
|
|
|
|
* the documentation and/or other materials provided with the
|
|
|
|
* distribution.
|
|
|
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
|
|
|
* used to endorse or promote products derived from this software
|
|
|
|
* without specific prior written permission.
|
|
|
|
*
|
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
|
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
|
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
|
|
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
|
|
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|
|
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
|
|
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
|
|
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
|
|
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
|
|
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
|
|
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
|
|
* POSSIBILITY OF SUCH DAMAGE.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2018-12-16 17:50:16 +01:00
|
|
|
/* This file should never be included directed but, rather, only indirectly
|
|
|
|
* through nuttx/irq.h
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef __ARCH_ARM_INCLUDE_STM32F0L0_IRQ_H
|
|
|
|
#define __ARCH_ARM_INCLUDE_STM32F0L0_IRQ_H
|
|
|
|
|
2017-04-14 16:06:01 +02:00
|
|
|
/****************************************************************************
|
|
|
|
* Included Files
|
|
|
|
****************************************************************************/
|
|
|
|
|
2018-12-16 17:50:16 +01:00
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
# include <stdint.h>
|
|
|
|
#endif
|
|
|
|
#include <arch/stm32f0l0/chip.h>
|
2017-04-14 16:06:01 +02:00
|
|
|
|
2018-12-16 17:50:16 +01:00
|
|
|
/****************************************************************************
|
|
|
|
* Pre-processor Definitions
|
|
|
|
****************************************************************************/
|
2017-04-14 16:06:01 +02:00
|
|
|
|
2018-12-16 17:50:16 +01:00
|
|
|
/* IRQ numbers. The IRQ number corresponds vector number and hence map
|
|
|
|
* directly to bits in the NVIC. This does, however, waste several words of
|
|
|
|
* memory in the IRQ to handle mapping tables.
|
|
|
|
*/
|
2017-04-14 16:06:01 +02:00
|
|
|
|
2018-12-16 17:50:16 +01:00
|
|
|
/* Common Processor Exceptions (vectors 0-15) */
|
2017-04-14 16:06:01 +02:00
|
|
|
|
2018-12-16 17:50:16 +01:00
|
|
|
#define STM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
|
|
|
|
/* Vector 0: Reset stack pointer value */
|
|
|
|
/* Vector 1: Reset (not handler as an IRQ) */
|
|
|
|
#define STM32_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
|
|
|
|
#define STM32_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
|
|
|
|
/* Vectors 4-10: Reserved */
|
|
|
|
#define STM32_IRQ_SVCALL (11) /* Vector 11: SVC call */
|
|
|
|
/* Vector 12-13: Reserved */
|
|
|
|
#define STM32_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
|
|
|
|
#define STM32_IRQ_SYSTICK (15) /* Vector 15: System tick */
|
2017-04-14 16:06:01 +02:00
|
|
|
|
2018-12-16 17:50:16 +01:00
|
|
|
/* External interrupts (vectors >= 16) */
|
2017-04-14 16:06:01 +02:00
|
|
|
|
2018-12-16 17:50:16 +01:00
|
|
|
#define STM32_IRQ_EXTINT (16) /* Vector number of the first external interrupt */
|
2017-04-14 16:06:01 +02:00
|
|
|
|
2018-12-16 17:50:16 +01:00
|
|
|
/* Include MCU-specific external interrupt definitions */
|
|
|
|
|
2018-12-19 19:36:35 +01:00
|
|
|
#if defined(CONFIG_ARCH_CHIP_STM32F0)
|
2018-12-16 17:50:16 +01:00
|
|
|
# include <arch/stm32f0l0/stm32f0_irq.h>
|
2018-12-19 19:36:35 +01:00
|
|
|
#elif defined(CONFIG_ARCH_CHIP_STM32L0)
|
2018-12-16 17:50:16 +01:00
|
|
|
# include <arch/stm32f0l0/stm32l0_irq.h>
|
|
|
|
#else
|
|
|
|
# error Unrecognized STM32 Cortex M0 family
|
|
|
|
#endif
|
2017-04-14 16:06:01 +02:00
|
|
|
|
2018-12-16 17:50:16 +01:00
|
|
|
#define NR_IRQS (STM32_IRQ_EXTINT + STM32_IRQ_NEXTINT)
|
2017-04-14 16:06:01 +02:00
|
|
|
|
|
|
|
/****************************************************************************
|
2018-12-16 17:50:16 +01:00
|
|
|
* Public Types
|
2017-04-14 16:06:01 +02:00
|
|
|
****************************************************************************/
|
|
|
|
|
2018-12-16 17:50:16 +01:00
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
typedef void (*vic_vector_t)(uint32_t *regs);
|
|
|
|
|
2017-04-14 16:06:01 +02:00
|
|
|
/****************************************************************************
|
2018-12-16 17:50:16 +01:00
|
|
|
* Inline functions
|
2017-04-14 16:06:01 +02:00
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/****************************************************************************
|
2018-12-16 17:50:16 +01:00
|
|
|
* Public Data
|
2017-04-14 16:06:01 +02:00
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/****************************************************************************
|
2018-12-16 17:50:16 +01:00
|
|
|
* Public Function Prototypes
|
2017-04-14 16:06:01 +02:00
|
|
|
****************************************************************************/
|
|
|
|
|
2018-12-16 17:50:16 +01:00
|
|
|
#ifdef __cplusplus
|
|
|
|
extern "C"
|
2017-04-14 16:06:01 +02:00
|
|
|
{
|
|
|
|
#endif
|
|
|
|
|
2018-12-16 17:50:16 +01:00
|
|
|
#ifdef __cplusplus
|
|
|
|
}
|
2017-04-14 16:06:01 +02:00
|
|
|
#endif
|
2018-12-16 17:50:16 +01:00
|
|
|
#endif /* __ASSEMBLY__ */
|
2017-04-14 16:06:01 +02:00
|
|
|
|
2018-12-16 17:50:16 +01:00
|
|
|
#endif /* __ARCH_ARM_INCLUDE_STM32F0L0_IRQ_H */
|