2013-12-07 20:06:34 +01:00
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############################################################################
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# arch/arm/a1x/Make.defs
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#
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2018-05-07 18:13:20 +02:00
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# Copyright (C) 2013-2014, 2016, 2018 Gregory Nutt. All rights reserved.
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2013-12-07 20:06:34 +01:00
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# Author: Gregory Nutt <gnutt@nuttx.org>
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# 3. Neither the name Gregory Nutt nor the names of its contributors may be
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# used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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############################################################################
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# The vector table is the "head" object, i.e., the one that must forced into
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# the link in order to draw in all of the other components
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HEAD_ASRC = arm_vectortab.S
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2014-09-04 21:31:34 +02:00
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ifeq ($(CONFIG_BUILD_KERNEL),y)
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STARTUP_OBJS = crt0$(OBJEXT)
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endif
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2013-12-07 20:06:34 +01:00
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# Force the start-up logic to be at the beginning of the .text to simplify
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# debug.
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ifeq ($(CONFIG_PAGING),y)
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CMN_ASRCS = arm_pghead.S
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else
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CMN_ASRCS = arm_head.S
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endif
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# Common assembly language files
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CMN_ASRCS += arm_vectors.S arm_fpuconfig.S arm_fullcontextrestore.S
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CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S arm_vfork.S
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2018-02-04 19:22:03 +01:00
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CMN_ASRCS += arm_testset.S arm_fetchadd.S
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2013-12-07 20:06:34 +01:00
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CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
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CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
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# Common C source files
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2018-05-07 18:13:20 +02:00
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CMN_CSRCS = up_initialize.c up_interruptcontext.c up_exit.c up_createstack.c
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CMN_CSRCS += up_releasestack.c up_usestack.c up_vfork.c up_puts.c up_mdelay.c
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CMN_CSRCS += up_stackframe.c up_udelay.c up_modifyreg8.c up_modifyreg16.c
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CMN_CSRCS += up_modifyreg32.c
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2013-12-07 20:06:34 +01:00
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CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
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CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c
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CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
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CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
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2013-12-13 19:42:26 +01:00
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# Use common heap allocation for now (may need to be customized later)
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CMN_CSRCS += up_allocateheap.c
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2013-12-07 20:06:34 +01:00
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# Configuration dependent C and assembly language files
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2018-05-07 18:13:20 +02:00
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CMN_CSRCS += up_idle.c
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endif
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2013-12-07 20:06:34 +01:00
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ifeq ($(CONFIG_PAGING),y)
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CMN_CSRCS += arm_allocpage.c arm_checkmapping.c arm_pginitialize.c
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CMN_CSRCS += arm_va2pte.c
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endif
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2014-08-31 15:15:46 +02:00
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ifeq ($(CONFIG_BUILD_KERNEL),y)
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2014-09-16 21:29:43 +02:00
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CMN_CSRCS += up_task_start.c up_pthread_start.c arm_signal_dispatch.c
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2014-08-31 15:15:46 +02:00
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endif
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2014-08-24 14:42:11 +02:00
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ifeq ($(CONFIG_ARCH_ADDRENV),y)
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2014-09-13 21:17:44 +02:00
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CMN_CSRCS += arm_addrenv.c arm_addrenv_utils.c arm_pgalloc.c
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2014-09-13 21:45:35 +02:00
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ifeq ($(CONFIG_ARCH_STACK_DYNAMIC),y)
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2014-09-14 17:10:09 +02:00
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CMN_CSRCS += arm_addrenv_ustack.c
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endif
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ifeq ($(CONFIG_ARCH_KERNEL_STACK),y)
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CMN_CSRCS += arm_addrenv_kstack.c
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2014-09-13 21:45:35 +02:00
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endif
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2014-09-24 15:38:11 +02:00
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ifeq ($(CONFIG_MM_SHM),y)
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CMN_CSRCS += arm_addrenv_shm.c
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endif
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2014-08-24 02:59:24 +02:00
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endif
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2014-09-16 21:29:43 +02:00
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ifeq ($(CONFIG_MM_PGALLOC),y)
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CMN_CSRCS += arm_physpgaddr.c
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2014-09-17 00:49:44 +02:00
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ifeq ($(CONFIG_ARCH_PGPOOL_MAPPING),y)
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CMN_CSRCS += arm_virtpgaddr.c
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endif
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2014-09-16 21:29:43 +02:00
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endif
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2019-03-19 17:37:13 +01:00
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CMN_CSRCS += arm_cache.c
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2013-12-07 20:06:34 +01:00
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ifeq ($(CONFIG_ARCH_FPU),y)
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CMN_ASRCS += arm_savefpu.S arm_restorefpu.S
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CMN_CSRCS += arm_copyarmstate.c
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endif
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2015-01-24 13:03:39 +01:00
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ifeq ($(CONFIG_STACK_COLORATION),y)
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CMN_CSRCS += up_checkstack.c
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endif
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2013-12-07 20:06:34 +01:00
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# A1x-specific assembly language files
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CHIP_ASRCS =
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# A1x-specific C source files
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2014-08-07 00:26:01 +02:00
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CHIP_CSRCS = a1x_boot.c a1x_irq.c a1x_pio.c a1x_lowputc.c a1x_serial.c
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ifneq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += a1x_timerisr.c
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endif
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