238 lines
9.1 KiB
C
238 lines
9.1 KiB
C
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/****************************************************************************
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* configs/pnev5180b/include/board.h
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* include/arch/board/board.h
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*
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* Copyright (C) 2019 Gregory Nutt. All rights reserved.
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* Author: Michael Jung <mijung@gmx.net>
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*
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* Based on configs/zkit-arm-1769/include/board.h
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* Copyright (C) 2013 Zilogic Systems. All rights reserved.
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* Author: BabuSubashChandar <code@zilogic.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*****************************************************************************/
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#ifndef __CONFIGS_PNEV5180B_INCLUDE_BOARD_H
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#define __CONFIGS_PNEV5180B_INCLUDE_BOARD_H
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/*****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ)
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# include <nuttx/irq.h>
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#endif
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/*****************************************************************************
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* Pre-processor Definitions
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*****************************************************************************/
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/* Clocking ******************************************************************/
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/* NOTE: The following definitions require lpc17_syscon.h. It is not
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* included here because the including C file may not have that file in its
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* include path.
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*/
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#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency */
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#define BOARD_OSCCLK_FREQUENCY BOARD_XTAL_FREQUENCY /* Main oscillator frequency */
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#define BOARD_RTCCLK_FREQUENCY (32768) /* RTC oscillator frequency */
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#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */
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/* This is the clock setup we configure for:
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*
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* SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for
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* source
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* PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20,
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* pre-divider=1
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* CCLCK = 480MHz / 4 = 120MHz -> CCLK divider = 4
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*/
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#define LPC17_CCLK 120000000 /* 120Mhz */
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/* Select the main oscillator as the frequency source. SYSCLK is then the
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* frequency of the main oscillator.
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*/
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#undef CONFIG_LPC17_MAINOSC
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#define CONFIG_LPC17_MAINOSC 1
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#define BOARD_SCS_VALUE SYSCON_SCS_OSCEN
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/* Select the main oscillator and CCLK divider. The output of the divider is
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* CCLK. The input to the divider (PLLCLK) will be determined by the PLL
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* output.
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*/
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#define BOARD_CCLKCFG_DIVIDER 4
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#define BOARD_CCLKCFG_VALUE ((BOARD_CCLKCFG_DIVIDER-1) << SYSCON_CCLKCFG_SHIFT)
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/* PLL0. PLL0 is used to generate the CPU clock divider input (PLLCLK).
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*
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* Source clock: Main oscillator
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* PLL0 Multiplier value (M): 20
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* PLL0 Pre-divider value (N): 1
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*
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* PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz
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*/
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#undef CONFIG_LPC17_PLL0
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#define CONFIG_LPC17_PLL0 1
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#define BOARD_CLKSRCSEL_VALUE SYSCON_CLKSRCSEL_MAIN
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#define BOARD_PLL0CFG_MSEL 20
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#define BOARD_PLL0CFG_NSEL 1
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#define BOARD_PLL0CFG_VALUE \
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(((BOARD_PLL0CFG_MSEL-1) << SYSCON_PLL0CFG_MSEL_SHIFT) | \
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((BOARD_PLL0CFG_NSEL-1) << SYSCON_PLL0CFG_NSEL_SHIFT))
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/* PLL1 -- Not used. */
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#undef CONFIG_LPC17_PLL1
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#define BOARD_PLL1CFG_MSEL 36
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#define BOARD_PLL1CFG_NSEL 1
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#define BOARD_PLL1CFG_VALUE \
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(((BOARD_PLL1CFG_MSEL-1) << SYSCON_PLL1CFG_MSEL_SHIFT) | \
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((BOARD_PLL1CFG_NSEL-1) << SYSCON_PLL1CFG_NSEL_SHIFT))
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/* USB divider. This divider is used when PLL1 is not enabled to get the
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* USB clock from PLL0:
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*
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* USBCLK = PLL0CLK / 10 = 48MHz
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*/
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#define BOARD_USBCLKCFG_VALUE SYSCON_USBCLKCFG_DIV10
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/* FLASH Configuration */
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#undef CONFIG_LP17_FLASH
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#define CONFIG_LP17_FLASH 1
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#define BOARD_FLASHCFG_VALUE 0x0000403a
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/* LED definitions ***********************************************************/
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/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LEDs on the
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* PNEV5180B board. The following definitions describe how NuttX controls the
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* LEDs:
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*/
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/* LD201 LD200 LD202 LD203 */
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/* RED ORANGE BLUE GREEN */
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#define LED_STARTED 0 /* ON ON ON ON */
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#define LED_HEAPALLOCATE 1 /* OFF OFF OFF ON */
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#define LED_IRQSENABLED 2 /* OFF OFF ON OFF */
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#define LED_STACKCREATED 3 /* OFF OFF OFF OFF */
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#define LED_INIRQ 4 /* OFF OFF OFF ON (momentary) */
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#define LED_SIGNAL 5 /* OFF OFF ON OFF (momentary) */
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#define LED_ASSERTION 6 /* OFF ON OFF OFF (momentary) */
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#define LED_PANIC 7 /* ON OFF OFF OFF (1Hz flashing) */
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/* Alternate pin selections **************************************************/
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/* Pin Description On Board Connector
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* -------------------------------- ---------------- -------------
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* P0.2/TXD0/AD0.7 TX J201
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* P0.3/RXD0/AD0.6 RX
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* P0.22/RTS1/TD1 LD200 ORANGE LED
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* P0.15/TXD1/SCK0/SCK PN5180-SCK
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* P0.16/RXD1/SSEL0/SSEL PN5180-SSEL PN5180
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* P0.17/CTS1/MISO0/MISO PN5180-MISO
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* P0.18/DCD1/M0SI0/MOSI PN5180-MOSI
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* P0.19/DSR1/SDA1 EEPROM (Not Assembled)
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* P0.20/DTR1/SCL1 EEPROM
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* P0.21/RI1/RD1 PN5180-AUX2 PN5180
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* P0.29/USB_D+ USB-D+ USB
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* P0.30/USB_D- USB-D-
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* P2.0/PWM1.1/TXD1 LD201 RED LED
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* P2.5/PWM1.6/DTR1/TRACEDATA0 PN5180-nPN_RST
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* P2.9/USB_CONNECT/RXD2 USB_CONNECT USB
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* P2.11/nEINT1/I2STX_CLK PN5180-BUSY PN5180
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* P2.12/nEINT2/I2STX_WS PN5180-IRQ
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* P3.25/MAT0.0/PWM1.2 LD203 GREEN LED
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* P3.26/STCLK/MAT0.1/PWM1.3 LD202 BLUE LED
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*/
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/*****************************************************************************
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* Public Types
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*****************************************************************************/
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#ifndef __ASSEMBLY__
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/*****************************************************************************
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* Public Data
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*****************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/*****************************************************************************
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* Public Function Prototypes
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*****************************************************************************/
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/*****************************************************************************
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* Name: lpc17_boardinitialize
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*
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* Description:
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* All LPC17xx architectures must provide the following entry point. This
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* entry point is called early in the intitialization -- after all memory
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* has been configured and mapped but before any devices have been
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* initialized.
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*
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*****************************************************************************/
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void lpc17_boardinitialize(void);
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/*****************************************************************************
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* Name: lpc17_led
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*
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* Description:
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* Once the system has booted, these functions can be used to control LED 1
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*
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*****************************************************************************/
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#ifdef CONFIG_ARCH_LEDS
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void lpc17_led(int lednum, int state);
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#endif
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __CONFIGS_PNEV5180_INCLUDE_BOARD_H */
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