2013-07-19 23:23:03 +02:00
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README
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=====
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This README file describes the port of NuttX to the SAMA5D3x-EK
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development boards. These boards feature the Atmel SAMA5D3
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2013-07-31 18:46:13 +02:00
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microprocessors. Four different SAMA5D3x-EK kits are available
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2013-07-24 20:27:12 +02:00
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2013-08-01 15:10:34 +02:00
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- SAMA5D31-EK with the ATSAMA5D31 (http://www.atmel.com/devices/sama5d31.aspx)
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- SAMA5D33-EK with the ATSAMA5D33 (http://www.atmel.com/devices/sama5d33.aspx)
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- SAMA5D34-EK with the ATSAMA5D34 (http://www.atmel.com/devices/sama5d34.aspx)
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- SAMA5D35-EK with the ATSAMA5D35 (http://www.atmel.com/devices/sama5d35.aspx)
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2013-07-24 20:27:12 +02:00
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The each consist of an identical base board with different plug-in
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2013-08-01 15:10:34 +02:00
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modules for each CPU. I also have a 7 inch LCD for my SAMA5D3x-EK, but this
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is not yet generally available..
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2013-07-24 20:27:12 +02:00
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SAMA5D3 Family
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ATSAMA5D31 ATSAMA5D33 ATSAMA5D34 ATSAMA5D35
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------------------------- ------------- ------------- ------------- -------------
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Pin Count 324 324 324 324
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Max. Operating Frequency 536 536 536 536
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CPU Cortex-A5 Cortex-A5 Cortex-A5 Cortex-A5
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Max I/O Pins 160 160 160 160
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Ext Interrupts 160 160 160 160
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USB Transceiver 3 3 3 3
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USB Speed Hi-Speed Hi-Speed Hi-Speed Hi-Speed
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USB Interface Host, Device Host, Device Host, Device Host, Device
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SPI 6 6 6 6
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TWI (I2C) 3 3 3 3
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UART 7 5 5 7
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CAN - - 2 2
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LIN 4 4 4 4
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SSC 2 2 2 2
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Ethernet 1 1 1 2
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SD / eMMC 3 2 3 3
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Graphic LCD Yes Yes Yes -
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Camera Interface Yes Yes Yes Yes
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ADC channels 12 12 12 12
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ADC Resolution (bits) 12 12 12 12
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ADC Speed (ksps) 440 440 440 440
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Resistive Touch Screen Yes Yes Yes Yes
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Crypto Engine AES/DES/ AES/DES/ AES/DES/ AES/DES/
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SHA/TRNG SHA/TRNG SHA/TRNG SHA/TRNG
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SRAM (Kbytes) 128 128 128 128
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External Bus Interface 1 1 1 1
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DRAM Memory DDR2/LPDDR, DDR2/LPDDR, DDR2/LPDDR, DDR2/LPDDR,
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SDRAM/LPSDR SDRAM/LPSDR DDR2/LPDDR, DDR2/LPDDR,
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NAND Interface Yes Yes Yes Yes
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Temp. Range (deg C) -40 to 85 -40 to 85 -40 to 85 -40 to 85
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I/O Supply Class 1.8/3.3 1.8/3.3 1.8/3.3 1.8/3.3
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Operating Voltage (Vcc) 1.08 to 1.32 1.08 to 1.32 1.08 to 1.32 1.08 to 1.32
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FPU Yes Yes Yes Yes
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MPU / MMU No/Yes No/Yes No/Yes No/Yes
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Timers 5 5 5 6
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Output Compare channels 6 6 6 6
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Input Capture Channels 6 6 6 6
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PWM Channels 4 4 4 4
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32kHz RTC Yes Yes Yes Yes
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Packages LFBGA324_A LFBGA324_A LFBGA324_A LFBGA324_A
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2013-07-19 23:23:03 +02:00
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Contents
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2013-07-25 04:12:04 +02:00
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========
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2013-07-19 23:23:03 +02:00
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- Development Environment
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- GNU Toolchain Options
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- IDEs
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- NuttX EABI "buildroot" Toolchain
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- NuttX OABI "buildroot" Toolchain
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- NXFLAT Toolchain
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2013-07-27 22:03:02 +02:00
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- Loading Code into SRAM with J-Link
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- Writing to FLASH using SAM-BA
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2013-07-31 18:46:13 +02:00
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- Creating and Using NORBOOT
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2013-07-19 23:23:03 +02:00
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- Buttons and LEDs
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- Serial Consoles
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2013-08-05 00:56:41 +02:00
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- Serial FLASH
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2013-08-06 00:21:24 +02:00
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- HSMCI Card Slots
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2013-08-12 19:59:10 +02:00
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- USB Ports
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2013-07-19 23:23:03 +02:00
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- SAMA5D3x-EK Configuration Options
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- Configurations
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Development Environment
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=======================
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Several possibile development enviorments may be use:
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- Linux or OSX native
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- Cygwin unders Windows
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- MinGW + MSYS under Windows
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- Windows native (with GNUMake from GNUWin32).
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All testing has been performed using Cygwin under Windows.
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The source has been built only using the GNU toolchain (see below). Other
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toolchains will likely cause problems.
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GNU Toolchain Options
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2013-07-25 04:12:04 +02:00
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=====================
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2013-07-19 23:23:03 +02:00
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2013-07-21 20:52:38 +02:00
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The NuttX make system will support the several different toolchain options.
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2013-07-19 23:23:03 +02:00
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2013-07-22 22:42:05 +02:00
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All testing has been conducted using the CodeSourcery GCC toolchain. To use
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a different toolchain, you simply need to add change to one of the following
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configuration options to your .config (or defconfig) file:
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2013-07-19 23:23:03 +02:00
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CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows
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CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux
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CONFIG_ARMV7A_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windos
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CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows
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CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default)
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CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux
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CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y : Generic GCC ARM EABI toolchain for Windows
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2013-07-22 22:42:05 +02:00
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The CodeSourcery GCC toolchain is selected with
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CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y and setting the PATH variable
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appropriately.
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2013-07-19 23:23:03 +02:00
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If you are not using AtmelStudio GCC toolchain, then you may also have to
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modify the PATH in the setenv.h file if your make cannot find the tools.
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NOTE about Windows native toolchains
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------------------------------------
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There are several limitations to using a Windows based toolchain in a
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Cygwin environment. The three biggest are:
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1. The Windows toolchain cannot follow Cygwin paths. Path conversions are
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performed automatically in the Cygwin makefiles using the 'cygpath'
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utility but you might easily find some new path problems. If so, check
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out 'cygpath -w'
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2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic
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links are used in Nuttx (e.g., include/arch). The make system works
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around these problems for the Windows tools by copying directories
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instead of linking them. But this can also cause some confusion for
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you: For example, you may edit a file in a "linked" directory and find
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that your changes had no effect. That is because you are building the
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copy of the file in the "fake" symbolic directory. If you use a\
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Windows toolchain, you should get in the habit of making like this:
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make clean_context all
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An alias in your .bashrc file might make that less painful.
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3. Dependencies are not made when using Windows versions of the GCC. This is
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because the dependencies are generated using Windows pathes which do not
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work with the Cygwin make.
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MKDEP = $(TOPDIR)/tools/mknulldeps.sh
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NOTE 1: Older CodeSourcery toolchains (2009q1) do not work with default
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optimization level of -Os (See Make.defs). It will work with -O0, -O1, or
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-O2, but not with -Os.
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NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that
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the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM
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path or will get the wrong version of make.
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IDEs
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2013-07-25 04:12:04 +02:00
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====
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2013-07-19 23:23:03 +02:00
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NuttX is built using command-line make. It can be used with an IDE, but some
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effort will be required to create the project (There is a simple RIDE project
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in the RIDE subdirectory).
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Makefile Build
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--------------
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Under Eclipse, it is pretty easy to set up an "empty makefile project" and
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simply use the NuttX makefile to build the system. That is almost for free
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under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty
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makefile project in order to work with Windows (Google for "Eclipse Cygwin" -
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there is a lot of help on the internet).
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Native Build
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------------
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Here are a few tips before you start that effort:
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1) Select the toolchain that you will be using in your .config file
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2) Start the NuttX build at least one time from the Cygwin command line
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before trying to create your project. This is necessary to create
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certain auto-generated files and directories that will be needed.
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3) Set up include pathes: You will need include/, arch/arm/src/sam34,
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arch/arm/src/common, arch/arm/src/armv7-m, and sched/.
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4) All assembly files need to have the definition option -D __ASSEMBLY__
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on the command line.
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Startup files will probably cause you some headaches. The NuttX startup file
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is arch/arm/src/sam34/sam_vectors.S. You may need to build NuttX
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one time from the Cygwin command line in order to obtain the pre-built
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startup object needed by RIDE.
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NuttX EABI "buildroot" Toolchain
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2013-07-25 04:12:04 +02:00
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================================
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2013-07-19 23:23:03 +02:00
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A GNU GCC-based toolchain is assumed. The files */setenv.sh should
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be modified to point to the correct path to the Cortex-M3 GCC toolchain (if
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different from the default in your PATH variable).
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If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX
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SourceForge download site (https://sourceforge.net/projects/nuttx/files/buildroot/).
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This GNU toolchain builds and executes in the Linux or Cygwin environment.
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1. You must have already configured Nuttx in <some-dir>/nuttx.
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cd tools
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./configure.sh sama5d3x-ek/<sub-dir>
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2. Download the latest buildroot package into <some-dir>
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3. unpack the buildroot tarball. The resulting directory may
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have versioning information on it like buildroot-x.y.z. If so,
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rename <some-dir>/buildroot-x.y.z to <some-dir>/buildroot.
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4. cd <some-dir>/buildroot
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5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config
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6. make oldconfig
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7. make
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8. Edit setenv.h, if necessary, so that the PATH variable includes
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the path to the newly built binaries.
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See the file configs/README.txt in the buildroot source tree. That has more
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details PLUS some special instructions that you will need to follow if you are
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building a Cortex-M3 toolchain for Cygwin under Windows.
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NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the
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the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for
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more information about this problem. If you plan to use NXFLAT, please do not
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use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain.
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See instructions below.
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NuttX OABI "buildroot" Toolchain
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2013-07-25 04:12:04 +02:00
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================================
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2013-07-19 23:23:03 +02:00
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The older, OABI buildroot toolchain is also available. To use the OABI
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toolchain, use the build instructtions above, but (1) modify the
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cortexm3-eabi-defconfig-4.6.3 configuration to use OABI (using 'make
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menuconfig'), or (2) use an exising OABI configuration such as
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cortexm3-defconfig-4.3.3
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NXFLAT Toolchain
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2013-07-25 04:12:04 +02:00
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================
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2013-07-19 23:23:03 +02:00
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If you are *not* using the NuttX buildroot toolchain and you want to use
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the NXFLAT tools, then you will still have to build a portion of the buildroot
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tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can
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be downloaded from the NuttX SourceForge download site
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(https://sourceforge.net/projects/nuttx/files/).
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This GNU toolchain builds and executes in the Linux or Cygwin environment.
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1. You must have already configured Nuttx in <some-dir>/nuttx.
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cd tools
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./configure.sh sama5d3x-ek/<sub-dir>
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2. Download the latest buildroot package into <some-dir>
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3. unpack the buildroot tarball. The resulting directory may
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have versioning information on it like buildroot-x.y.z. If so,
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rename <some-dir>/buildroot-x.y.z to <some-dir>/buildroot.
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4. cd <some-dir>/buildroot
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5. cp configs/cortexm3-defconfig-nxflat .config
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6. make oldconfig
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7. make
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8. Edit setenv.h, if necessary, so that the PATH variable includes
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the path to the newly built NXFLAT binaries.
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2013-07-27 22:03:02 +02:00
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Loading Code into SRAM with J-Link
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==================================
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2013-07-25 04:12:04 +02:00
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Loading code with the Segger tools and GDB
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------------------------------------------
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1) Change directories into the directory where you built NuttX.
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2) Start the GDB server and wait until it is ready to accept GDB
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connections.
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3) Then run GDB like this:
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$ arm-none-eabi-gdb
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(gdb) target remote localhost:2331
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(gdb) mon reset
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(gdb) load nuttx
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(gdb) ... start debugging ...
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Loading code using J-Link Commander
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----------------------------------
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J-Link> r
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J-Link> loadbin <file> <address>
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J-Link> setpc <address of __start>
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J-Link> ... start debugging ...
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2013-07-27 22:03:02 +02:00
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Writing to FLASH using SAM-BA
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=============================
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Assumed starting configuration:
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1. You have installed the J-Lnk CDC USB driver (Windows only, there is
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no need to install a driver on any regular Linux distribution),
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2. You have the USB connected to DBGU poort (J14)
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3. Terminal configuration: 115200 8N1
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Using SAM-BA to write to FLASH:
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1. Exit the terminal emulation program and remove the USB cable from
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the DBGU port (J14)
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2. Connect the USB cable to the device USB port (J20)
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2013-07-28 23:07:35 +02:00
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3. JP9 must open (BMS == 1) to boot from on-chip Boot ROM.
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2013-07-27 22:03:02 +02:00
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4. Press and maintain PB4 CS_BOOT button and power up the board. PB4
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CS_BOOT button prevents booting from Nand or serial Flash by
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disabling Flash Chip Selects after having powered the board, you can
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release the PB4 BS_BOOT button.
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5. On Windows you may need to wait for a device driver to be installed.
|
|
|
|
6. Start the SAM-BA application, selecting (1) the correct USB serial
|
|
|
|
port, and (2) board = at91sama5d3x-ek.
|
|
|
|
7. The SAM-BA menu should appear.
|
|
|
|
8. Select the FLASH bank that you want to use and the address to write
|
|
|
|
to and "Execute"
|
|
|
|
9. When you are finished writing to FLASH, remove the USB cable from J20
|
|
|
|
and re-connect the serial link on USB CDC / DBGU connector (J14) and
|
|
|
|
re-open the terminal emulator program.
|
2013-07-28 23:07:35 +02:00
|
|
|
10. If you loaded code in NOR flash (CS0), then you will need to close
|
|
|
|
JP9 (BMS == 0) to force booting out of NOR flash (see NOTE).
|
|
|
|
11. Power cycle the board.
|
2013-07-27 22:03:02 +02:00
|
|
|
|
|
|
|
NOTES: By closing JP9 (BMS == 0), you can force the board to boot
|
|
|
|
directly to NOR FLASH. Executing from other memories will require that
|
|
|
|
you provide a special code header so that you code can be recognized as a
|
|
|
|
boot-able image by the ROM bootloader.
|
|
|
|
|
2013-07-31 18:46:13 +02:00
|
|
|
Creating and Using NORBOOT
|
|
|
|
==========================
|
|
|
|
|
|
|
|
In order to have more control of debugging code that runs out of NOR FLASH,
|
|
|
|
I created the sama5d3x-ek/norboot configuration. That configuration is
|
|
|
|
described below under "Configurations."
|
|
|
|
|
|
|
|
Here are some general instructions on how to build an use norboot:
|
|
|
|
|
|
|
|
Building:
|
|
|
|
1. Remove any old configurations (if applicable).
|
|
|
|
|
|
|
|
cd <nuttx>
|
|
|
|
make distclean
|
|
|
|
|
|
|
|
2. Install and build the norboot configuration:
|
|
|
|
|
|
|
|
cd tools
|
|
|
|
./configure.sh sama5d3x-ek/<subdir>
|
|
|
|
cd -
|
|
|
|
. ./setenv.sh
|
|
|
|
|
|
|
|
Before sourcing the setenv.sh file above, you should examine it and
|
|
|
|
perform edits as necessary so that TOOLCHAIN_BIN is the correct path
|
|
|
|
to the directory than holds your toolchain binaries.
|
|
|
|
|
|
|
|
3. Rename the binaries. Since you will need two versions of NuttX: this
|
|
|
|
norboot version that runs in internal SRAM and another under test in
|
|
|
|
NOR FLASH, I rename the resulting binary files so that they can be
|
|
|
|
distinguished:
|
|
|
|
|
|
|
|
mv nuttx norboot
|
|
|
|
mv nuttx.hex norboot.hex
|
|
|
|
mv nuttx.bin norboot.bin
|
|
|
|
|
|
|
|
4. Build your NOR configuration and write this into NOR FLASH. Here, for
|
|
|
|
example, is how you would create the NSH NOR configuration:
|
|
|
|
|
|
|
|
cd <nuttx>
|
|
|
|
make distclean # Remove the norboot configuration
|
|
|
|
cd tools
|
|
|
|
./configure.sh sama5d3x-ek/nsh # Establish the NSH configuration
|
|
|
|
cd -
|
|
|
|
make # Build the NSH configuration
|
|
|
|
|
|
|
|
Then use SAM-BA to write the nuttx.bin binary into NOR FLASH. This
|
|
|
|
will involve holding the CS_BOOT button and power cycling to start
|
|
|
|
the ROM loader. The SAM-BA serial connection will be on the device
|
|
|
|
USB port, not the debug USB port. Follow the SAM-BA instruction to
|
|
|
|
write the nuttx.bin binary to NOR FLASH.
|
|
|
|
|
|
|
|
5. Restart the system without holding CS_BOOT to get back to the normal
|
|
|
|
debug setup.
|
|
|
|
|
|
|
|
6. Then start the J-Link GDB server and GDB. In GDB, I do the following:
|
|
|
|
|
|
|
|
(gdb) mon reset # Reset and halt the CPU
|
|
|
|
(gdb) load norboot # Load norboot into internal SRAM
|
|
|
|
(gdb) mon go # Start norboot
|
|
|
|
(gdb) mon halt # Break in
|
|
|
|
(gdb) mon reg pc = 0x10000040 # Set the PC to NOR flash entry point
|
|
|
|
(gdb) mon go # And jump into NOR flash
|
|
|
|
|
|
|
|
The norboot program can also be configured to jump directly into
|
2013-08-27 17:40:19 +02:00
|
|
|
NOR FLASH without requiring the final halt and go, but since I
|
2013-07-31 18:46:13 +02:00
|
|
|
have been debugging the early boot sequence, the above sequence has
|
|
|
|
been most convenient for me.
|
|
|
|
|
|
|
|
STATUS:
|
|
|
|
2013-7-30: I have been unable to execute this configuration from NOR
|
|
|
|
FLASH by closing the BMS jumper (J9). As far as I can tell, this
|
|
|
|
jumper does nothing on my board??? So I have been using the norboot
|
|
|
|
configuration exclusively to start the program-under-test in NOR FLASH.
|
|
|
|
|
2013-07-19 23:23:03 +02:00
|
|
|
Buttons and LEDs
|
2013-07-25 04:12:04 +02:00
|
|
|
================
|
2013-07-19 23:23:03 +02:00
|
|
|
|
|
|
|
Buttons
|
|
|
|
-------
|
2013-07-24 20:27:12 +02:00
|
|
|
There are five push button switches on the SAMA5D3X-EK base board:
|
|
|
|
|
|
|
|
1. One Reset, board reset (BP1)
|
|
|
|
2. One Wake up, push button to bring the processor out of low power mode
|
|
|
|
(BP2)
|
|
|
|
3. One User momentary Push Button
|
|
|
|
4. One Disable CS Push Button
|
|
|
|
|
|
|
|
Only the momentary push button is controllable by software (labeled
|
|
|
|
"PB_USER1" on the board):
|
|
|
|
|
|
|
|
- PE27. Pressing the switch connect PE27 to grounded. Therefore, PE27
|
|
|
|
must be pulled high internally. When the button is pressed the SAMA5
|
|
|
|
will sense "0" is on PE27.
|
2013-07-19 23:23:03 +02:00
|
|
|
|
|
|
|
LEDs
|
|
|
|
----
|
2013-07-24 20:27:12 +02:00
|
|
|
There are two LEDs on the SAMA5D3 series-CM board that can be controlled
|
2013-08-06 18:20:17 +02:00
|
|
|
by software. A blue LED is controlled via PIO pins. A red LED normally
|
2013-07-24 20:27:12 +02:00
|
|
|
provides an indication that power is supplied to the board but can also
|
|
|
|
be controlled via software.
|
|
|
|
|
|
|
|
PE25. This blue LED is pulled high and is illuminated by pulling PE25
|
|
|
|
low.
|
|
|
|
|
|
|
|
PE24. The red LED is also pulled high but is driven by a transistor so
|
|
|
|
that it is illuminated when power is applied even if PE24 is not
|
|
|
|
configured as an output. If PE24 is configured as an output, then the
|
2013-07-31 19:44:30 +02:00
|
|
|
LCD is illuminated by a high output.
|
2013-07-24 20:27:12 +02:00
|
|
|
|
|
|
|
These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
|
|
|
|
defined. In that case, the usage by the board port is defined in
|
|
|
|
include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related
|
|
|
|
events as follows:
|
|
|
|
|
|
|
|
SYMBOL Meaning LED state
|
|
|
|
Blue Red
|
|
|
|
------------------- ----------------------- -------- --------
|
|
|
|
LED_STARTED NuttX has been started OFF OFF
|
|
|
|
LED_HEAPALLOCATE Heap has been allocated OFF OFF
|
|
|
|
LED_IRQSENABLED Interrupts enabled OFF OFF
|
|
|
|
LED_STACKCREATED Idle stack created ON OFF
|
|
|
|
LED_INIRQ In an interrupt No change
|
|
|
|
LED_SIGNAL In a signal handler No change
|
|
|
|
LED_ASSERTION An assertion failed No change
|
|
|
|
LED_PANIC The system has crashed OFF Blinking
|
|
|
|
LED_IDLE MCU is is sleep mode Not used
|
|
|
|
|
|
|
|
Thus if the blue LED is statically on, NuttX has successfully booted and
|
|
|
|
is, apparently, running normmally. If the red is flashing at
|
|
|
|
approximately 2Hz, then a fatal error has been detected and the system
|
|
|
|
has halted.
|
2013-07-19 23:23:03 +02:00
|
|
|
|
|
|
|
Serial Consoles
|
|
|
|
===============
|
|
|
|
|
2013-07-24 20:27:12 +02:00
|
|
|
USART1
|
|
|
|
------
|
|
|
|
By default USART1 is used as the NuttX serial console in all
|
|
|
|
configurations (unless otherwise noted). USART1 is buffered with an
|
|
|
|
RS-232 Transceiver (Analog Devices ADM3312EARU) and connected to the DB-9
|
|
|
|
male socket (J8).
|
|
|
|
|
|
|
|
USART1 Connector J8
|
|
|
|
-------------------------------
|
2013-08-06 18:20:17 +02:00
|
|
|
SAMA5 FUNCTION NUTTX PIO
|
2013-07-24 20:27:12 +02:00
|
|
|
PIO NAME CONFIGURATION
|
|
|
|
---- ---------- ---------------
|
2013-08-06 18:20:17 +02:00
|
|
|
PB27 RTS1 PIO_USART1_RTS
|
|
|
|
PB29 TXD1 PIO_USART1_TXD
|
|
|
|
PB28 RXD1 PIO_USART1_RXD
|
|
|
|
PB26 CTS1 PIO_USART1_CTS
|
2013-07-24 20:27:12 +02:00
|
|
|
|
2013-08-27 17:40:19 +02:00
|
|
|
NOTE: Debug TX and RX pins also go to the ADM3312EARU, but I am
|
2013-07-24 20:27:12 +02:00
|
|
|
uncertain of the functionality.
|
|
|
|
|
|
|
|
-------------------------------
|
2013-08-06 18:20:17 +02:00
|
|
|
SAMA5 FUNCTION NUTTX PIO
|
2013-07-24 20:27:12 +02:00
|
|
|
PIO NAME CONFIGURATION
|
|
|
|
---- ---------- ---------------
|
2013-08-06 18:20:17 +02:00
|
|
|
PB31 DTXD PIO_DBGU_DTXD
|
|
|
|
PB30 DRXD PIO_DBGU_DRXD
|
2013-07-24 20:27:12 +02:00
|
|
|
|
|
|
|
Hardware UART via CDC
|
|
|
|
---------------------
|
|
|
|
"J-Link-OB-ATSAM3U4C comes with an additional hardware UART that is
|
|
|
|
accessible from a host via CDC which allows terminal communication with
|
|
|
|
the target device. This feature is enabled only if a certain port (CDC
|
|
|
|
disabled, PA25, pin 24 on J-Link-OB-ATSAM3U4C) is NOT connected to ground
|
|
|
|
(open).
|
|
|
|
|
|
|
|
- Jumper JP16 not fitted: CDC is enabled
|
|
|
|
- Jumper JP16 fitted : CDC is disabled"
|
2013-07-19 23:23:03 +02:00
|
|
|
|
2013-08-05 00:56:41 +02:00
|
|
|
Serial FLASH
|
|
|
|
============
|
|
|
|
|
|
|
|
Both the Ronetix and Embest versions of the SAMAD3x CPU modules include an
|
|
|
|
Atmel AT25DF321A, 32-megabit, 2.7-volt SPI serial flash. The SPI
|
|
|
|
connection is as follows:
|
|
|
|
|
|
|
|
AT25DF321A SAMA5
|
|
|
|
--------------- -----------------------------------------------
|
|
|
|
SI PD11 SPI0_MOSI
|
|
|
|
SO PD10 SPI0_MIS0
|
|
|
|
SCK PD12 SPI0_SPCK
|
|
|
|
/CS PD13 via NL17SZ126 if JP1 is closed (See below)
|
|
|
|
|
|
|
|
JP1 and JP2 seem to related to /CS on the Ronetix board, but the usage is
|
|
|
|
less clear. For the Embest module, JP1 must be closed to connect /CS to
|
|
|
|
PD13; on the Ronetix schematic, JP11 seems only to bypass a resistor (may
|
|
|
|
not be populated?). I think closing JP1 is correct in either case.
|
|
|
|
|
2013-08-06 00:21:24 +02:00
|
|
|
HSMCI Card Slots
|
|
|
|
================
|
|
|
|
|
|
|
|
The SAMA5D3x-EK provides a two SD memory card slots: (1) a full size SD
|
|
|
|
card slot (J7 labeled MCI0), and (2) a microSD memory card slot (J6
|
|
|
|
labeled MCI1).
|
|
|
|
|
|
|
|
The full size SD card slot connects via HSMCI0. The card detect discrete
|
|
|
|
is available on PB17 (pulled high). The write protect descrete is tied to
|
|
|
|
ground (via PP6) and not available to software. The slot supports 8-bit
|
|
|
|
wide transfer mode, but the NuttX driver currently uses only the 4-bit
|
|
|
|
wide transfer mode
|
|
|
|
|
|
|
|
PD17 MCI0_CD
|
|
|
|
PD1 MCI0_DA0
|
|
|
|
PD2 MCI0_DA1
|
|
|
|
PD3 MCI0_DA2
|
|
|
|
PD4 MCI0_DA3
|
|
|
|
PD5 MCI0_DA4
|
|
|
|
PD6 MCI0_DA5
|
|
|
|
PD7 MCI0_DA6
|
|
|
|
PD8 MCI0_DA7
|
|
|
|
PD9 MCI0_CK
|
|
|
|
PD0 MCI0_CDA
|
|
|
|
|
|
|
|
The microSD connects vi HSMCI1. The card detect discrete is available on
|
|
|
|
PB18 (pulled high):
|
|
|
|
|
|
|
|
PD18 MCI1_CD
|
|
|
|
PB20 MCI1_DA0
|
|
|
|
PB21 MCI1_DA1
|
|
|
|
PB22 MCI1_DA2
|
|
|
|
PB23 MCI1_DA3
|
|
|
|
PB24 MCI1_CK
|
|
|
|
PB19 MCI1_CDA
|
|
|
|
|
2013-08-12 19:59:10 +02:00
|
|
|
USB Ports
|
|
|
|
=========
|
|
|
|
|
|
|
|
The SAMA5D3 series-MB features three USB communication ports:
|
|
|
|
|
|
|
|
* Port A Host High Speed (EHCI) and Full Speed (OHCI) multiplexed with
|
|
|
|
USB Device High Speed Micro AB connector, J20
|
|
|
|
|
|
|
|
* Port B Host High Speed (EHCI) and Full Speed (OHCI) standard type A
|
|
|
|
connector, J19 upper port
|
|
|
|
|
|
|
|
* Port C Host Full Speed (OHCI) only standard type A connector, J19
|
|
|
|
lower port
|
|
|
|
|
|
|
|
All three USB host ports are equipped with 500 mA high-side power switch
|
|
|
|
for self-powered and buspowered applications. The USB device port feature
|
|
|
|
VBUS inserts detection function.
|
|
|
|
|
|
|
|
Port A
|
|
|
|
------
|
|
|
|
|
|
|
|
PIO Signal Name Function
|
|
|
|
---- ----------- -------------------------------------------------------
|
|
|
|
PD29 VBUS_SENSE VBus detection
|
|
|
|
PD25 EN5V_USBA VBus power enable (via MN15 AIC1526 Dual USB High-Side
|
|
|
|
Power Switch. The other channel of the switch is for
|
|
|
|
the LCD)
|
|
|
|
|
|
|
|
Port B
|
|
|
|
------
|
|
|
|
|
|
|
|
PIO Signal Name Function
|
|
|
|
---- ----------- -------------------------------------------------------
|
|
|
|
PD26 EN5V_USBB VBus power enable (via MN14 AIC1526 Dual USB High-Side
|
|
|
|
Power Switch). To the A1 pin of J19 Dual USB A
|
|
|
|
connector
|
|
|
|
|
|
|
|
Port C
|
|
|
|
------
|
|
|
|
|
|
|
|
PIO Signal Name Function
|
|
|
|
---- ----------- -------------------------------------------------------
|
|
|
|
PD27 EN5V_USBC VBus power enable (via MN14 AIC1526 Dual USB High-Side
|
|
|
|
Power Switch). To the B1 pin of J19 Dual USB A
|
|
|
|
connector
|
|
|
|
|
|
|
|
Both Ports B and C
|
|
|
|
------------------
|
|
|
|
|
|
|
|
PIO Signal Name Function
|
|
|
|
---- ----------- -------------------------------------------------------
|
|
|
|
PD28 OVCUR_USB Combined overrcurrent indication from port A and B
|
|
|
|
|
2013-07-19 23:23:03 +02:00
|
|
|
SAMA5D3x-EK Configuration Options
|
|
|
|
=================================
|
|
|
|
|
|
|
|
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
|
|
|
|
be set to:
|
|
|
|
|
|
|
|
CONFIG_ARCH="arm"
|
|
|
|
|
|
|
|
CONFIG_ARCH_family - For use in C code:
|
|
|
|
|
|
|
|
CONFIG_ARCH_ARM=y
|
|
|
|
|
|
|
|
CONFIG_ARCH_architecture - For use in C code:
|
|
|
|
|
|
|
|
CONFIG_ARCH_CORTEXA5=y
|
|
|
|
|
|
|
|
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
|
|
|
|
|
|
|
|
CONFIG_ARCH_CHIP="sama5"
|
|
|
|
|
|
|
|
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
|
|
|
|
chip:
|
|
|
|
|
|
|
|
CONFIG_ARCH_CHIP_SAMA5=y
|
|
|
|
|
|
|
|
and one of:
|
|
|
|
|
|
|
|
CONFIG_ARCH_CHIP_ATSAMA5D31=y
|
|
|
|
CONFIG_ARCH_CHIP_ATSAMA5D33=y
|
|
|
|
CONFIG_ARCH_CHIP_ATSAMA5D34=y
|
|
|
|
CONFIG_ARCH_CHIP_ATSAMA5D35=y
|
|
|
|
|
|
|
|
CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
|
|
|
|
hence, the board that supports the particular chip or SoC.
|
|
|
|
|
|
|
|
CONFIG_ARCH_BOARD="sama5d3x-ek" (for the SAMA5D3x-EK development board)
|
|
|
|
|
|
|
|
CONFIG_ARCH_BOARD_name - For use in C code
|
|
|
|
|
|
|
|
CONFIG_ARCH_BOARD_SAMA5D3X_EK=y
|
|
|
|
|
|
|
|
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
|
|
|
|
of delay loops
|
|
|
|
|
|
|
|
CONFIG_ENDIAN_BIG - define if big endian (default is little
|
|
|
|
endian)
|
|
|
|
|
2013-07-26 18:09:17 +02:00
|
|
|
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
|
2013-07-19 23:23:03 +02:00
|
|
|
|
2013-07-26 18:09:17 +02:00
|
|
|
CONFIG_RAM_SIZE=0x0002000 (128Kb)
|
2013-07-19 23:23:03 +02:00
|
|
|
|
2013-07-26 18:09:17 +02:00
|
|
|
CONFIG_RAM_START - The physical start address of installed DRAM
|
2013-07-19 23:23:03 +02:00
|
|
|
|
2013-07-26 18:09:17 +02:00
|
|
|
CONFIG_RAM_START=0x20000000
|
2013-07-19 23:23:03 +02:00
|
|
|
|
2013-07-26 18:09:17 +02:00
|
|
|
CONFIG_RAM_VSTART - The virutal start address of installed DRAM
|
2013-07-19 23:23:03 +02:00
|
|
|
|
2013-07-26 18:09:17 +02:00
|
|
|
CONFIG_RAM_VSTART=0x20000000
|
2013-07-19 23:23:03 +02:00
|
|
|
|
|
|
|
CONFIG_ARCH_IRQPRIO - The SAM3UF103Z supports interrupt prioritization
|
|
|
|
|
|
|
|
CONFIG_ARCH_IRQPRIO=y
|
|
|
|
|
|
|
|
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
|
|
|
|
have LEDs
|
|
|
|
|
|
|
|
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
|
|
|
|
stack. If defined, this symbol is the size of the interrupt
|
|
|
|
stack in bytes. If not defined, the user task stacks will be
|
|
|
|
used during interrupt handling.
|
|
|
|
|
|
|
|
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
|
|
|
|
|
|
|
|
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
|
|
|
|
|
|
|
|
CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
|
|
|
|
cause a 100 second delay during boot-up. This 100 second delay
|
|
|
|
serves no purpose other than it allows you to calibratre
|
|
|
|
CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure
|
|
|
|
the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
|
|
|
|
the delay actually is 100 seconds.
|
|
|
|
|
|
|
|
Individual subsystems can be enabled:
|
|
|
|
|
|
|
|
CONFIG_SAMA5_DBGU - Debug Unit Interrupt
|
|
|
|
CONFIG_SAMA5_PIT - Periodic Interval Timer Interrupt
|
|
|
|
CONFIG_SAMA5_WDT - Watchdog timer Interrupt
|
|
|
|
CONFIG_SAMA5_HSMC - Multi-bit ECC Interrupt
|
|
|
|
CONFIG_SAMA5_SMD - SMD Soft Modem
|
|
|
|
CONFIG_SAMA5_USART0 - USART 0
|
|
|
|
CONFIG_SAMA5_USART1 - USART 1
|
|
|
|
CONFIG_SAMA5_USART2 - USART 2
|
|
|
|
CONFIG_SAMA5_USART3 - USART 3
|
|
|
|
CONFIG_SAMA5_UART0 - UART 0
|
|
|
|
CONFIG_SAMA5_UART1 - UART 1
|
|
|
|
CONFIG_SAMA5_TWI0 - Two-Wire Interface 0
|
|
|
|
CONFIG_SAMA5_TWI1 - Two-Wire Interface 1
|
|
|
|
CONFIG_SAMA5_TWI2 - Two-Wire Interface 2
|
|
|
|
CONFIG_SAMA5_HSMCI0 - High Speed Multimedia Card Interface 0
|
|
|
|
CONFIG_SAMA5_HSMCI1 - High Speed Multimedia Card Interface 1
|
|
|
|
CONFIG_SAMA5_HSMCI2 - High Speed Multimedia Card Interface 2
|
|
|
|
CONFIG_SAMA5_SPI0 - Serial Peripheral Interface 0
|
|
|
|
CONFIG_SAMA5_SPI1 - Serial Peripheral Interface 1
|
|
|
|
CONFIG_SAMA5_TC0 - Timer Counter 0 (ch. 0, 1, 2)
|
|
|
|
CONFIG_SAMA5_TC1 - Timer Counter 1 (ch. 3, 4, 5)
|
|
|
|
CONFIG_SAMA5_PWM - Pulse Width Modulation Controller
|
|
|
|
CONFIG_SAMA5_ADC - Touch Screen ADC Controller
|
|
|
|
CONFIG_SAMA5_DMAC0 - DMA Controller 0
|
|
|
|
CONFIG_SAMA5_DMAC1 - DMA Controller 1
|
|
|
|
CONFIG_SAMA5_UHPHS - USB Host High Speed
|
|
|
|
CONFIG_SAMA5_UDPHS - USB Device High Speed
|
|
|
|
CONFIG_SAMA5_GMAC - Gigabit Ethernet MAC
|
|
|
|
CONFIG_SAMA5_EMAC - Ethernet MAC
|
|
|
|
CONFIG_SAMA5_LCDC - LCD Controller
|
|
|
|
CONFIG_SAMA5_ISI - Image Sensor Interface
|
|
|
|
CONFIG_SAMA5_SSC0 - Synchronous Serial Controller 0
|
|
|
|
CONFIG_SAMA5_SSC1 - Synchronous Serial Controller 1
|
|
|
|
CONFIG_SAMA5_CAN0 - CAN controller 0
|
|
|
|
CONFIG_SAMA5_CAN1 - CAN controller 1
|
|
|
|
CONFIG_SAMA5_SHA - Secure Hash Algorithm
|
|
|
|
CONFIG_SAMA5_AES - Advanced Encryption Standard
|
|
|
|
CONFIG_SAMA5_TDES - Triple Data Encryption Standard
|
|
|
|
CONFIG_SAMA5_TRNG - True Random Number Generator
|
|
|
|
CONFIG_SAMA5_ARM - Performance Monitor Unit
|
|
|
|
CONFIG_SAMA5_FUSE - Fuse Controller
|
|
|
|
CONFIG_SAMA5_MPDDRC - MPDDR controller
|
|
|
|
|
|
|
|
Some subsystems can be configured to operate in different ways. The drivers
|
|
|
|
need to know how to configure the subsystem.
|
|
|
|
|
2013-08-12 01:11:32 +02:00
|
|
|
CONFIG_SAMA5_PIOA_IRQ - Support PIOA interrupts
|
|
|
|
CONFIG_SAMA5_PIOB_IRQ - Support PIOB interrupts
|
|
|
|
CONFIG_SAMA5_PIOC_IRQ - Support PIOD interrupts
|
|
|
|
CONFIG_SAMA5_PIOD_IRQ - Support PIOD interrupts
|
|
|
|
CONFIG_SAMA5_PIOE_IRQ - Support PIOE interrupts
|
2013-07-19 23:23:03 +02:00
|
|
|
|
|
|
|
CONFIG_USART0_ISUART - USART0 is configured as a UART
|
|
|
|
CONFIG_USART1_ISUART - USART1 is configured as a UART
|
|
|
|
CONFIG_USART2_ISUART - USART2 is configured as a UART
|
|
|
|
CONFIG_USART3_ISUART - USART3 is configured as a UART
|
|
|
|
|
2013-08-12 01:11:32 +02:00
|
|
|
ST91SAMA5 specific device driver settings
|
2013-07-19 23:23:03 +02:00
|
|
|
|
|
|
|
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,3) or UART
|
|
|
|
m (m=4,5) for the console and ttys0 (default is the USART1).
|
|
|
|
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
|
|
|
|
This specific the size of the receive buffer
|
|
|
|
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
|
|
|
|
being sent. This specific the size of the transmit buffer
|
|
|
|
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
|
|
|
|
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
|
|
|
|
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
|
|
|
|
CONFIG_U[S]ARTn_2STOP - Two stop bits
|
|
|
|
|
2013-08-12 01:11:32 +02:00
|
|
|
AT91SAMA5 USB Host Configuration
|
|
|
|
Pre-requisites
|
|
|
|
|
|
|
|
CONFIG_USBDEV - Enable USB device support
|
|
|
|
CONFIG_USBHOST - Enable USB host support
|
|
|
|
CONFIG_SAMA5_UHPHS - Needed
|
|
|
|
CONFIG_SAMA5_OHCI - Enable the STM32 USB OTG FS block
|
|
|
|
CONFIG_SCHED_WORKQUEUE - Worker thread support is required
|
|
|
|
|
|
|
|
Options:
|
|
|
|
|
|
|
|
CONFIG_SAMA5_OHCI_NEDS
|
|
|
|
Number of endpoint descriptors
|
|
|
|
CONFIG_SAMA5_OHCI_NTDS
|
|
|
|
Number of transfer descriptors
|
|
|
|
CONFIG_SAMA5_OHCI_TDBUFFERS
|
|
|
|
Number of transfer descriptor buffers
|
|
|
|
CONFIG_SAMA5_OHCI_TDBUFSIZE
|
|
|
|
Size of one transfer descriptor buffer
|
|
|
|
CONFIG_USBHOST_INT_DISABLE
|
|
|
|
Disable interrupt endpoint support
|
|
|
|
CONFIG_USBHOST_ISOC_DISABLE
|
|
|
|
Disable isochronous endpoint support
|
|
|
|
CONFIG_USBHOST_BULK_DISABLE
|
|
|
|
Disable bulk endpoint support
|
|
|
|
|
|
|
|
config SAMA5_OHCI_REGDEBUG
|
|
|
|
|
2013-07-19 23:23:03 +02:00
|
|
|
Configurations
|
|
|
|
==============
|
|
|
|
|
|
|
|
Information Common to All Configurations
|
|
|
|
----------------------------------------
|
|
|
|
Each SAM3U-EK configuration is maintained in a sub-directory and
|
|
|
|
can be selected as follow:
|
|
|
|
|
|
|
|
cd tools
|
|
|
|
./configure.sh sama5d3x-ek/<subdir>
|
|
|
|
cd -
|
|
|
|
. ./setenv.sh
|
|
|
|
|
|
|
|
Before sourcing the setenv.sh file above, you should examine it and perform
|
2013-07-31 18:46:13 +02:00
|
|
|
edits as necessary so that TOOLCHAIN_BIN is the correct path to the directory
|
2013-07-19 23:23:03 +02:00
|
|
|
than holds your toolchain binaries.
|
|
|
|
|
|
|
|
And then build NuttX by simply typing the following. At the conclusion of
|
|
|
|
the make, the nuttx binary will reside in an ELF file called, simply, nuttx.
|
|
|
|
|
|
|
|
make
|
|
|
|
|
|
|
|
The <subdir> that is provided above as an argument to the tools/configure.sh
|
|
|
|
must be is one of the following.
|
|
|
|
|
|
|
|
NOTES:
|
|
|
|
|
|
|
|
1. These configurations use the mconf-based configuration tool. To
|
|
|
|
change any of these configurations using that tool, you should:
|
|
|
|
|
|
|
|
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
|
|
|
|
and misc/tools/
|
|
|
|
|
|
|
|
b. Execute 'make menuconfig' in nuttx/ in order to start the
|
|
|
|
reconfiguration process.
|
|
|
|
|
|
|
|
2. Unless stated otherwise, all configurations generate console
|
|
|
|
output on UART0 (J3).
|
|
|
|
|
|
|
|
3. Unless otherwise stated, the configurations are setup for
|
|
|
|
Linux (or any other POSIX environment like Cygwin under Windows):
|
|
|
|
|
|
|
|
Build Setup:
|
|
|
|
CONFIG_HOST_LINUX=y : Linux or other POSIX environment
|
|
|
|
|
|
|
|
4. All of these configurations use the Code Sourcery for Windows toolchain
|
|
|
|
(unless stated otherwise in the description of the configuration). That
|
|
|
|
toolchain selection can easily be reconfigured using 'make menuconfig'.
|
|
|
|
Here are the relevant current settings:
|
|
|
|
|
|
|
|
Build Setup:
|
|
|
|
CONFIG_HOST_WINDOS=y : Microsoft Windows
|
|
|
|
CONFIG_WINDOWS_CYGWIN=y : Using Cygwin or other POSIX environment
|
|
|
|
|
|
|
|
System Type -> Toolchain:
|
|
|
|
CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y : GNU EABI toolchain for windows
|
|
|
|
|
|
|
|
That same configuration will work with Atmel GCC toolchain. The only
|
|
|
|
change required to use the Atmel GCC toolchain is to change the PATH
|
|
|
|
variable so that those tools are selected instead of the CodeSourcery
|
|
|
|
tools. Try 'which arm-none-eabi-gcc' to make sure that you are
|
|
|
|
selecting the right tool.
|
|
|
|
|
|
|
|
The setenv.sh file is available for you to use to set the PATH
|
|
|
|
variable. The path in the that file may not, however, be correct
|
|
|
|
for your installation.
|
|
|
|
|
|
|
|
See also the "NOTE about Windows native toolchains" in the section call
|
|
|
|
"GNU Toolchain Options" above.
|
|
|
|
|
|
|
|
Configuration sub-directories
|
|
|
|
-----------------------------
|
|
|
|
|
2013-07-26 23:28:01 +02:00
|
|
|
hello:
|
|
|
|
This configuration directory, performs the (almost) simplest of all
|
|
|
|
possible examples: examples/hello. This just comes up, says hello
|
|
|
|
on the serial console and terminates. This configuration is of
|
|
|
|
value during bring-up because it is small and can run entirely out
|
|
|
|
of internal SRAM.
|
|
|
|
|
|
|
|
NOTES:
|
|
|
|
1. This configuration uses the default USART1 serial console. That
|
|
|
|
is easily changed by reconfiguring to (1) enable a different
|
|
|
|
serial peripheral, and (2) selecting that serial peripheral as
|
|
|
|
the console device.
|
|
|
|
|
|
|
|
2. By default, this configuration is set up to build on Windows
|
|
|
|
under either a Cygwin or MSYS environment using a recent, Windows-
|
|
|
|
native, generic ARM EABI GCC toolchain (such as the CodeSourcery
|
|
|
|
toolchain). Both the build environment and the toolchain
|
|
|
|
selection can easily be changed by reconfiguring:
|
|
|
|
|
|
|
|
CONFIG_HOST_WINDOWS=y : Windows operating system
|
|
|
|
CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows
|
|
|
|
CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows
|
|
|
|
|
2013-07-28 23:07:35 +02:00
|
|
|
3. This configuration executes out of internal SRAM and can only
|
2013-07-26 23:28:01 +02:00
|
|
|
be loaded via JTAG.
|
|
|
|
|
|
|
|
CONFIG_SAMA5_BOOT_ISRAM=y : Boot into internal SRAM
|
|
|
|
CONFIG_BOOT_RUNFROMISRAM=y : Run from internal SRAM
|
|
|
|
|
2013-07-28 23:07:35 +02:00
|
|
|
STATUS:
|
2013-07-31 19:44:30 +02:00
|
|
|
2013-7-19: This configuration (as do the others) run at 396MHz.
|
|
|
|
The SAMA5D3 can run at 536MHz. I still need to figure out the
|
|
|
|
PLL settings to get that speed.
|
|
|
|
|
2013-07-28 23:07:35 +02:00
|
|
|
2013-7-28: This configuration was verified functional.
|
|
|
|
|
2013-07-31 19:44:30 +02:00
|
|
|
2013-7-31: Delay loop calibrated.
|
|
|
|
|
2013-07-30 01:54:56 +02:00
|
|
|
norboot:
|
|
|
|
This is a little program to help debug of code in NOR flash. It
|
|
|
|
does the following:
|
|
|
|
|
|
|
|
- It enables and configures NOR FLASH, then
|
|
|
|
- Waits for you to break in with GDB.
|
|
|
|
|
|
|
|
At that point, you can set the PC and begin executing from NOR FLASH
|
|
|
|
under debug control.
|
|
|
|
|
|
|
|
NOTES:
|
|
|
|
1. This program derives from the hello configuration. All of the
|
|
|
|
notes there apply to this configuration as well.
|
|
|
|
|
2013-07-31 19:44:30 +02:00
|
|
|
STATUS:
|
|
|
|
2013-7-19: This configuration (as do the others) run at 396MHz.
|
|
|
|
The SAMA5D3 can run at 536MHz. I still need to figure out the
|
|
|
|
PLL settings to get that speed.
|
|
|
|
|
|
|
|
2013-7-31: Delay loop calibrated.
|
|
|
|
|
2013-07-31 18:46:13 +02:00
|
|
|
nsh:
|
|
|
|
This configuration directory provide the NuttShell (NSH).
|
|
|
|
|
|
|
|
NOTES:
|
|
|
|
1. This configuration uses the default USART1 serial console. That
|
|
|
|
is easily changed by reconfiguring to (1) enable a different
|
|
|
|
serial peripheral, and (2) selecting that serial peripheral as
|
|
|
|
the console device.
|
|
|
|
|
|
|
|
2. By default, this configuration is set up to build on Windows
|
|
|
|
under either a Cygwin or MSYS environment using a recent, Windows-
|
|
|
|
native, generic ARM EABI GCC toolchain (such as the CodeSourcery
|
|
|
|
toolchain). Both the build environment and the toolchain
|
|
|
|
selection can easily be changed by reconfiguring:
|
|
|
|
|
|
|
|
CONFIG_HOST_WINDOWS=y : Windows operating system
|
|
|
|
CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows
|
|
|
|
CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows
|
|
|
|
|
|
|
|
3. This configuration executes out of CS0 NOR flash and can only
|
|
|
|
be loaded via SAM-BA. These are the relevant configuration options
|
|
|
|
the define the NOR FLASH configuration:
|
|
|
|
|
|
|
|
CONFIG_SAMA5_BOOT_CS0FLASH=y : Boot from FLASH on CS0
|
|
|
|
CONFIG_BOOT_RUNFROMFLASH=y : Run in place on FLASH (vs copying to RAM)
|
|
|
|
|
|
|
|
CONFIG_SAMA5_EBICS0=y : Enable CS0 external memory
|
|
|
|
CONFIG_SAMA5_EBICS0_SIZE=134217728 : Memory size is 128KB
|
|
|
|
CONFIG_SAMA5_EBICS0_NOR=y : Memory type is NOR FLASH
|
|
|
|
|
|
|
|
CONFIG_FLASH_START=0x10000000 : Physical FLASH start address
|
|
|
|
CONFIG_FLASH_VSTART=0x10000000 : Virtual FLASH start address
|
|
|
|
CONFIG_FLASH_SIZE=134217728 : FLASH size (again)
|
|
|
|
|
|
|
|
CONFIG_RAM_START=0x00300400 : Data stored after page table
|
|
|
|
CONFIG_RAM_VSTART=0x00300400
|
|
|
|
CONFIG_RAM_SIZE=114688 : Available size of 128KB - 16KB for page table
|
|
|
|
|
|
|
|
NOTE: In order to boot in this configuration, you need to close the
|
|
|
|
BMS jumper.
|
|
|
|
|
|
|
|
4. This configuration has support for NSH built-in applications enabled.
|
|
|
|
However, no built-in applications are selected in the base configuration.
|
|
|
|
|
2013-08-05 16:24:39 +02:00
|
|
|
5. This configuration has support for the FAT file system built in. However,
|
|
|
|
by default, there are no block drivers intialized. The FAT file system can
|
|
|
|
still be used to create RAM disks.
|
|
|
|
|
|
|
|
6. SDRAM support can be enabled by adding the following to your NuttX
|
2013-08-02 20:06:11 +02:00
|
|
|
configuration file:
|
|
|
|
|
2013-08-03 02:30:27 +02:00
|
|
|
System Type->ATSAMA5 Peripheral Support
|
2013-08-02 20:06:11 +02:00
|
|
|
CONFIG_SAMA5_MPDDRC=y : Enable the DDR controller
|
2013-08-03 02:30:27 +02:00
|
|
|
|
|
|
|
System Type->External Memory Configuration
|
2013-08-02 20:06:11 +02:00
|
|
|
CONFIG_SAMA5_DDRCS=y : Tell the system that DRAM is at the DDR CS
|
|
|
|
CONFIG_SAMA5_DDRCS_SIZE=268435456 : 2Gb DRAM -> 256GB
|
|
|
|
CONFIG_SAMA5_DDRCS_LPDDR2=y : Its DDR2
|
|
|
|
CONFIG_SAMA5_MT47H128M16RT=y : This is the type of DDR2
|
|
|
|
|
|
|
|
Now that you have SDRAM enabled, what are you going to do with it? One
|
|
|
|
thing you can is add it to the heap
|
|
|
|
|
2013-08-03 02:30:27 +02:00
|
|
|
System Type->Heap Configuration
|
2013-08-02 20:06:11 +02:00
|
|
|
CONFIG_SAMA5_DDRCS_HEAP=y : Add the SDRAM to the heap
|
2013-08-03 02:30:27 +02:00
|
|
|
|
|
|
|
Memory Management
|
2013-08-02 20:06:11 +02:00
|
|
|
CONFIG_MM_REGIONS=2 : Two memory regions: ISRAM and SDRAM
|
|
|
|
|
|
|
|
Another thing you could do is to enable the RAM test built-in
|
|
|
|
application:
|
|
|
|
|
2013-08-05 16:24:39 +02:00
|
|
|
7. You can enable the NuttX RAM test that may be used to verify the
|
2013-08-02 20:06:11 +02:00
|
|
|
external SDAM. To do this, keep the SDRAM out of the heap so that
|
|
|
|
it can be tested without crashing programs using the memory:
|
|
|
|
|
2013-08-03 02:30:27 +02:00
|
|
|
System Type->Heap Configuration
|
2013-08-02 20:06:11 +02:00
|
|
|
CONFIG_SAMA5_DDRCS_HEAP=n : Don't add the SDRAM to the heap
|
2013-08-03 02:30:27 +02:00
|
|
|
|
|
|
|
Memory Management
|
2013-08-02 20:06:11 +02:00
|
|
|
CONFIG_MM_REGIONS=1 : One memory regions: ISRAM
|
|
|
|
|
2013-08-03 02:30:27 +02:00
|
|
|
Then enable the RAM test built-in application:
|
|
|
|
|
|
|
|
Application Configuration->System NSH Add-Ons->Ram Test
|
|
|
|
CONFIG_SYSTEM_RAMTEST=y
|
|
|
|
|
2013-08-02 20:06:11 +02:00
|
|
|
In this configuration, the SDRAM is not added to heap and so is not
|
|
|
|
excessible to the applications. So the RAM test can be freely
|
|
|
|
executed against the SRAM memory beginning at address 0x2000:0000
|
|
|
|
(DDR CS):
|
|
|
|
|
|
|
|
nsh> ramtest -h
|
|
|
|
Usage: <noname> [-w|h|b] <hex-address> <decimal-size>
|
|
|
|
|
|
|
|
Where:
|
|
|
|
<hex-address> starting address of the test.
|
|
|
|
<decimal-size> number of memory locations (in bytes).
|
|
|
|
-w Sets the width of a memory location to 32-bits.
|
|
|
|
-h Sets the width of a memory location to 16-bits (default).
|
|
|
|
-b Sets the width of a memory location to 8-bits.
|
|
|
|
|
|
|
|
To test the entire external 256MB SRAM:
|
|
|
|
|
2013-08-03 02:30:27 +02:00
|
|
|
nsh> ramtest -w 20000000 268435456
|
|
|
|
RAMTest: Marching ones: 20000000 268435456
|
|
|
|
RAMTest: Marching zeroes: 20000000 268435456
|
|
|
|
RAMTest: Pattern test: 20000000 268435456 55555555 aaaaaaaa
|
|
|
|
RAMTest: Pattern test: 20000000 268435456 66666666 99999999
|
|
|
|
RAMTest: Pattern test: 20000000 268435456 33333333 cccccccc
|
|
|
|
RAMTest: Address-in-address test: 20000000 268435456
|
2013-08-02 20:06:11 +02:00
|
|
|
|
2013-08-05 16:24:39 +02:00
|
|
|
8. The Embest or Ronetix CPU module includes an Atmel AT25DF321A,
|
2013-08-05 00:56:41 +02:00
|
|
|
32-megabit, 2.7-volt SPI serial flash. Support for that serial
|
|
|
|
FLASH can be enabled by modifying the NuttX configuration as
|
|
|
|
follows:
|
|
|
|
|
|
|
|
System Type -> SAMA5 Peripheral Support
|
|
|
|
CONFIG_SAMA5_SPI0=y : Enable SPI0
|
|
|
|
|
|
|
|
Device Drivers -> Memory Technology Device (MTD) Support
|
|
|
|
CONFIG_SPI=y : Enable SPI support
|
|
|
|
CONFIG_SPI_EXCHANGE=y : Support the exchange method
|
|
|
|
|
|
|
|
Device Drivers -> SPI Driver Support
|
|
|
|
CONFIG_MTD=y : Enable MTD support
|
|
|
|
CONFIG_MTD_AT25=y : Enable the AT25 driver
|
|
|
|
CONFIG_AT25_SPIMODE=0 : Use SPI mode 0
|
|
|
|
CONFIG_AT25_SPIFREQUENCY=20000000 : Use SPI frequency 20MHz
|
|
|
|
|
2013-08-05 16:24:39 +02:00
|
|
|
Application Configuration -> NSH Library
|
|
|
|
CONFIG_NSH_ARCHINIT=y : NSH board-initialization
|
|
|
|
|
|
|
|
Board Selection
|
|
|
|
CONFIG_SAMA5_AT25_AUTOMOUNT=y : Mounts AT25 for NSH
|
|
|
|
CONFIG_SAMA5_AT25_FTL=y : Create block driver for FAT
|
|
|
|
|
2013-08-09 21:12:16 +02:00
|
|
|
The SPI driver can be built to do polled or DMA SPI data transfers.
|
|
|
|
The following additional changes will enable SPI DMA:
|
|
|
|
|
|
|
|
System Type -> SAMA5 Peripheral Support
|
|
|
|
CONFIG_SAMA5_DMAC0=y : Enable DMA controller 0
|
|
|
|
|
|
|
|
System Type -> SPI device driver options
|
|
|
|
CONFIG_SAMA5_SPI_DMA=y : Use DMA for SPI transfers
|
|
|
|
CONFIG_SAMA5_SPI_DMATHRESHOLD=4 : Don't DMA for small transfers
|
|
|
|
|
2013-08-05 16:24:39 +02:00
|
|
|
NOTE that you must close JP1 on the Embest/Ronetix board in
|
|
|
|
order to enable the AT25 FLASH chip select.
|
|
|
|
|
2013-08-05 18:29:43 +02:00
|
|
|
You can then format the AT25 FLASH for a FAT file system and mount
|
|
|
|
the file system at /mnt/sdcard using these NSH commands:
|
|
|
|
|
|
|
|
nsh> mkfatfs /dev/mtdblock0
|
|
|
|
nsh> mount -t vfat /dev/mtdblock0 /mnt/sdcard
|
|
|
|
|
|
|
|
Then you an use the FLASH as a normal FAT file system:
|
|
|
|
|
|
|
|
nsh> echo "This is a test" >/mnt/sdcard/atest.txt
|
|
|
|
nsh> ls -l /mnt/sdcard
|
|
|
|
/mnt/sdcard:
|
|
|
|
-rw-rw-rw- 16 atest.txt
|
|
|
|
nsh> cat /mnt/sdcard/atest.txt
|
|
|
|
This is a test
|
|
|
|
|
2013-08-06 00:21:24 +02:00
|
|
|
9. Enabling HSMCI support. The SAMA5D3x-EK provides a two SD memory card
|
|
|
|
slots: (1) a full size SD card slot (J7 labeled MCI0), and (2) a
|
|
|
|
microSD memory card slot (J6 labeled MCI1). The full size SD card
|
|
|
|
slot connects via HSMCI0; the microSD connects vi HSMCI1. Support
|
|
|
|
for both SD slots can be enabled with the following settings:
|
|
|
|
|
|
|
|
System Type->ATSAMA5 Peripheral Support
|
|
|
|
CONFIG_SAMA5_HSMCI0=y : Enable HSMCI0 support
|
|
|
|
CONFIG_SAMA5_HSMCI1=y : Enable HSMCI1 support
|
|
|
|
CONFIG_SAMA5_DMAC0=y : DMAC0 is needed by HSMCI0
|
|
|
|
CONFIG_SAMA5_DMAC1=y : DMAC1 is needed by HSMCI1
|
|
|
|
|
2013-08-11 02:01:23 +02:00
|
|
|
System Type
|
2013-08-06 18:20:17 +02:00
|
|
|
CONFIG_SAMA5_PIO_IRQ=y : PIO interrupts needed
|
|
|
|
CONFIG_SAMA5_PIOD_IRQ=y : Card detect pins are on PIOD
|
|
|
|
|
2013-08-11 02:01:23 +02:00
|
|
|
Device Drivers -> MMC/SD Driver Support
|
2013-08-06 00:21:24 +02:00
|
|
|
CONFIG_MMCSD=y : Enable MMC/SD support
|
|
|
|
CONFIG_MMSCD_NSLOTS=1 : One slot per driver instance
|
2013-08-06 18:20:17 +02:00
|
|
|
CONFIG_MMCSD_HAVECARDDETECT=y : Supports card-detect PIOs
|
2013-08-06 00:21:24 +02:00
|
|
|
CONFIG_MMCSD_SDIO=y : SDIO-based MMC/SD support
|
|
|
|
CONFIG_SDIO_DMA=y : Use SDIO DMA
|
|
|
|
CONFIG_SDIO_BLOCKSETUP=y : Needs to know block sizes
|
|
|
|
|
|
|
|
Library Routines
|
|
|
|
CONFIG_SCHED_WORKQUEUE=y : Driver needs work queue support
|
|
|
|
|
|
|
|
Application Configuration -> NSH Library
|
|
|
|
CONFIG_NSH_ARCHINIT=y : NSH board-initialization
|
|
|
|
|
2013-08-11 19:13:11 +02:00
|
|
|
Using the SD card:
|
|
|
|
|
|
|
|
1) If you try mounting an SD card with nothing in the slot, the
|
|
|
|
mount will fail:
|
|
|
|
|
|
|
|
nsh> mount -t vfat /dev/mmcsd1 /mnt/sd1
|
|
|
|
nsh: mount: mount failed: 19
|
|
|
|
|
|
|
|
NSH can be configured to provide errors as strings instead of
|
|
|
|
numbers. But in this case, only the error number is reported.
|
|
|
|
The error numbers can be found in nuttx/include/errno.h:
|
|
|
|
|
|
|
|
#define ENODEV 19
|
|
|
|
#define ENODEV_STR "No such device"
|
|
|
|
|
|
|
|
So the mount command is saying that there is no device or, more
|
|
|
|
correctly, that there is no card in the SD card slot.
|
|
|
|
|
|
|
|
2) Inserted the SD card. Then the mount should succeed.
|
|
|
|
|
|
|
|
nsh> mount -t vfat /dev/mmcsd1 /mnt/sd1
|
|
|
|
nsh> ls /mnt/sd1
|
|
|
|
/mnt/sd1:
|
|
|
|
atest.txt
|
|
|
|
nsh> cat /mnt/sd1/atest.txt
|
|
|
|
This is a test
|
|
|
|
|
|
|
|
3) Before removing the card, you must umount the file system. This
|
|
|
|
is equivalent to "ejecting" or "safely removing" the card on
|
|
|
|
Windows: It flushes any cached data to the card and makes the SD
|
|
|
|
card unavailable to the applications.
|
|
|
|
|
|
|
|
nsh> mount -t vfat /dev/mmcsd1 /mnt/sd1
|
|
|
|
|
|
|
|
It is now safe to remove the card. NuttX provides into callbacks
|
|
|
|
that can be used by an application to automatically unmount the
|
|
|
|
volume when it is removed. But those callbacks are not used in
|
|
|
|
this configuration.
|
|
|
|
|
2013-08-24 19:34:24 +02:00
|
|
|
10) Support the USB low/full-speed OHCI host driver can be enabled by changing
|
2013-08-12 01:11:32 +02:00
|
|
|
the NuttX configuration file as follows:
|
|
|
|
|
|
|
|
System Type -> ATSAMA5 Peripheral Support
|
|
|
|
CONFIG_SAMA5_UHPHS=y : USB Host High Speed
|
|
|
|
|
|
|
|
System Type -> USB High Speed Host driver options
|
2013-08-24 19:34:24 +02:00
|
|
|
CONFIG_SAMA5_OHCI=y : Low/full-speed OHCI support
|
2013-08-12 01:11:32 +02:00
|
|
|
: Defaults for values probably OK
|
|
|
|
Device Drivers
|
|
|
|
CONFIG_USBHOST=y : Enable USB host support
|
|
|
|
|
|
|
|
Device Drivers -> USB Host Driver Support
|
|
|
|
CONFIG_USBHOST_ISOC_DISABLE=y : Isochronous endpoints not used
|
|
|
|
CONFIG_USBHOST_MSC=y : Enable the mass storage class driver
|
|
|
|
|
|
|
|
Library Routines
|
|
|
|
CONFIG_SCHED_WORKQUEUE : Worker thread support is required
|
|
|
|
|
2013-08-12 19:59:10 +02:00
|
|
|
Application Configuration -> NSH Library
|
|
|
|
CONFIG_NSH_ARCHINIT=y : NSH board-initialization
|
|
|
|
|
2013-08-16 19:36:51 +02:00
|
|
|
NOTE: When OHCI is selected, the SAMA5 will operate at 384MHz instead
|
|
|
|
of 396MHz. This is so that the PLL generates a frequency which is a
|
|
|
|
multiple of the 48MHz needed for OHCI. The delay loop calibration
|
|
|
|
values that are used will be off slightly because of this.
|
|
|
|
|
2013-08-21 19:07:42 +02:00
|
|
|
10) Support the USB high-speed EHCI host driver can be enabled by changing
|
2013-08-24 19:34:24 +02:00
|
|
|
the NuttX configuration file as follows. If EHCI is enabled by itself,
|
|
|
|
then only high-speed devices can be supported. If OHCI is also enabled,
|
|
|
|
then all low-, full-, and high speed devices should work.
|
2013-08-21 19:07:42 +02:00
|
|
|
|
|
|
|
System Type -> ATSAMA5 Peripheral Support
|
|
|
|
CONFIG_SAMA5_UHPHS=y : USB Host High Speed
|
|
|
|
|
|
|
|
System Type -> USB High Speed Host driver options
|
|
|
|
CONFIG_SAMA5_EHCI=y : High-speed EHCI support
|
2013-08-24 19:34:24 +02:00
|
|
|
CONFIG_SAMA5_OHCI=y : Low/full-speed OHCI support
|
|
|
|
: Defaults for values probably OK for both
|
2013-08-21 19:07:42 +02:00
|
|
|
Device Drivers
|
|
|
|
CONFIG_USBHOST=y : Enable USB host support
|
2013-08-28 21:07:35 +02:00
|
|
|
CONFIG_USBHOST_INT_DISABLE=y : Interrupt endpoints not needed
|
|
|
|
CONFIG_USBHOST_ISOC_DISABLE=y : Isochronous endpoints not needed
|
2013-08-21 19:07:42 +02:00
|
|
|
|
|
|
|
Device Drivers -> USB Host Driver Support
|
|
|
|
CONFIG_USBHOST_ISOC_DISABLE=y : Isochronous endpoints not used
|
|
|
|
CONFIG_USBHOST_MSC=y : Enable the mass storage class driver
|
|
|
|
|
|
|
|
Library Routines
|
|
|
|
CONFIG_SCHED_WORKQUEUE : Worker thread support is required
|
|
|
|
|
2013-08-28 21:07:35 +02:00
|
|
|
Application Configuration -> NSH Library
|
|
|
|
CONFIG_NSH_ARCHINIT=y : NSH board-initialization
|
2013-08-21 19:07:42 +02:00
|
|
|
|
2013-09-01 01:37:51 +02:00
|
|
|
10) Support the USB high-speed EHCI host driver can be enabled by changing
|
|
|
|
the NuttX configuration file as follows. If EHCI is enabled by itself,
|
|
|
|
|
|
|
|
Device Drivers -> USB Device Driver Support
|
|
|
|
CONFIG_USBDEV=y : Enable USB device support
|
|
|
|
CONFIG_USBDEV_DMA=y : Device uses DMA
|
|
|
|
CONFIG_USBDEV_DUALSPEED=y : Device support High and Full Speed
|
|
|
|
|
|
|
|
System Type -> ATSAMA5 Peripheral Support
|
|
|
|
CONFIG_SAMA5_UDPHS=y : Enable UDPHS High Speed USB device
|
|
|
|
|
|
|
|
Application Configuration -> NSH Library
|
|
|
|
CONFIG_NSH_ARCHINIT=y : NSH board-initialization
|
|
|
|
|
|
|
|
You also need to select a device-side class driver for the USB device,
|
|
|
|
This will select the CDC/ACM serial device. Defaults for the other
|
|
|
|
options should be okay.
|
|
|
|
|
|
|
|
Device Drivers -> USB Device Driver Support
|
|
|
|
CONFIG_CDCACM=y : Enable the CDC/ACM device
|
|
|
|
|
2013-09-02 20:26:15 +02:00
|
|
|
The following setting enables an example that can can be used to
|
|
|
|
control the CDC/ACM device. It will add two new NSH commands:
|
|
|
|
(1) sercon will connect the USB serial device (creating /dev/ttyACM0),
|
|
|
|
and (2) serdis which will disconnect the USB serial device (destroying
|
|
|
|
/dev/ttyACM0).
|
|
|
|
|
|
|
|
Application Configuration -> Examples:
|
|
|
|
CONFIG_EXAMPLES_CDCACM=y : Enable an CDC/ACM example
|
|
|
|
|
2013-08-05 16:24:39 +02:00
|
|
|
STATUS:
|
|
|
|
2013-7-19: This configuration (as do the others) run at 396MHz.
|
|
|
|
The SAMA5D3 can run at 536MHz. I still need to figure out the
|
|
|
|
PLL settings to get that speed.
|
|
|
|
|
|
|
|
If the CPU speed changes, then so must the NOR and SDRAM
|
|
|
|
initialization!
|
|
|
|
|
2013-07-31 18:46:13 +02:00
|
|
|
2013-7-31: I have been unable to execute this configuration from NOR
|
|
|
|
FLASH by closing the BMS jumper (J9). As far as I can tell, this
|
|
|
|
jumper does nothing on my board??? I have been using the norboot
|
|
|
|
configuration to start the program in NOR FLASH (see just above).
|
|
|
|
See "Creating and Using NORBOOT" above.
|
2013-07-31 19:44:30 +02:00
|
|
|
|
2013-07-31 18:46:13 +02:00
|
|
|
2013-7-31: This NSH configuration appears to be fully functional.
|
|
|
|
|
2013-07-31 19:44:30 +02:00
|
|
|
2013-7-31: Using delay loop calibration from the hello configuration.
|
|
|
|
That configuration runs out of internal SRAM and, as a result, this
|
2013-08-11 19:13:11 +02:00
|
|
|
configuration should be recalibrated.
|
2013-07-31 19:44:30 +02:00
|
|
|
|
2013-08-03 16:22:37 +02:00
|
|
|
2013-8-3: SDRAM configuration and RAM test usage have been verified
|
2013-08-10 17:06:53 +02:00
|
|
|
and are functional. I note some issues; occassionally, SDRAM is
|
|
|
|
not functional on initial boot or is initially not functional but
|
2013-08-03 16:22:37 +02:00
|
|
|
improves with accesses. Clearly, more work needs to be done.
|
|
|
|
|
|
|
|
Here is another strange observation: SDRAM accesses tend to
|
2013-08-04 00:51:48 +02:00
|
|
|
generate occasional spurious interrupts in those same conditions
|
|
|
|
where the memory test fails! No idea why.
|
2013-08-02 20:06:11 +02:00
|
|
|
|
2013-08-05 18:29:43 +02:00
|
|
|
2013-8-5: The AT25 configuration has been verified to be functional.
|
2013-08-11 02:01:23 +02:00
|
|
|
2013-8-9: The AT25 configuration has been verified with DMA
|
2013-08-10 17:06:53 +02:00
|
|
|
enabled.
|
2013-08-05 18:29:43 +02:00
|
|
|
|
2013-08-11 02:01:23 +02:00
|
|
|
2013-8-10: Basic HSCMI1 functionality (with DMA) has been verified.
|
|
|
|
Most testing is needed to assure that this is a stable solution.
|
2013-08-11 19:13:11 +02:00
|
|
|
2013-8-11: HSMCI0 is more finicky. Usually there is no card
|
|
|
|
communcation and I get timeouts. But if I remove and re-insert the
|
|
|
|
card it few times, sometimes communication is successfully and the
|
|
|
|
card behaves normally. I suspected an electro-mechanical issue but
|
|
|
|
but now think there is more to the problem than that.
|
|
|
|
2013-8-11: I see another problem doing card insertion and card removal
|
|
|
|
testing. When there is a lot of debug output, the system locks up.
|
|
|
|
I have traced to this the debug output itself. The debug output
|
|
|
|
from the device driver interferes with normal serial port operation
|
|
|
|
and prevents NSH from receiving data. There is no issue when the
|
|
|
|
debug output is suppressed and card insertial and removal works as
|
|
|
|
expected (at least on the HSMCI1 microSD slot).
|
2013-08-18 17:01:16 +02:00
|
|
|
2013-8-14: I found an error in the way that the HSCMI clocking was
|
|
|
|
configured (a SAM3/4 cloning error). Need to retest both HSMCI0/1
|
|
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with the corrected clocking.
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2013-8-11: Added description to add OHCI to the configuration.
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2013-8-16: The OCHI configuration is now basically functional.
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Testing is not yet extensive, however:
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a) I have lots of DEBUG output enabled. There could be issues
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when I re-test with debug options disabled.
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b) I have tested only control and bulk endpoints. I still need
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to test interrupt endpoints.
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c) I have tested only the Mass Storage Class (MSC) and not CDC/ACM.
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d) OHCI will support 3 downstream points, but I currently have only
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one enabled.
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2013-08-12 01:11:32 +02:00
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2013-08-21 19:07:42 +02:00
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2013-8-20: Added description to add EHCI to the configuration. At
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present, however, EHCI is still a work in progress and not ready for
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prime time.
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2013-08-28 21:07:35 +02:00
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2013-8-26:
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The hand-off of full speed devices to OHCI does not work. In this
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case, OHCI gets the port, but the port is reset, lost by OHCI and
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returned to EHCI. EHCI sees the full-speed port and hands it off to
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OHCI and this sequence continues forever.
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2013-8-28: EHCI is partially functional. It is able to mount a high-
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speed USB FLASH drive using the Mass Storage Class (MSC) interface.
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2013-08-21 19:07:42 +02:00
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2013-09-01 01:37:51 +02:00
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2013-8-31: Added description to add UDPHS high-speed USB device
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support. That function is still, however, a long way from being
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functional.
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2013-07-19 23:23:03 +02:00
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ostest:
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This configuration directory, performs a simple OS test using
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examples/ostest.
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2013-07-24 20:27:12 +02:00
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NOTES:
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1. This configuration uses the default USART1 serial console. That
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is easily changed by reconfiguring to (1) enable a different
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serial peripheral, and (2) selecting that serial peripheral as
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the console device.
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2. By default, this configuration is set up to build on Windows
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under either a Cygwin or MSYS environment using a recent, Windows-
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native, generic ARM EABI GCC toolchain (such as the CodeSourcery
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toolchain). Both the build environment and the toolchain
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selection can easily be changed by reconfiguring:
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CONFIG_HOST_WINDOWS=y : Windows operating system
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CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows
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CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows
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|
2013-07-28 23:07:35 +02:00
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3. This configuration executes out of CS0 NOR flash and can only
|
2013-07-31 18:46:13 +02:00
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be loaded via SAM-BA. These are the relevant configuration options
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the define the NOR FLASH configuration:
|
2013-07-24 20:27:12 +02:00
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2013-07-28 23:07:35 +02:00
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CONFIG_SAMA5_BOOT_CS0FLASH=y : Boot from FLASH on CS0
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CONFIG_BOOT_RUNFROMFLASH=y : Run in place on FLASH (vs copying to RAM)
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CONFIG_SAMA5_EBICS0=y : Enable CS0 external memory
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CONFIG_SAMA5_EBICS0_SIZE=134217728 : Memory size is 128KB
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CONFIG_SAMA5_EBICS0_NOR=y : Memory type is NOR FLASH
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|
2013-07-29 15:41:53 +02:00
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CONFIG_FLASH_START=0x10000000 : Physical FLASH start address
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CONFIG_FLASH_VSTART=0x10000000 : Virtual FLASH start address
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CONFIG_FLASH_SIZE=134217728 : FLASH size (again)
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CONFIG_RAM_START=0x00300400 : Data stored after page table
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CONFIG_RAM_VSTART=0x00300400
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CONFIG_RAM_SIZE=114688 : Available size of 128KB - 16KB for page table
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|
2013-07-28 23:07:35 +02:00
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|
NOTE: In order to boot in this configuration, you need to close the
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BMS jumper.
|
2013-07-26 23:28:01 +02:00
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STATUS:
|
2013-07-31 19:44:30 +02:00
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2013-7-19: This configuration (as do the others) run at 396MHz.
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|
The SAMA5D3 can run at 536MHz. I still need to figure out the
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|
PLL settings to get that speed.
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|
2013-08-02 20:06:11 +02:00
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|
If the CPU speed changes, then so must the NOR and SDRAM
|
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|
|
initialization!
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|
2013-07-31 00:19:52 +02:00
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|
2013-7-30: I have been unable to execute this configuration from NOR
|
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|
|
FLASH by closing the BMS jumper (J9). As far as I can tell, this
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|
jumper does nothing on my board??? I have been using the norboot
|
|
|
|
configuration to start the program in NOR FLASH (see just above).
|
2013-07-31 18:46:13 +02:00
|
|
|
See "Creating and Using NORBOOT" above.
|
2013-07-31 17:11:24 +02:00
|
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|
2013-08-11 02:01:23 +02:00
|
|
|
2013-7-31: The OS test configuration is basically functional, but
|
2013-07-31 19:44:30 +02:00
|
|
|
takes a very long time in the round-robin scheduler test computing
|
|
|
|
prime numbers. This test is supposed to be slow -- like several
|
|
|
|
seconds -- but not many minutes. No idea why yet. The best guess
|
|
|
|
would be an excessive number of context switches.
|
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|
2013-7-31: Using delay loop calibration from the hello configuration.
|
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|
|
That configuration runs out of internal SRAM and, as a result, this
|
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|
|
configuration needs to be recalibrated.
|