2012-09-09 21:13:30 +02:00
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/************************************************************************************
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2015-12-29 22:44:56 +01:00
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* configs/fire-stm32v2/src/fire-stm32v2.h
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* arch/arm/src/board/fire-stm32v2.n
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2012-09-09 21:13:30 +02:00
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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2015-12-29 22:44:56 +01:00
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#ifndef __CONFIGS_FIRE_STM32V2_SRC_FIRE_H
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#define __CONFIGS_FIRE_STM32V2_SRC_FIRE_H
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2012-09-09 21:13:30 +02:00
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/compiler.h>
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#include <stdint.h>
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/************************************************************************************
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2015-03-21 16:48:31 +01:00
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* Pre-processor Definitions
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2012-09-09 21:13:30 +02:00
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************************************************************************************/
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/* How many SPI modules does this chip support? Most support 2 SPI modules (others
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* may support more -- in such case, the following must be expanded).
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*/
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#if STM32_NSPI < 1
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# undef CONFIG_STM32_SPI1
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# undef CONFIG_STM32_SPI2
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#elif STM32_NSPI < 2
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# undef CONFIG_STM32_SPI2
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#endif
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/* There is only CAN1 on the M3 Wildfire board */
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#if defined(CONFIG_STM32_CAN2)
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# warning "The M3 Wildfire only supports CAN1"
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#endif
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2016-02-02 21:22:54 +01:00
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/* Do we need to register I2C drivers on behalf of the I2C tool? */
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#define HAVE_I2CTOOL 1
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#if !defined(CONFIG_SYSTEM_I2CTOOL) || !defined(CONFIG_I2C_DRIVER)
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# undef HAVE_I2CTOOL
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#endif
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2012-09-09 21:13:30 +02:00
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/* M3 Wildfire GPIOs ****************************************************************/
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/* Camera
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*
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* --- ------ -------------- -------------------------------------------------------------------
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* PIN NAME SIGNAL NOTES
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* --- ------ -------------- -------------------------------------------------------------------
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*
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* 23 PA0 PA0-C-VSYNC Camera (P9)
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* 67 PA8 PA8-C-XCLK Camera (P9)
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* 91 PB5 PB5-C-WRST Camera (P9)
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* 95 PB8 PB8-C-DO_0 Camera (P9)
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* 96 PB9 PB9-C-DO_1 Camera (P9)
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* 47 PB10 PB10-C-DO_2 Camera (P9)
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* 48 PB11 PB11-C-DO_3 Camera (P9)
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* 51 PB12 PB12-C-DO_4 Camera (P9)
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* 52 PB13 PB13-C-DO_5 Camera (P9)
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* 53 PB14 PB14-C-DO_6 Camera (P9)
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* 54 PB15 PB15-C-DO_7 Camera (P9)
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* 63 PC6 PC6-C-SIO_C Camera (P9)
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* 64 PC7 PC7-C-SIO_D Camera (P9)
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* 84 PD3 PD3-C-WEN Camera (P9)
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* 87 PD6 PD6-C-OE Camera (P9)
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* 59 PD12 C-LED_EN Camera (P9)
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* 97 PE0 PE0-C-RRST Camera (P9)
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* 1 PE2 PE2-C-RCLK Camera (P9)
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*/
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/* Bell
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*
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* --- ------ -------------- -------------------------------------------------------------------
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* PIN NAME SIGNAL NOTES
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* --- ------ -------------- -------------------------------------------------------------------
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*
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* 3 PE4 PE4-BEEP LS1 Bell
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*/
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/* 2.4" TFT + Touchscreen
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*
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* --- ------ -------------- -------------------------------------------------------------------
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* PIN NAME SIGNAL NOTES
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* --- ------ -------------- -------------------------------------------------------------------
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*
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* 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
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* 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
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* 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
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* 92 PB6 PB6-I2C1-SCL 2.4" TFT + Touchscreen, AT24C02
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* 93 PB7 PB7-I2C1-SDA 2.4" TFT + Touchscreen, AT24C02
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* 81 PD0 PD0-FSMC_D2 2.4" TFT + Touchscreen
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* 82 PD1 PD1-FSMC_D3 2.4" TFT + Touchscreen
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* 85 PD4 PD4-FSMC_NOE 2.4" TFT + Touchscreen
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* 86 PD5 PD5-FSMC_NWE 2.4" TFT + Touchscreen
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* 88 PD7 PD7-FSMC_NE1 2.4" TFT + Touchscreen
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* 55 PD8 PD8-FSMC_D13 2.4" TFT + Touchscreen
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* 56 PD9 PD9-FSMC_D14 2.4" TFT + Touchscreen
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* 57 PD10 PD10-FSMC_D15 2.4" TFT + Touchscreen
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* 58 PD11 PD11-FSMC_A16 2.4" TFT + Touchscreen
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* 60 PD13 PD13-LCD/LIGHT 2.4" TFT + Touchscreen
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* 61 PD14 PD14-FSMC_D0 2.4" TFT + Touchscreen
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* 62 PD15 PD15-FSMC_D1 2.4" TFT + Touchscreen
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* 98 PE1 PE1-FSMC_NBL1 2.4" TFT + Touchscreen
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* 38 PE7 PE7-FSMC_D4 2.4" TFT + Touchscreen
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* 39 PE8 PE8-FSMC_D5 2.4" TFT + Touchscreen
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* 40 PE9 PE9-FSMC_D6 2.4" TFT + Touchscreen
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* 41 PE10 PE10-FSMC_D7 2.4" TFT + Touchscreen
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* 42 PE11 PE11-FSMC_D8 2.4" TFT + Touchscreen
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* 43 PE12 PE12-FSMC_D9 2.4" TFT + Touchscreen
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* 44 PE13 PE13-FSMC_D10 2.4" TFT + Touchscreen
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* 45 PE14 PE14-FSMC_D11 2.4" TFT + Touchscreen
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* 46 PE15 PE15-FSMC_D12 2.4" TFT + Touchscreen
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*/
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#define GPIO_LCD_BACKLIGHT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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2012-09-10 18:48:45 +02:00
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GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN13)
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/* GPIO_LCD_CS - Is there some kind of chip select for SPI1? */
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2012-09-09 21:13:30 +02:00
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/* LEDs
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*
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* --- ------ -------------- -------------------------------------------------------------------
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* PIN NAME SIGNAL NOTES
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* --- ------ -------------- -------------------------------------------------------------------
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*
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* 18 PC3 PC3-LED1 LED1, Active low (pulled high)
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* 33 PC4 PC4-LED2 LED2, Active low (pulled high)
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* 34 PC5 PC5-LED3 LED3, Active low (pulled high)
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*/
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#define GPIO_LED1 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN3)
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#define GPIO_LED2 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN4)
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#define GPIO_LED3 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN5)
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/* Buttons
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*
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* --- ------ -------------- -------------------------------------------------------------------
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* PIN NAME SIGNAL NOTES
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* --- ------ -------------- -------------------------------------------------------------------
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*
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2012-09-21 19:32:30 +02:00
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* 35 PB0 PB0-KEY1 KEY1, Low when closed (pulled high if open) (v2)
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* 35 PE5 PB0 KEY1, Low when closed (pulled high if open) (v3)
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2012-09-09 21:13:30 +02:00
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* 36 PB1 PB1-KEY2 KEY2, Low when closed (pulled high if open)
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*/
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#define MIN_IRQBUTTON BUTTON_KEY1
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#define MAX_IRQBUTTON BUTTON_KEY2
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#define NUM_IRQBUTTONS (MAX_IRQBUTTON - MIN_IRQBUTTON + 1)
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2012-09-21 19:32:30 +02:00
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#ifdef CONFIG_ARCH_BOARD_FIRE_STM32V3
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# define GPIO_BTN_KEY1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\
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GPIO_EXTI|GPIO_PORTE|GPIO_PIN5)
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#else
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# define GPIO_BTN_KEY1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\
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2012-09-10 18:48:45 +02:00
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GPIO_EXTI|GPIO_PORTB|GPIO_PIN0)
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2012-09-21 19:32:30 +02:00
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#endif
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2012-09-09 21:13:30 +02:00
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#define GPIO_BTN_KEY2 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\
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2012-09-10 18:48:45 +02:00
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GPIO_EXTI|GPIO_PORTB|GPIO_PIN1)
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/* 2MBit SPI FLASH
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*
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* --- ------ -------------- -------------------------------------------------------------------
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* PIN NAME SIGNAL NOTES
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* --- ------ -------------- -------------------------------------------------------------------
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*
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* 29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH
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* 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
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* 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
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* 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
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*/
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2012-09-11 18:50:16 +02:00
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#ifndef CONFIG_ENC28J60
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2012-09-12 16:07:13 +02:00
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# define GPIO_FLASH_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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2012-09-10 18:48:45 +02:00
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GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
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#endif
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/* ENC28J60
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*
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* --- ------ -------------- -------------------------------------------------------------------
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* PIN NAME SIGNAL NOTES
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* --- ------ -------------- -------------------------------------------------------------------
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*
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* 29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH
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* 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
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* 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
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* 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
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* 98 PE1 PE1-FSMC_NBL1 2.4" TFT + Touchscreen, 10Mbit EN28J60 Reset
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2012-09-21 19:32:30 +02:00
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* 4 PE5 (no name) 10Mbps ENC28J60 Interrupt (v2)
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* 4 PE4 PE4 10Mbps ENC28J60 Interrupt (v3)
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2012-09-10 18:48:45 +02:00
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*/
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2012-09-11 18:50:16 +02:00
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#if defined(CONFIG_STM32_FSMC) && defined(CONFIG_ENC28J60)
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2012-09-10 18:48:45 +02:00
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# warning "TFT LCD and ENCJ2860 shared PE1"
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#endif
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2012-09-17 20:35:37 +02:00
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/* CS and Reset are active low. Initial states are not selected and in
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* reset. The ENC28J60 is taken out of reset when the driver is
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* initialized (thedriver does a soft reset too).
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2012-09-12 16:07:13 +02:00
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*/
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2012-09-11 18:50:16 +02:00
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#ifdef CONFIG_ENC28J60
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2012-09-10 18:48:45 +02:00
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# define GPIO_ENC28J60_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
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# define GPIO_ENC28J60_RESET (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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2012-09-17 20:35:37 +02:00
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GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN1)
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2012-09-21 19:32:30 +02:00
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#ifdef CONFIG_ARCH_BOARD_FIRE_STM32V3
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# define GPIO_ENC28J60_INTR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\
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GPIO_EXTI|GPIO_PORTE|GPIO_PIN4)
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#else /* CONFIG_ARCH_BOARD_FIRE_STM32V2 */
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2012-09-10 18:48:45 +02:00
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# define GPIO_ENC28J60_INTR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|\
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GPIO_EXTI|GPIO_PORTE|GPIO_PIN5)
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#endif
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2012-09-21 19:32:30 +02:00
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#endif
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2012-09-10 18:48:45 +02:00
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/* MP3
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*
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* --- ------ -------------- -------------------------------------------------------------------
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* PIN NAME SIGNAL NOTES
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* --- ------ -------------- -------------------------------------------------------------------
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*
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* 48 PB11 PB11-MP3-RST MP3
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* 51 PB12 PB12-SPI2-NSS MP3
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* 52 PB13 PB13-SPI2-SCK MP3
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* 53 PB14 PB14-SPI2-MISO MP3
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* 54 PB15 PB15-SPI2-MOSI MP3
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* 63 PC6 PC6-MP3-XDCS MP3
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* 64 PC7 PC7-MP3-DREQ MP3
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*/
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#define GPIO_MP3_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN6)
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2012-09-09 21:13:30 +02:00
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public data
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************************************************************************************/
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#ifndef __ASSEMBLY__
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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2016-01-26 19:21:39 +01:00
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* Name: stm32_spidev_initialize
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2012-09-09 21:13:30 +02:00
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*
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* Description:
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* Called to configure SPI chip select GPIO pins for the M3 Wildfire board.
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*
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************************************************************************************/
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2016-01-26 19:21:39 +01:00
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void weak_function stm32_spidev_initialize(void);
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2012-09-09 21:13:30 +02:00
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/************************************************************************************
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* Name: stm32_usbinitialize
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*
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* Description:
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* Called to setup USB-related GPIO pins for the M3 Wildfire board.
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*
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************************************************************************************/
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void weak_function stm32_usbinitialize(void);
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/************************************************************************************
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* Name: stm32_selectlcd
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*
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* Description:
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* Initialize to the LCD
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*
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************************************************************************************/
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#ifdef CONFIG_STM32_FSMC
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void stm32_selectlcd(void);
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#endif
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2012-09-10 22:00:04 +02:00
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/****************************************************************************
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* Name: stm32_sdinitialize
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*
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* Description:
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* Initialize the SPI-based SD card. Requires CONFIG_DISABLE_MOUNTPOINT=n
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2012-09-12 17:18:56 +02:00
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* and CONFIG_STM32_SDIO=y
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2012-09-10 22:00:04 +02:00
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*
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****************************************************************************/
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int stm32_sdinitialize(int minor);
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2012-09-17 20:35:37 +02:00
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/****************************************************************************
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* Name: stm32_w25initialize
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*
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* Description:
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* Initialize and register the W25 FLASH file system.
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*
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****************************************************************************/
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#ifdef CONFIG_MTD_W25
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int stm32_w25initialize(int minor);
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#endif
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2012-09-09 21:13:30 +02:00
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#endif /* __ASSEMBLY__ */
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2015-12-29 22:44:56 +01:00
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#endif /* __CONFIGS_FIRE_STM32V2_SRC_FIRE_H */
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2012-09-09 21:13:30 +02:00
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