2021-10-13 15:15:04 +02:00
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/****************************************************************************
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* arch/arm/src/armv7-r/arm_tcbinfo.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifdef CONFIG_DEBUG_TCBINFO
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#include <nuttx/sched.h>
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#include <arch/irq.h>
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/****************************************************************************
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2021-12-27 04:09:38 +01:00
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* Private Data
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2021-10-13 15:15:04 +02:00
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****************************************************************************/
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2021-12-27 04:09:38 +01:00
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static const uint16_t g_reg_offs[] =
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2021-10-13 15:15:04 +02:00
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{
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TCB_REG_OFF(REG_R0),
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TCB_REG_OFF(REG_R1),
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TCB_REG_OFF(REG_R2),
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TCB_REG_OFF(REG_R3),
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TCB_REG_OFF(REG_R4),
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TCB_REG_OFF(REG_R5),
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TCB_REG_OFF(REG_R6),
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TCB_REG_OFF(REG_R7),
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TCB_REG_OFF(REG_R8),
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TCB_REG_OFF(REG_R9),
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TCB_REG_OFF(REG_R10),
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TCB_REG_OFF(REG_R11),
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TCB_REG_OFF(REG_R12),
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TCB_REG_OFF(REG_R13),
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TCB_REG_OFF(REG_R14),
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TCB_REG_OFF(REG_R15),
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TCB_REG_OFF(REG_CPSR),
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#ifdef CONFIG_ARCH_FPU
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TCB_REG_OFF(REG_D0),
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TCB_REG_OFF(REG_D1),
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TCB_REG_OFF(REG_D2),
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TCB_REG_OFF(REG_D3),
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TCB_REG_OFF(REG_D4),
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TCB_REG_OFF(REG_D5),
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TCB_REG_OFF(REG_D6),
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TCB_REG_OFF(REG_D7),
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TCB_REG_OFF(REG_D8),
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TCB_REG_OFF(REG_D9),
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TCB_REG_OFF(REG_D10),
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TCB_REG_OFF(REG_D11),
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TCB_REG_OFF(REG_D12),
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TCB_REG_OFF(REG_D13),
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TCB_REG_OFF(REG_D14),
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TCB_REG_OFF(REG_D15),
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#endif
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#ifdef CONFIG_ARM_HAVE_FPU_D32
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TCB_REG_OFF(REG_D16),
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TCB_REG_OFF(REG_D17),
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TCB_REG_OFF(REG_D18),
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TCB_REG_OFF(REG_D19),
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TCB_REG_OFF(REG_D20),
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TCB_REG_OFF(REG_D21),
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TCB_REG_OFF(REG_D22),
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TCB_REG_OFF(REG_D23),
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TCB_REG_OFF(REG_D24),
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TCB_REG_OFF(REG_D25),
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TCB_REG_OFF(REG_D26),
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TCB_REG_OFF(REG_D27),
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TCB_REG_OFF(REG_D28),
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TCB_REG_OFF(REG_D29),
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TCB_REG_OFF(REG_D30),
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TCB_REG_OFF(REG_D31),
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#endif
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#ifdef CONFIG_ARCH_FPU
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TCB_REG_OFF(REG_FPSCR),
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#endif
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};
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2021-12-27 04:09:38 +01:00
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/****************************************************************************
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* Public Data
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****************************************************************************/
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const struct tcbinfo_s g_tcbinfo =
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{
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TCB_PID_OFF,
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TCB_STATE_OFF,
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TCB_PRI_OFF,
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TCB_NAME_OFF,
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XCPTCONTEXT_REGS,
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{
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.p = g_reg_offs,
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},
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};
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2021-10-13 15:15:04 +02:00
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#endif
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2021-12-02 06:18:54 +01:00
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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