2009-09-21 15:53:48 +02:00
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############################################################################
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# arch/arm/src/stm32/Make.defs
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#
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2015-02-04 13:49:05 +01:00
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# Copyright (C) 2009, 2011-2015 Gregory Nutt. All rights reserved.
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2011-12-21 16:50:06 +01:00
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# Author: Gregory Nutt <gnutt@nuttx.org>
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2009-09-21 15:53:48 +02:00
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# 3. Neither the name NuttX nor the names of its contributors may be
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# used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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############################################################################
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2012-02-22 19:14:18 +01:00
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ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
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2014-04-12 17:33:52 +02:00
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HEAD_ASRC =
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2012-02-22 19:14:18 +01:00
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else
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2013-02-08 01:17:54 +01:00
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HEAD_ASRC = stm32_vectors.S
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2012-02-22 19:14:18 +01:00
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endif
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2009-09-21 15:53:48 +02:00
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2013-03-23 15:46:02 +01:00
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CMN_UASRCS =
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CMN_UCSRCS =
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2013-02-08 01:17:54 +01:00
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CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
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2016-02-09 20:44:22 +01:00
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CMN_ASRCS += up_testset.S vfork.S
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2013-02-08 01:17:54 +01:00
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2013-07-24 01:52:06 +02:00
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CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c
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2013-02-08 01:17:54 +01:00
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CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
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CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
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CMN_CSRCS += up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
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CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
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2014-09-01 23:39:34 +02:00
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CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
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CMN_CSRCS += up_systemreset.c up_unblocktask.c up_usestack.c up_doirq.c
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CMN_CSRCS += up_hardfault.c up_svcall.c up_vfork.c
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2009-09-21 15:53:48 +02:00
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2015-04-12 14:26:50 +02:00
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ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
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CMN_CSRCS += up_stackcheck.c
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endif
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2012-02-22 19:14:18 +01:00
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ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
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2015-03-11 19:30:14 +01:00
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ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
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2015-03-06 15:26:43 +01:00
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CMN_ASRCS += up_lazyexception.S
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else
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2013-02-08 01:17:54 +01:00
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CMN_ASRCS += up_exception.S
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2015-03-06 15:26:43 +01:00
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endif
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2013-02-08 01:17:54 +01:00
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CMN_CSRCS += up_vectors.c
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2012-02-22 19:14:18 +01:00
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endif
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2013-03-18 22:10:08 +01:00
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ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
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CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
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endif
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2012-10-20 20:56:55 +02:00
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ifeq ($(CONFIG_ARCH_MEMCPY),y)
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2013-02-08 01:17:54 +01:00
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CMN_ASRCS += up_memcpy.S
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2012-10-20 20:56:55 +02:00
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endif
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2014-08-29 22:47:22 +02:00
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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2014-09-01 23:39:34 +02:00
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CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
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2013-03-22 15:49:21 +01:00
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ifneq ($(CONFIG_DISABLE_SIGNALS),y)
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2013-03-23 15:46:02 +01:00
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CMN_CSRCS += up_signal_dispatch.c
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CMN_UASRCS += up_signal_handler.S
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2013-03-22 15:49:21 +01:00
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endif
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endif
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2015-01-24 13:03:39 +01:00
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ifeq ($(CONFIG_STACK_COLORATION),y)
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CMN_CSRCS += up_checkstack.c
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endif
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2012-10-26 21:53:20 +02:00
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ifeq ($(CONFIG_ELF),y)
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CMN_CSRCS += up_elf.c
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2015-12-12 16:35:05 +01:00
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else ifeq ($(CONFIG_MODULE),y)
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CMN_CSRCS += up_elf.c
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2012-10-26 21:53:20 +02:00
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endif
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2011-12-07 19:58:21 +01:00
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ifeq ($(CONFIG_ARCH_FPU),y)
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2013-02-08 01:17:54 +01:00
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CMN_ASRCS += up_fpu.S
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2013-07-24 01:52:06 +02:00
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ifneq ($(CONFIG_ARMV7M_CMNVECTOR),y)
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CMN_CSRCS += up_copyarmstate.c
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2015-08-31 16:40:02 +02:00
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else ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
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CMN_CSRCS += up_copyarmstate.c
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2013-07-24 01:52:06 +02:00
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endif
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2011-12-07 19:58:21 +01:00
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endif
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2015-09-23 22:51:22 +02:00
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ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)
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CMN_CSRCS += up_itm_syslog.c
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endif
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2014-04-12 17:33:52 +02:00
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CHIP_ASRCS =
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS = stm32_allocateheap.c stm32_start.c stm32_rcc.c stm32_lse.c
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2016-06-04 15:22:45 +02:00
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CHIP_CSRCS += stm32_lsi.c stm32_gpio.c stm32_exti_gpio.c stm32_flash.c
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2016-06-04 19:29:27 +02:00
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CHIP_CSRCS += stm32_irq.c stm32_dma.c stm32_lowputc.c stm32_getc.c
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2016-06-04 15:22:45 +02:00
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CHIP_CSRCS += stm32_serial.c stm32_spi.c stm32_sdio.c stm32_tim.c
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CHIP_CSRCS += stm32_waste.c stm32_ccm.c stm32_uid.c stm32_capture.c
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2014-08-07 00:26:01 +02:00
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2015-11-17 22:57:02 +01:00
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ifeq ($(CONFIG_TIMER),y)
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CHIP_CSRCS += stm32_tim_lowerhalf.c
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endif
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2014-08-07 00:26:01 +02:00
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ifneq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += stm32_timerisr.c
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endif
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2013-02-08 01:17:54 +01:00
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ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
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CHIP_ASRCS += stm32_vectors.S
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endif
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2012-04-03 00:20:39 +02:00
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2014-08-29 22:47:22 +02:00
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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2013-03-22 15:49:21 +01:00
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CHIP_CSRCS += stm32_userspace.c stm32_mpuinit.c
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endif
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2014-07-03 16:50:24 +02:00
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ifeq ($(CONFIG_STM32_CCM_PROCFS),y)
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CHIP_CSRCS += stm32_procfs_ccm.c
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endif
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2014-05-14 15:48:47 +02:00
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ifeq ($(CONFIG_STM32_I2C_ALT),y)
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CHIP_CSRCS += stm32_i2c_alt.c
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else
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2013-07-30 18:35:17 +02:00
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ifeq ($(CONFIG_STM32_STM32F30XX),y)
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2013-08-13 15:48:18 +02:00
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CHIP_CSRCS += stm32f30xxx_i2c.c
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2013-07-30 18:35:17 +02:00
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else
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CHIP_CSRCS += stm32_i2c.c
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endif
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2014-05-14 15:48:47 +02:00
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endif
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2013-07-30 18:35:17 +02:00
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2012-04-03 00:20:39 +02:00
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ifeq ($(CONFIG_USBDEV),y)
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ifeq ($(CONFIG_STM32_USB),y)
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_usbdev.c
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2012-04-03 00:20:39 +02:00
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endif
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ifeq ($(CONFIG_STM32_OTGFS),y)
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_otgfsdev.c
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2012-08-15 19:58:54 +02:00
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endif
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2014-11-20 14:19:04 +01:00
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ifeq ($(CONFIG_STM32_OTGHS),y)
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CHIP_CSRCS += stm32_otghsdev.c
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endif
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2012-08-15 19:58:54 +02:00
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endif
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ifeq ($(CONFIG_USBHOST),y)
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ifeq ($(CONFIG_STM32_OTGFS),y)
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_otgfshost.c
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2013-11-10 14:23:06 +01:00
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endif
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2014-10-07 23:05:30 +02:00
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ifeq ($(CONFIG_STM32_OTGHS),y)
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CHIP_CSRCS += stm32_otghshost.c
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2012-04-03 00:20:39 +02:00
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endif
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2012-02-22 19:14:18 +01:00
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endif
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2014-04-12 16:44:22 +02:00
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ifeq ($(CONFIG_USBHOST),y)
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ifeq ($(CONFIG_USBHOST_TRACE),y)
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CHIP_CSRCS += stm32_usbhost.c
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else
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ifeq ($(CONFIG_DEBUG_USB),y)
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CHIP_CSRCS += stm32_usbhost.c
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endif
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endif
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endif
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2014-03-04 15:58:01 +01:00
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_idle.c
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2011-12-08 19:02:38 +01:00
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endif
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_pmstop.c stm32_pmstandby.c stm32_pmsleep.c
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2012-06-28 02:48:00 +02:00
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2014-03-04 15:58:01 +01:00
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ifneq ($(CONFIG_ARCH_CUSTOM_PMINIT),y)
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_pminitialize.c
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2012-03-14 20:37:28 +01:00
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endif
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2012-01-08 22:33:57 +01:00
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ifeq ($(CONFIG_STM32_ETHMAC),y)
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_eth.c
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2011-08-20 15:23:34 +02:00
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endif
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2011-10-07 19:21:16 +02:00
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2011-12-14 20:59:06 +01:00
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ifeq ($(CONFIG_STM32_PWR),y)
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2015-04-28 14:37:59 +02:00
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CHIP_CSRCS += stm32_pwr.c stm32_exti_pwr.c
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2011-12-14 20:59:06 +01:00
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endif
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2011-10-07 19:21:16 +02:00
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ifeq ($(CONFIG_RTC),y)
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_rtc.c
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2012-07-17 02:22:48 +02:00
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ifeq ($(CONFIG_RTC_ALARM),y)
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_exti_alarm.c
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2012-07-17 02:22:48 +02:00
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endif
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2015-02-13 19:56:58 +01:00
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ifeq ($(CONFIG_RTC_DRIVER),y)
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CHIP_CSRCS += stm32_rtc_lowerhalf.c
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endif
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2011-10-07 19:21:16 +02:00
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endif
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2011-11-22 21:07:42 +01:00
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2016-05-27 14:46:33 +02:00
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ifeq ($(CONFIG_STM32_ADC),y)
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_adc.c
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2011-12-12 02:04:53 +01:00
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endif
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2011-12-12 04:37:37 +01:00
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ifeq ($(CONFIG_DAC),y)
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_dac.c
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2011-12-12 04:37:37 +01:00
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endif
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2016-05-25 20:31:32 +02:00
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ifeq ($(CONFIG_STM32_1WIREDRIVER),y)
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CHIP_CSRCS += stm32_1wire.c
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endif
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2015-05-21 15:47:22 +02:00
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ifeq ($(CONFIG_STM32_RNG),y)
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_rng.c
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2012-09-29 22:34:25 +02:00
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endif
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2013-11-11 21:05:29 +01:00
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ifeq ($(CONFIG_STM32_LTDC),y)
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CHIP_CSRCS += stm32_ltdc.c
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endif
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2014-12-19 20:41:08 +01:00
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ifeq ($(CONFIG_STM32_DMA2D),y)
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CHIP_CSRCS += stm32_dma2d.c
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endif
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2011-12-16 20:29:41 +01:00
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ifeq ($(CONFIG_PWM),y)
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_pwm.c
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2011-12-16 20:29:41 +01:00
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endif
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2012-02-14 16:32:57 +01:00
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ifeq ($(CONFIG_QENCODER),y)
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_qencoder.c
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2012-02-14 16:32:57 +01:00
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endif
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2011-12-21 16:50:06 +01:00
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ifeq ($(CONFIG_CAN),y)
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_can.c
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2011-12-21 16:50:06 +01:00
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endif
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2012-04-15 18:42:09 +02:00
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ifeq ($(CONFIG_STM32_IWDG),y)
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_iwdg.c
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2012-04-15 18:42:09 +02:00
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endif
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ifeq ($(CONFIG_STM32_WWDG),y)
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_wwdg.c
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2012-04-15 03:11:54 +02:00
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endif
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2011-11-22 21:07:42 +01:00
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ifeq ($(CONFIG_DEBUG),y)
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2013-02-08 01:17:54 +01:00
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CHIP_CSRCS += stm32_dumpgpio.c
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2011-11-22 21:07:42 +01:00
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endif
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2015-02-04 13:49:05 +01:00
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2015-02-04 14:24:19 +01:00
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ifeq ($(CONFIG_STM32_AES),y)
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2015-02-04 13:49:05 +01:00
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CHIP_CSRCS += stm32_aes.c
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endif
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2015-02-21 22:15:51 +01:00
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ifeq ($(CONFIG_STM32_BBSRAM),y)
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CHIP_CSRCS += stm32_bbsram.c
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endif
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