140 lines
7.9 KiB
C
140 lines
7.9 KiB
C
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/****************************************************************************
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* arch/arm/src/lpc54xx/lpc54_reset.h
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_LPC54XX_LPC54_RESET_H
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#define __ARCH_ARM_SRC_LPC54XX_LPC54_RESET_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define lpc54_reset_peripheral0(m) \
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lpc54_reset(LPC54_SYSCON_PRESETCTRLSET0, LPC54_SYSCON_PRESETCTRLCLR0, \
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LPC54_SYSCON_PRESETCTRL0, (m))
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#define lpc54_reset_peripheral1(m) \
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lpc54_reset(LPC54_SYSCON_PRESETCTRLSET1, LPC54_SYSCON_PRESETCTRLCLR1, \
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LPC54_SYSCON_PRESETCTRL1, (m))
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#define lpc54_reset_peripheral2(m) \
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lpc54_reset(LPC54_SYSCON_PRESETCTRLSET2, LPC54_SYSCON_PRESETCTRLCLR2, \
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LPC54_SYSCON_PRESETCTRL2, (m))
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#define lpc54_reset_async_peripheral(m) \
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lpc54_reset(LPC54_SYSCON_ASYNCPRESETCTRLSET, LPC54_SYSCON_ASYNCPRESETCTRLCLR, \
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LPC54_SYSCON_ASYNCPRESETCTRL, (m))
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#define lpc54_reset_flash() lpc54_reset_peripheral0(SYSCON_PRESETCTRL0_FLASH)
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#define lpc54_reset_fmc() lpc54_reset_peripheral0(SYSCON_PRESETCTRL0_FMC)
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#define lpc54_reset_eeprom() lpc54_reset_peripheral0(SYSCON_PRESETCTRL0_EEPROM)
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#define lpc54_reset_spifi() lpc54_reset_peripheral0(SYSCON_PRESETCTRL0_SPIFI)
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#define lpc54_reset_inputmux() lpc54_reset_peripheral0(SYSCON_PRESETCTRL0_INPUTMUX)
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#define lpc54_reset_iocon() lpc54_reset_peripheral0(SYSCON_PRESETCTRL0_IOCON)
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#define lpc54_reset_gpio0() lpc54_reset_peripheral0(SYSCON_PRESETCTRL0_GPIO0)
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#define lpc54_reset_gpio1() lpc54_reset_peripheral0(SYSCON_PRESETCTRL0_GPIO1)
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#define lpc54_reset_gpio2() lpc54_reset_peripheral0(SYSCON_PRESETCTRL0_GPIO2)
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#define lpc54_reset_gpio3() lpc54_reset_peripheral0(SYSCON_PRESETCTRL0_GPIO3)
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#define lpc54_reset_pint() lpc54_reset_peripheral0(SYSCON_PRESETCTRL0_PINT)
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#define lpc54_reset_gint() lpc54_reset_peripheral0(SYSCON_PRESETCTRL0_GINT)
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#define lpc54_reset_dma() lpc54_reset_peripheral0(SYSCON_PRESETCTRL0_DMA)
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#define lpc54_reset_crc() lpc54_reset_peripheral0(SYSCON_PRESETCTRL0_CRC)
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#define lpc54_reset_wwdt() lpc54_reset_peripheral0(SYSCON_PRESETCTRL0_WWDT)
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#define lpc54_reset_rtc() lpc54_reset_peripheral0(SYSCON_PRESETCTRL0_RTC)
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#define lpc54_reset_adc0() lpc54_reset_peripheral0(SYSCON_PRESETCTRL0_ADC0)
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#define lpc54_reset_mrt() lpc54_reset_peripheral1(SYSCON_PRESETCTRL1_MRT)
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#define lpc54_reset_sct0() lpc54_reset_peripheral1(SYSCON_PRESETCTRL1_SCT0)
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#define lpc54_reset_mcan0() lpc54_reset_peripheral1(SYSCON_PRESETCTRL1_MCAN0)
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#define lpc54_reset_mcan1() lpc54_reset_peripheral1SYSCON_PRESETCTRL1_MCAN1)
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#define lpc54_reset_utick() lpc54_reset_peripheral1(SYSCON_PRESETCTRL1_UTICK)
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#define lpc54_reset_flexcomm0() lpc54_reset_peripheral1(SYSCON_PRESETCTRL1_FLEXCOMM0)
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#define lpc54_reset_flexcomm1() lpc54_reset_peripheral1(SYSCON_PRESETCTRL1_FLEXCOMM1)
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#define lpc54_reset_flexcomm2() lpc54_reset_peripheral1(SYSCON_PRESETCTRL1_FLEXCOMM2)
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#define lpc54_reset_flexcomm3() lpc54_reset_peripheral1(SYSCON_PRESETCTRL1_FLEXCOMM3)
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#define lpc54_reset_flexcomm4() lpc54_reset_peripheral1(SYSCON_PRESETCTRL1_FLEXCOMM4)
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#define lpc54_reset_flexcomm5() lpc54_reset_peripheral1(SYSCON_PRESETCTRL1_FLEXCOMM5)
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#define lpc54_reset_flexcomm6() lpc54_reset_peripheral1(SYSCON_PRESETCTRL1_FLEXCOMM6)
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#define lpc54_reset_flexcomm7() lpc54_reset_peripheral1(SYSCON_PRESETCTRL1_FLEXCOMM7)
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#define lpc54_reset_dmic() lpc54_reset_peripheral1(SYSCON_PRESETCTRL1_DMIC)
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#define lpc54_reset_ctimer2() lpc54_reset_peripheral1(SYSCON_PRESETCTRL1_CTIMER2)
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#define lpc54_reset_usb0d() lpc54_reset_peripheral1(SYSCON_PRESETCTRL1_USB0D)
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#define lpc54_reset_ctimer0() lpc54_reset_peripheral1(SYSCON_PRESETCTRL1_CTIMER0)
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#define lpc54_reset_ctimer1() lpc54_reset_peripheral1(SYSCON_PRESETCTRL1_CTIMER1)
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#define lpc54_reset_lcd() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_LCD)
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#define lpc54_reset_sdio() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_SDIO)
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#define lpc54_reset_usb1h() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_USB1H)
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#define lpc54_reset_usb1d() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_USB1D)
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#define lpc54_reset_usb1ram() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_USB1RAM)
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#define lpc54_reset_emc() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_EMC)
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#define lpc54_reset_eth() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_ETH)
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#define lpc54_reset_gpio4() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_GPIO4)
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#define lpc54_reset_gpio5() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_GPIO5)
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#define lpc54_reset_otp() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_OTP)
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#define lpc54_reset_rng() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_RNG)
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#define lpc54_reset_flexcomm8() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_FLEXCOMM8)
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#define lpc54_reset_flexcomm9() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_FLEXCOMM9)
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#define lpc54_reset_usb0hmr() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_USB0HMR)
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#define lpc54_reset_usb0hsl() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_USB0HSL)
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#define lpc54_reset_sha() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_SHA)
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#define lpc54_reset_sc0() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_SC0)
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#define lpc54_reset_sc1() lpc54_reset_peripheral2(SYSCON_PRESETCTRL2_SC1)
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#define lpc54_reset_ctimer3() lpc54_reset_async_peripheral(SYSCON_ASYNCPRESET_CTIMER3)
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#define lpc54_reset_ctimer4() lpc54_reset_async_peripheral(SYSCON_ASYNCPRESET_CTIMER4)
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: lpc54_reset
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*
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* Description:
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* Reset the selected peripheral
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*
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****************************************************************************/
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void lpc54_reset(uintptr_t setreg, uintptr_t clrreg,
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uintptr_t statreg, uint32_t mask);
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#endif /* __ARCH_ARM_SRC_LPC54XX_LPC54_RESET_H */
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