2014-10-19 00:16:22 +02:00
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/****************************************************************************
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* arch/arm/src/efm32/efm32_lowputc.c
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*
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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2014-10-20 00:42:15 +02:00
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#include <stdbool.h>
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2014-10-20 16:11:42 +02:00
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#include <assert.h>
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2014-10-19 00:16:22 +02:00
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2014-10-20 00:42:15 +02:00
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#include <arch/board/board.h>
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2020-05-01 03:20:29 +02:00
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#include "arm_arch.h"
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2014-10-20 00:42:15 +02:00
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2019-05-25 02:51:49 +02:00
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#include "hardware/efm32_memorymap.h"
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#include "hardware/efm32_usart.h"
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#include "hardware/efm32_leuart.h"
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#include "hardware/efm32_cmu.h"
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2014-10-28 21:50:15 +01:00
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#include "efm32_gpio.h"
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2014-10-19 00:16:22 +02:00
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#include "efm32_lowputc.h"
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2014-10-20 00:42:15 +02:00
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Console U[S]ART base address */
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2014-10-21 16:48:38 +02:00
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#if defined(HAVE_UART_CONSOLE)
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2014-10-20 00:42:15 +02:00
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# if defined(CONFIG_USART0_SERIAL_CONSOLE)
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# define CONSOLE_BASE EFM32_USART0_BASE
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# define CONSOLE_BAUD CONFIG_USART0_BAUD
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# define CONSOLE_PARITY CONFIG_USART0_PARITY
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# define CONSOLE_NBITS CONFIG_UART0_BITS
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# define CONSOLE_2STOP CONFIG_UART0_2STOP
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# elif defined(CONFIG_USART1_SERIAL_CONSOLE)
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# define CONSOLE_BASE EFM32_USART1_BASE
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# define CONSOLE_BAUD CONFIG_USART1_BAUD
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# define CONSOLE_PARITY CONFIG_USART1_PARITY
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# define CONSOLE_NBITS CONFIG_UART1_BITS
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# define CONSOLE_2STOP CONFIG_UART1_2STOP
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# elif defined(CONFIG_USART2_SERIAL_CONSOLE)
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# define CONSOLE_BASE EFM32_USART2_BASE
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# define CONSOLE_BAUD CONFIG_USART2_BAUD
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# define CONSOLE_PARITY CONFIG_USART2_PARITY
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# define CONSOLE_NBITS CONFIG_UART2_BITS
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# define CONSOLE_2STOP CONFIG_UART2_2STOP
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# elif defined(CONFIG_UART0_SERIAL_CONSOLE)
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# define CONSOLE_BASE EFM32_UART0_BASE
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# define CONSOLE_BAUD CONFIG_UART0_BAUD
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# define CONSOLE_PARITY CONFIG_UART0_PARITY
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# define CONSOLE_NBITS CONFIG_UART0_BITS
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# define CONSOLE_2STOP CONFIG_UART0_2STOP
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# elif defined(CONFIG_UART1_SERIAL_CONSOLE)
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# define CONSOLE_BASE EFM32_UART1_BASE
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# define CONSOLE_BAUD CONFIG_UART1_BAUD
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# define CONSOLE_PARITY CONFIG_UART1_PARITY
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# define CONSOLE_NBITS CONFIG_UART1_BITS
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# define CONSOLE_2STOP CONFIG_UART1_2STOP
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# else
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2014-10-21 16:48:38 +02:00
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# error No U[S]ART console is selected???? Internal craziness!!!
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2014-10-20 00:42:15 +02:00
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# endif
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2014-10-21 16:48:38 +02:00
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#elif defined(HAVE_LEUART_CONSOLE)
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# if defined(CONFIG_LEUART0_SERIAL_CONSOLE)
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# define CONSOLE_BASE EFM32_LEUART0_BASE
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# define CONSOLE_BAUD CONFIG_LEUART0_BAUD
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# define CONSOLE_PARITY CONFIG_LEUART0_PARITY
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# define CONSOLE_NBITS CONFIG_LEUART0_BITS
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# define CONSOLE_2STOP CONFIG_LEUART0_2STOP
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# elif defined(CONFIG_LEUART1_SERIAL_CONSOLE)
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# define CONSOLE_BASE EFM32_LEUART1_BASE
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# define CONSOLE_BAUD CONFIG_LEUART1_BAUD
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# define CONSOLE_PARITY CONFIG_LEUART1_PARITY
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# define CONSOLE_NBITS CONFIG_LEUART1_BITS
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# define CONSOLE_2STOP CONFIG_LEUART1_2STOP
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# else
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# error No U[S]ART console is selected???? Internal craziness!!!
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# endif
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#endif /* HAVE_UART_CONSOLE */
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2014-10-20 00:42:15 +02:00
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2014-10-20 16:11:42 +02:00
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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2014-10-21 16:48:38 +02:00
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* Name: efm32_uart_setbaud
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2014-10-20 16:11:42 +02:00
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*
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* Description:
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* Set optimal oversampling and set the baud for this U[S]ART.
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*
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****************************************************************************/
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#ifdef HAVE_UART_DEVICE
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2014-10-21 16:48:38 +02:00
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static void efm32_uart_setbaud(uintptr_t base, uint32_t baud)
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2014-10-20 16:11:42 +02:00
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{
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uint64_t clkdiv;
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2014-10-20 20:29:28 +02:00
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uint64_t maxover;
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2014-10-20 16:11:42 +02:00
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uint32_t oversample;
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uint32_t regval;
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uint32_t ovs;
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2014-10-20 18:54:13 +02:00
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/* Select oversampling. We would like to oversample at the standard value
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* of 16, but we may not be able to achieve the baud with sufficient
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* accuracy if the baud is close to the HFPERCLK frequency.
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*
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* USART baud is generated according to:
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*
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* baud = fHFPERCLK/(oversample * (1 + CLKDIV/256))
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*
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* Or, equivalently:
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*
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2014-10-20 21:54:43 +02:00
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* CLKDIV = 256 * (fHFPERCLK / (oversample * baud) - 1)
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2014-10-20 18:54:13 +02:00
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* oversample = 256 * fHFPERCLK / (baud * (CLKDIV + 256))
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*
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* Suppose we insist on a CLKDIV >= 24, then:
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*
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2014-10-20 20:29:28 +02:00
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* MAXoversample = 256 * fHFPERCLK / (280 * baud))
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2014-10-20 18:54:13 +02:00
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*
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2014-10-20 21:54:43 +02:00
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* Example 1: fHPERCLK = 32MHz, baud=115200
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* MAXoversample = 254.0, Use oversample = 16
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* CLKDIV = 4188.4
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* baud = 115200.0
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* Example 2: fHPERCLK = 32.768KHz, baud=2400
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* MAXoversample = 12.5, Use oversample = 8
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* CLKDIV = 180.90
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* baud = 2400.0
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2014-10-20 18:54:13 +02:00
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*/
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2014-10-20 16:11:42 +02:00
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2014-10-29 02:02:21 +01:00
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maxover = (((uint64_t)BOARD_HFPERCLK_FREQUENCY << 8) / 280) / baud;
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2014-10-20 20:29:28 +02:00
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if (maxover >= 16)
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2014-10-20 16:11:42 +02:00
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{
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2014-10-20 18:54:13 +02:00
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DEBUGASSERT(baud <= (BOARD_HFPERCLK_FREQUENCY / 16));
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2014-10-20 16:11:42 +02:00
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oversample = 16;
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ovs = USART_CTRL_OVS_X16;
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}
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2014-10-20 20:29:28 +02:00
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else if (maxover >= 8)
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2014-10-20 16:11:42 +02:00
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{
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2014-10-20 18:54:13 +02:00
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DEBUGASSERT(baud <= (BOARD_HFPERCLK_FREQUENCY / 8));
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2014-10-20 16:11:42 +02:00
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oversample = 8;
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ovs = USART_CTRL_OVS_X8;
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}
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2014-10-20 20:29:28 +02:00
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else if (maxover >= 6)
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2014-10-20 16:11:42 +02:00
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{
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2014-10-20 18:54:13 +02:00
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DEBUGASSERT(baud <= (BOARD_HFPERCLK_FREQUENCY / 6));
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oversample = 6;
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ovs = USART_CTRL_OVS_X6;
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}
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2014-10-20 20:29:28 +02:00
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else /* if (maxover >= 4) */
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2014-10-20 18:54:13 +02:00
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{
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2014-10-20 20:29:28 +02:00
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DEBUGASSERT(maxover >= 4 && baud <= (BOARD_HFPERCLK_FREQUENCY / 4));
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2014-10-20 18:54:13 +02:00
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oversample = 4;
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ovs = USART_CTRL_OVS_X4;
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2014-10-20 16:11:42 +02:00
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}
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/* CLKDIV in asynchronous mode is given by:
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*
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2014-10-20 21:54:43 +02:00
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* CLKDIV = 256 * (fHFPERCLK / (oversample * baud) - 1)
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2014-10-20 18:54:13 +02:00
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*
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2014-10-20 16:11:42 +02:00
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* or
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2014-10-20 18:54:13 +02:00
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*
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2014-10-20 21:54:43 +02:00
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* CLKDIV = (256 * fHFPERCLK) / (oversample * baud) - 256
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2014-10-20 16:11:42 +02:00
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*/
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2014-10-20 21:54:43 +02:00
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clkdiv = ((uint64_t)BOARD_HFPERCLK_FREQUENCY << 8) / ((uint64_t)baud * oversample);
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if (clkdiv > 256)
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{
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clkdiv -= 256;
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}
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else
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{
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clkdiv = 0;
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}
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2014-10-20 16:11:42 +02:00
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2014-11-16 14:57:57 +01:00
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/* Set up the selected oversampling */
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2014-10-20 16:11:42 +02:00
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2014-10-28 19:36:47 +01:00
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regval = getreg32(base + EFM32_USART_CTRL_OFFSET);
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regval &= ~_USART_CTRL_OVS_MASK;
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regval |= ovs;
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2014-10-20 16:11:42 +02:00
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putreg32(regval, base + EFM32_USART_CTRL_OFFSET);
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2014-11-16 14:57:57 +01:00
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/* Set up the selected baud divisor. The computation above already took
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* in account of _USART_CLKDIV_DIV_SHIFT
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*/
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regval = (uint32_t)clkdiv & _USART_CLKDIV_MASK;
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2014-10-28 19:36:47 +01:00
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putreg32(regval, base + EFM32_USART_CLKDIV_OFFSET);
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2014-10-20 16:11:42 +02:00
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}
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#endif
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2014-10-21 16:48:38 +02:00
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/****************************************************************************
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* Name: efm32_leuart_setbaud
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*
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* Description:
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* Set optimal oversampling and set the baud for this U[S]ART.
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*
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****************************************************************************/
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#ifdef HAVE_LEUART_DEVICE
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static void efm32_leuart_setbaud(uintptr_t base, uint32_t baud)
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{
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uint32_t clkdiv;
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/* Baud is configured by:
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*
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* baud = fLEUART / (1 + CLKDIV / 256)
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*
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* Or
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*
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* CLKDIV = 256 * (fLEUART / baud - 1)
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* CLKDIV = (256 * fLEUART) / baud - 256
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*/
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clkdiv = (BOARD_LFBCLK_FREQUENCY << 8) / baud;
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if (clkdiv > 256)
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{
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clkdiv -= 256;
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}
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else
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{
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clkdiv = 0;
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}
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DEBUGASSERT(clkdiv <= _LEUART_CLKDIV_MASK);
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/* Set up the selected baud */
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putreg32((uint32_t)clkdiv & _LEUART_CLKDIV_DIV_MASK,
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base + EFM32_LEUART_CLKDIV_OFFSET);
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}
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#endif
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2014-10-19 00:16:22 +02:00
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: efm32_lowsetup
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*
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* Description:
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* Called at the very beginning of _start. Performs low level
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* initialization including setup of the console UART. This UART done
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* early so that the serial console is available for debugging very early
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* in the boot sequence.
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*
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****************************************************************************/
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void efm32_lowsetup(void)
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{
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2016-12-07 16:13:13 +01:00
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#if defined(HAVE_UART_DEVICE) || defined(HAVE_LEUART_DEVICE) || \
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defined(HAVE_SPI_DEVICE)
|
2014-10-20 00:42:15 +02:00
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uint32_t regval;
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2014-10-21 16:48:38 +02:00
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#endif
|
2014-10-20 00:42:15 +02:00
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2014-10-26 16:27:55 +01:00
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#if defined(HAVE_UART_DEVICE) || defined(HAVE_SPI_DEVICE)
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2014-10-21 16:48:38 +02:00
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/* Enable clocking to configured UART/USART interfaces */
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2014-10-20 00:42:15 +02:00
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regval = getreg32(EFM32_CMU_HFPERCLKEN0);
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regval &= ~(CMU_HFPERCLKEN0_USART0
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| CMU_HFPERCLKEN0_USART1
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#ifdef CONFIG_EFM32_HAVE_USART2
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| CMU_HFPERCLKEN0_USART2
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#endif
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#ifdef CONFIG_EFM32_HAVE_UART0
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| CMU_HFPERCLKEN0_UART0
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#endif
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#ifdef CONFIG_EFM32_HAVE_UART1
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| CMU_HFPERCLKEN0_UART1
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#endif
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);
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#ifdef CONFIG_EFM32_USART0
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regval |= CMU_HFPERCLKEN0_USART0;
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#endif
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#ifdef CONFIG_EFM32_USART1
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|
|
regval |= CMU_HFPERCLKEN0_USART1;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_USART2
|
|
|
|
regval |= CMU_HFPERCLKEN0_USART2;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_UART0
|
|
|
|
regval |= CMU_HFPERCLKEN0_UART0;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_UART1
|
|
|
|
regval |= CMU_HFPERCLKEN0_UART1;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
putreg32(regval, EFM32_CMU_HFPERCLKEN0);
|
2014-10-21 16:48:38 +02:00
|
|
|
#endif /* HAVE_UART_DEVICE */
|
|
|
|
|
|
|
|
#ifdef HAVE_LEUART_DEVICE
|
2014-10-29 18:20:54 +01:00
|
|
|
/* Enable the LE interface clock must be enabled in CMU_HFCORECLKEN0 */
|
|
|
|
|
|
|
|
regval = getreg32(EFM32_CMU_HFCORECLKEN0);
|
|
|
|
regval |= CMU_HFCORECLKEN0_LE;
|
|
|
|
putreg32(regval, EFM32_CMU_HFCORECLKEN0);
|
|
|
|
|
2014-10-21 16:48:38 +02:00
|
|
|
/* Enable clocking to configured LEUART interfaces */
|
|
|
|
|
2014-10-29 16:37:39 +01:00
|
|
|
regval = getreg32(EFM32_CMU_LFBCLKEN0);
|
2014-10-21 16:48:38 +02:00
|
|
|
regval &= ~(CMU_LFBCLKEN0_LEUART0
|
|
|
|
#ifdef CONFIG_EFM32_LEUART1
|
2014-10-21 19:38:51 +02:00
|
|
|
| CMU_LFBCLKEN0_LEUART1
|
2014-10-21 16:48:38 +02:00
|
|
|
#endif
|
|
|
|
);
|
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_LEUART0
|
|
|
|
regval |= CMU_LFBCLKEN0_LEUART0;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_LEUART1
|
|
|
|
regval |= CMU_LFBCLKEN0_LEUART1;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
putreg32(regval, EFM32_CMU_LFBCLKEN0);
|
|
|
|
#endif /* HAVE_LEUART_DEVICE */
|
2014-10-20 00:42:15 +02:00
|
|
|
|
2014-10-28 21:50:15 +01:00
|
|
|
#if defined(HAVE_UART_DEVICE) || defined(HAVE_SPI_DEVICE)
|
|
|
|
/* Enable output on U[S]ART output pins */
|
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_USART0
|
|
|
|
efm32_configgpio(GPIO_INPUT | GPIO_INT_NONE | BOARD_USART0_RX_GPIO);
|
|
|
|
efm32_configgpio(GPIO_OUTPUT_PUSHPULL | GPIO_OUTPUT_CLEAR |
|
|
|
|
GPIO_DRIVE_STANDARD | BOARD_USART0_TX_GPIO);
|
|
|
|
#ifdef CONFIG_EFM32_USART0_ISSPI
|
|
|
|
efm32_configgpio(GPIO_OUTPUT_PUSHPULL | GPIO_OUTPUT_CLEAR |
|
|
|
|
GPIO_DRIVE_STANDARD | BOARD_USART0_CLK_GPIO);
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_USART1
|
|
|
|
efm32_configgpio(GPIO_INPUT | GPIO_INT_NONE | BOARD_USART1_RX_GPIO);
|
|
|
|
efm32_configgpio(GPIO_OUTPUT_PUSHPULL | GPIO_OUTPUT_CLEAR |
|
|
|
|
GPIO_DRIVE_STANDARD | BOARD_USART1_TX_GPIO);
|
|
|
|
#ifdef CONFIG_EFM32_USART1_ISSPI
|
|
|
|
efm32_configgpio(GPIO_OUTPUT_PUSHPULL | GPIO_OUTPUT_CLEAR |
|
|
|
|
GPIO_DRIVE_STANDARD | BOARD_USART1_CLK_GPIO);
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_USART2
|
|
|
|
efm32_configgpio(GPIO_INPUT | GPIO_INT_NONE | BOARD_USART2_RX_GPIO);
|
|
|
|
efm32_configgpio(GPIO_OUTPUT_PUSHPULL | GPIO_OUTPUT_CLEAR |
|
|
|
|
GPIO_DRIVE_STANDARD | BOARD_USART2_TX_GPIO);
|
|
|
|
#ifdef CONFIG_EFM32_USART2_ISSPI
|
|
|
|
efm32_configgpio(GPIO_OUTPUT_PUSHPULL | GPIO_OUTPUT_CLEAR |
|
|
|
|
GPIO_DRIVE_STANDARD | BOARD_USART2_CLK_GPIO);
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_UART0
|
|
|
|
efm32_configgpio(GPIO_INPUT | GPIO_INT_NONE | BOARD_UART0_RX_GPIO);
|
|
|
|
efm32_configgpio(GPIO_OUTPUT_PUSHPULL | GPIO_OUTPUT_CLEAR |
|
|
|
|
GPIO_DRIVE_STANDARD | BOARD_UART0_TX_GPIO);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_UART1
|
|
|
|
efm32_configgpio(GPIO_INPUT | GPIO_INT_NONE | BOARD_UART1_RX_GPIO);
|
|
|
|
efm32_configgpio(GPIO_OUTPUT_PUSHPULL | GPIO_OUTPUT_CLEAR |
|
|
|
|
GPIO_DRIVE_STANDARD | BOARD_UART1_TX_GPIO);
|
|
|
|
#endif
|
|
|
|
#endif /* HAVE_UART_DEVICE */
|
|
|
|
|
|
|
|
#ifdef HAVE_LEUART_DEVICE
|
|
|
|
/* Enable output on LEUART output pins */
|
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_LEUART0
|
|
|
|
efm32_configgpio(GPIO_INPUT | GPIO_INT_NONE | BOARD_LEUART0_RX_GPIO);
|
|
|
|
efm32_configgpio(GPIO_OUTPUT_PUSHPULL | GPIO_OUTPUT_CLEAR |
|
|
|
|
GPIO_DRIVE_STANDARD | BOARD_LEUART0_TX_GPIO);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_LEUART1
|
|
|
|
efm32_configgpio(GPIO_INPUT | GPIO_INT_NONE | BOARD_LEUART1_RX_GPIO);
|
|
|
|
efm32_configgpio(GPIO_OUTPUT_PUSHPULL | GPIO_OUTPUT_CLEAR |
|
|
|
|
GPIO_DRIVE_STANDARD | BOARD_LEUART1_TX_GPIO);
|
|
|
|
#endif
|
|
|
|
#endif /* HAVE_LEUART_DEVICE */
|
|
|
|
|
|
|
|
#if defined(HAVE_UART_DEVICE) || defined(HAVE_SPI_DEVICE)
|
|
|
|
/* Set location in the U[S]ART ROUTE registers */
|
2014-10-20 00:42:15 +02:00
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_USART0
|
|
|
|
regval = (USART_ROUTE_RXPEN | USART_ROUTE_TXPEN |
|
|
|
|
(BOARD_USART0_ROUTE_LOCATION << _USART_ROUTE_LOCATION_SHIFT));
|
2014-10-26 16:27:55 +01:00
|
|
|
#ifdef CONFIG_EFM32_USART0_ISSPI
|
|
|
|
regval |= USART_ROUTE_CLKPEN;
|
|
|
|
#endif
|
2014-10-20 00:42:15 +02:00
|
|
|
putreg32(regval, EFM32_USART0_ROUTE);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_USART1
|
|
|
|
regval = (USART_ROUTE_RXPEN | USART_ROUTE_TXPEN |
|
|
|
|
(BOARD_USART1_ROUTE_LOCATION << _USART_ROUTE_LOCATION_SHIFT));
|
2014-10-26 16:27:55 +01:00
|
|
|
#ifdef CONFIG_EFM32_USART1_ISSPI
|
|
|
|
regval |= USART_ROUTE_CLKPEN;
|
|
|
|
#endif
|
2014-10-20 00:42:15 +02:00
|
|
|
putreg32(regval, EFM32_USART1_ROUTE);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_USART2
|
|
|
|
regval = (USART_ROUTE_RXPEN | USART_ROUTE_TXPEN |
|
|
|
|
(BOARD_USART2_ROUTE_LOCATION << _USART_ROUTE_LOCATION_SHIFT));
|
2014-10-26 16:27:55 +01:00
|
|
|
#ifdef CONFIG_EFM32_USART2_ISSPI
|
|
|
|
regval |= USART_ROUTE_CLKPEN;
|
|
|
|
#endif
|
2014-10-20 00:42:15 +02:00
|
|
|
putreg32(regval, EFM32_USART2_ROUTE);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_UART0
|
|
|
|
regval = (USART_ROUTE_RXPEN | USART_ROUTE_TXPEN |
|
|
|
|
(BOARD_UART0_ROUTE_LOCATION << _USART_ROUTE_LOCATION_SHIFT));
|
|
|
|
putreg32(regval, EFM32_UART0_ROUTE);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_UART1
|
|
|
|
regval = (USART_ROUTE_RXPEN | USART_ROUTE_TXPEN |
|
|
|
|
(BOARD_UART1_ROUTE_LOCATION << _USART_ROUTE_LOCATION_SHIFT));
|
|
|
|
putreg32(regval, EFM32_UART1_ROUTE);
|
|
|
|
#endif
|
|
|
|
#endif /* HAVE_UART_DEVICE */
|
|
|
|
|
2014-10-21 16:48:38 +02:00
|
|
|
#ifdef HAVE_LEUART_DEVICE
|
2014-10-28 21:50:15 +01:00
|
|
|
/* Set location in the LEUART ROUTE registers */
|
|
|
|
|
|
|
|
#ifdef CONFIG_EFM32_LEUART0
|
2014-10-21 16:48:38 +02:00
|
|
|
regval = (LEUART_ROUTE_RXPEN | LEUART_ROUTE_TXPEN |
|
|
|
|
(BOARD_LEUART0_ROUTE_LOCATION << _LEUART_ROUTE_LOCATION_SHIFT));
|
|
|
|
putreg32(regval, EFM32_LEUART0_ROUTE);
|
2014-10-20 00:42:15 +02:00
|
|
|
#endif
|
|
|
|
|
2014-10-28 21:50:15 +01:00
|
|
|
#ifdef CONFIG_EFM32_LEUART1
|
2014-10-21 16:48:38 +02:00
|
|
|
regval = (LEUART_ROUTE_RXPEN | LEUART_ROUTE_TXPEN |
|
|
|
|
(BOARD_LEUART1_ROUTE_LOCATION << _LEUART_ROUTE_LOCATION_SHIFT));
|
|
|
|
putreg32(regval, EFM32_LEUART1_ROUTE);
|
2014-10-20 00:42:15 +02:00
|
|
|
#endif
|
2014-10-21 16:48:38 +02:00
|
|
|
#endif /* HAVE_LEUART_DEVICE */
|
2014-10-20 00:42:15 +02:00
|
|
|
|
2014-10-21 16:48:38 +02:00
|
|
|
#if defined(HAVE_UART_CONSOLE)
|
|
|
|
/* Configure the U[S]ART serial console */
|
2014-10-20 00:42:15 +02:00
|
|
|
|
|
|
|
efm32_uartconfigure(CONSOLE_BASE, CONSOLE_BAUD, CONSOLE_PARITY,
|
|
|
|
CONSOLE_NBITS, CONSOLE_2STOP);
|
2014-10-21 16:48:38 +02:00
|
|
|
|
|
|
|
#elif defined(HAVE_LEUART_CONSOLE)
|
|
|
|
/* Configure the LEUART serial console */
|
|
|
|
|
|
|
|
efm32_leuartconfigure(CONSOLE_BASE, CONSOLE_BAUD, CONSOLE_PARITY,
|
|
|
|
CONSOLE_NBITS, CONSOLE_2STOP);
|
|
|
|
|
2014-10-20 00:42:15 +02:00
|
|
|
#endif
|
2014-10-19 00:16:22 +02:00
|
|
|
}
|
|
|
|
|
2015-10-03 15:25:03 +02:00
|
|
|
/****************************************************************************
|
2014-10-19 00:16:22 +02:00
|
|
|
* Name: efm32_lowputc
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Output one character to the UART using a simple polling method.
|
|
|
|
*
|
2015-10-03 15:25:03 +02:00
|
|
|
****************************************************************************/
|
2014-10-19 00:16:22 +02:00
|
|
|
|
2014-10-21 16:48:38 +02:00
|
|
|
#if defined(HAVE_UART_CONSOLE)
|
2014-10-19 00:16:22 +02:00
|
|
|
void efm32_lowputc(uint32_t ch)
|
|
|
|
{
|
2014-10-20 02:55:44 +02:00
|
|
|
/* The TX Buffer Level (TXBL) status bit indicates the level of the
|
|
|
|
* transmit buffer. If TXBIL is set, TXBL is set whenever the transmit
|
|
|
|
* buffer is half-full or empty.
|
|
|
|
*/
|
|
|
|
|
|
|
|
while ((getreg32(CONSOLE_BASE + EFM32_USART_STATUS_OFFSET) & USART_STATUS_TXBL) == 0);
|
|
|
|
|
|
|
|
/* Then send the character */
|
|
|
|
|
|
|
|
putreg32((uint32_t)ch, CONSOLE_BASE + EFM32_USART_TXDATA_OFFSET);
|
2014-10-19 00:16:22 +02:00
|
|
|
}
|
2014-10-21 16:48:38 +02:00
|
|
|
|
|
|
|
#elif defined(HAVE_LEUART_CONSOLE)
|
|
|
|
void efm32_lowputc(uint32_t ch)
|
|
|
|
{
|
|
|
|
/* The TX Buffer Level (TXBL) status bit indicates the level of the
|
|
|
|
* transmit buffer. If TXBIL is set, TXBL is set whenever the transmit
|
|
|
|
* buffer is half-full or empty.
|
|
|
|
*/
|
|
|
|
|
|
|
|
while ((getreg32(CONSOLE_BASE + EFM32_LEUART_STATUS_OFFSET) & LEUART_STATUS_TXBL) == 0);
|
|
|
|
|
|
|
|
/* Then send the character */
|
|
|
|
|
|
|
|
putreg32((uint32_t)ch, CONSOLE_BASE + EFM32_LEUART_TXDATA_OFFSET);
|
|
|
|
}
|
2014-10-19 00:16:22 +02:00
|
|
|
#endif
|
|
|
|
|
2015-10-03 15:25:03 +02:00
|
|
|
/****************************************************************************
|
2014-10-19 00:16:22 +02:00
|
|
|
* Name: efm32_uartconfigure
|
|
|
|
*
|
|
|
|
* Description:
|
2014-10-21 16:48:38 +02:00
|
|
|
* Configure a U[S]ART as a RS-232 UART.
|
2014-10-19 00:16:22 +02:00
|
|
|
*
|
2015-10-03 15:25:03 +02:00
|
|
|
****************************************************************************/
|
2014-10-19 00:16:22 +02:00
|
|
|
|
|
|
|
#ifdef HAVE_UART_DEVICE
|
2014-10-20 16:11:42 +02:00
|
|
|
void efm32_uartconfigure(uintptr_t base, uint32_t baud, unsigned int parity,
|
|
|
|
unsigned int nbits, bool stop2)
|
2014-10-19 00:16:22 +02:00
|
|
|
{
|
2014-10-20 16:11:42 +02:00
|
|
|
uint32_t regval = 0;
|
|
|
|
|
|
|
|
/* Make sure that the U[S]ART registers are in the reset state (except for
|
|
|
|
* ROUTE information which must be preserved).
|
|
|
|
*/
|
|
|
|
|
2014-10-21 16:48:38 +02:00
|
|
|
efm32_uart_reset(base);
|
2014-10-20 16:11:42 +02:00
|
|
|
|
|
|
|
/* Configure number of data bits */
|
|
|
|
|
|
|
|
switch (nbits)
|
|
|
|
{
|
|
|
|
case 4:
|
|
|
|
regval |= USART_FRAME_DATABITS_FOUR;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 5:
|
|
|
|
regval |= USART_FRAME_DATABITS_FIVE;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 6:
|
|
|
|
regval |= USART_FRAME_DATABITS_SIX;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 7:
|
|
|
|
regval |= USART_FRAME_DATABITS_SEVEN;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
case 8:
|
|
|
|
regval |= USART_FRAME_DATABITS_EIGHT;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 9:
|
|
|
|
regval |= USART_FRAME_DATABITS_NINE;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 10:
|
|
|
|
regval |= USART_FRAME_DATABITS_TEN;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 11:
|
|
|
|
regval |= USART_FRAME_DATABITS_ELEVEN;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 12:
|
|
|
|
regval |= USART_FRAME_DATABITS_TWELVE;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 13:
|
|
|
|
regval |= USART_FRAME_DATABITS_THIRTEEN;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 14:
|
|
|
|
regval |= USART_FRAME_DATABITS_FOURTEEN;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 15:
|
|
|
|
regval |= USART_FRAME_DATABITS_FIFTEEN;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 16:
|
|
|
|
regval |= USART_FRAME_DATABITS_SIXTEEN;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Configure parity */
|
|
|
|
|
|
|
|
switch (parity)
|
|
|
|
{
|
|
|
|
default:
|
|
|
|
case 0:
|
|
|
|
regval |= USART_FRAME_PARITY_NONE;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 1:
|
|
|
|
regval |= USART_FRAME_PARITY_ODD;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 2:
|
|
|
|
regval |= USART_FRAME_PARITY_EVEN;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Configure stop bits */
|
|
|
|
|
|
|
|
if (stop2)
|
|
|
|
{
|
|
|
|
regval |= USART_FRAME_STOPBITS_TWO;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
regval |= USART_FRAME_STOPBITS_ONE;
|
|
|
|
}
|
|
|
|
|
|
|
|
putreg32(regval, base + EFM32_USART_FRAME_OFFSET);
|
|
|
|
|
|
|
|
/* Set the baud clock divisor */
|
|
|
|
|
2014-10-21 16:48:38 +02:00
|
|
|
efm32_uart_setbaud(base, baud);
|
2014-10-20 16:11:42 +02:00
|
|
|
|
|
|
|
/* Enable the U[S]ART */
|
|
|
|
|
|
|
|
putreg32(USART_CMD_RXEN | USART_CMD_TXEN, base + EFM32_USART_CMD_OFFSET);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2015-10-03 15:25:03 +02:00
|
|
|
/****************************************************************************
|
2014-10-21 16:48:38 +02:00
|
|
|
* Name: efm32_leuartconfigure
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Configure a LEUART as a RS-232 UART.
|
|
|
|
*
|
2015-10-03 15:25:03 +02:00
|
|
|
****************************************************************************/
|
2014-10-21 16:48:38 +02:00
|
|
|
|
|
|
|
#ifdef HAVE_LEUART_DEVICE
|
|
|
|
void efm32_leuartconfigure(uintptr_t base, uint32_t baud, unsigned int parity,
|
|
|
|
unsigned int nbits, bool stop2)
|
|
|
|
{
|
|
|
|
uint32_t regval = 0;
|
|
|
|
|
2014-10-21 19:38:51 +02:00
|
|
|
/* Make sure that the LEUART registers are in the reset state (except for
|
2014-10-21 16:48:38 +02:00
|
|
|
* ROUTE information which must be preserved).
|
|
|
|
*/
|
|
|
|
|
2014-10-21 19:38:51 +02:00
|
|
|
efm32_leuart_reset(base);
|
2014-10-21 16:48:38 +02:00
|
|
|
|
|
|
|
/* Configure number of data bits */
|
|
|
|
|
|
|
|
switch (nbits)
|
|
|
|
{
|
|
|
|
default:
|
|
|
|
case 8:
|
|
|
|
regval |= LEUART_CTRL_DATABITS_EIGHT;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 9:
|
|
|
|
regval |= LEUART_CTRL_DATABITS_NINE;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Configure parity */
|
|
|
|
|
|
|
|
switch (parity)
|
|
|
|
{
|
|
|
|
default:
|
|
|
|
case 0:
|
|
|
|
regval |= LEUART_CTRL_PARITY_NONE;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 1:
|
|
|
|
regval |= LEUART_CTRL_PARITY_ODD;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 2:
|
|
|
|
regval |= LEUART_CTRL_PARITY_EVEN;
|
|
|
|
break;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Configure stop bits */
|
|
|
|
|
|
|
|
if (stop2)
|
|
|
|
{
|
|
|
|
regval |= _LEUART_CTRL_STOPBITS_TWO;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
regval |= _LEUART_CTRL_STOPBITS_ONE;
|
|
|
|
}
|
|
|
|
|
|
|
|
putreg32(regval, base + EFM32_LEUART_CTRL_OFFSET);
|
|
|
|
|
|
|
|
/* Set the baud clock divisor */
|
|
|
|
|
|
|
|
efm32_leuart_setbaud(base, baud);
|
|
|
|
|
2014-10-21 19:38:51 +02:00
|
|
|
/* Enable the LEUART */
|
2014-10-21 16:48:38 +02:00
|
|
|
|
|
|
|
putreg32(LEUART_CMD_RXEN | LEUART_CMD_TXEN, base + EFM32_LEUART_CMD_OFFSET);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2015-10-03 15:25:03 +02:00
|
|
|
/****************************************************************************
|
2014-10-21 16:48:38 +02:00
|
|
|
* Name: efm32_uart_reset
|
2014-10-20 16:11:42 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Reset the USART/UART by disabling it and restoring all of the registers
|
|
|
|
* to the initial, reset value. Only the ROUTE data set by efm32_lowsetup
|
|
|
|
* is preserved.
|
|
|
|
*
|
2015-10-03 15:25:03 +02:00
|
|
|
****************************************************************************/
|
2014-10-20 16:11:42 +02:00
|
|
|
|
2014-10-26 16:27:55 +01:00
|
|
|
#if defined(HAVE_UART_DEVICE) || defined(HAVE_SPI_DEVICE)
|
2014-10-21 16:48:38 +02:00
|
|
|
void efm32_uart_reset(uintptr_t base)
|
2014-10-20 16:11:42 +02:00
|
|
|
{
|
|
|
|
putreg32(USART_CMD_RXDIS | USART_CMD_TXDIS | USART_CMD_MASTERDIS |
|
|
|
|
USART_CMD_RXBLOCKDIS | USART_CMD_TXTRIDIS | USART_CMD_CLEARTX |
|
|
|
|
USART_CMD_CLEARRX, base + EFM32_USART_CMD_OFFSET);
|
|
|
|
putreg32(_USART_CTRL_RESETVALUE, base + EFM32_USART_CTRL_OFFSET);
|
|
|
|
putreg32(_USART_FRAME_RESETVALUE, base + EFM32_USART_FRAME_OFFSET);
|
|
|
|
putreg32(_USART_TRIGCTRL_RESETVALUE, base + EFM32_USART_TRIGCTRL_OFFSET);
|
|
|
|
putreg32(_USART_CLKDIV_RESETVALUE, base + EFM32_USART_CLKDIV_OFFSET);
|
|
|
|
putreg32(_USART_IEN_RESETVALUE, base + EFM32_USART_IEN_OFFSET);
|
|
|
|
putreg32(_USART_IFC_MASK, base + EFM32_USART_IFC_OFFSET);
|
|
|
|
|
|
|
|
putreg32(_USART_IRCTRL_RESETVALUE, base + EFM32_USART_IRCTRL_OFFSET);
|
|
|
|
#if defined(EFM32_USART_INPUT_OFFSET)
|
|
|
|
putreg32(_USART_INPUT_RESETVALUE, base + EFM32_USART_INPUT_OFFSET);
|
|
|
|
#endif
|
|
|
|
#if defined(EFM32_USART_I2SCTRL_OFFSET)
|
|
|
|
putreg32(_USART_I2SCTRL_RESETVALUE, base + EFM32_USART_I2SCTRL_OFFSET);
|
|
|
|
#endif
|
2014-10-19 00:16:22 +02:00
|
|
|
}
|
|
|
|
#endif
|
2014-10-21 16:48:38 +02:00
|
|
|
|
2015-10-03 15:25:03 +02:00
|
|
|
/****************************************************************************
|
2014-10-21 16:48:38 +02:00
|
|
|
* Name: efm32_leuart_reset
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Reset the USART/UART by disabling it and restoring all of the registers
|
|
|
|
* to the initial, reset value. Only the ROUTE data set by efm32_lowsetup
|
|
|
|
* is preserved.
|
|
|
|
*
|
2015-10-03 15:25:03 +02:00
|
|
|
****************************************************************************/
|
2014-10-21 16:48:38 +02:00
|
|
|
|
|
|
|
#ifdef HAVE_LEUART_DEVICE
|
|
|
|
void efm32_leuart_reset(uintptr_t base)
|
|
|
|
{
|
|
|
|
putreg32(LEUART_CMD_RXDIS | LEUART_CMD_TXDIS | LEUART_CMD_RXBLOCKDIS |
|
|
|
|
LEUART_CMD_CLEARTX | LEUART_CMD_CLEARRX,
|
|
|
|
base + EFM32_LEUART_CMD_OFFSET);
|
|
|
|
putreg32(_LEUART_CTRL_RESETVALUE, base + EFM32_LEUART_CTRL_OFFSET);
|
|
|
|
putreg32(_LEUART_CLKDIV_RESETVALUE, base + EFM32_LEUART_CLKDIV_OFFSET);
|
|
|
|
putreg32(_LEUART_STARTFRAME_RESETVALUE, base + EFM32_LEUART_STARTFRAME_OFFSET);
|
|
|
|
putreg32(_LEUART_SIGFRAME_RESETVALUE, base + EFM32_LEUART_SIGFRAME_OFFSET);
|
|
|
|
putreg32(_LEUART_IEN_RESETVALUE, base + EFM32_LEUART_IEN_OFFSET);
|
|
|
|
putreg32(_LEUART_IFC_MASK, base + EFM32_LEUART_IFC_OFFSET);
|
|
|
|
putreg32(_LEUART_PULSECTRL_RESETVALUE, base + EFM32_LEUART_PULSECTRL_OFFSET);
|
|
|
|
#if defined(EFM32_LEUART_INPUT_OFFSET)
|
|
|
|
putreg32(_LEUART_INPUT_RESETVALUE, base + EFM32_LEUART_INPUT_OFFSET);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
#endif
|