2008-02-11 18:15:52 +01:00
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/****************************************************************************
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2008-02-11 20:16:45 +01:00
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* arch/z8/include/z8/irq.h
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2008-02-11 18:15:52 +01:00
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* arch/chip/irq.h
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*
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* Copyright (C) 2008 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/* This file should never be included directed but, rather,
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* only indirectly through nuttx/irq.h (via arch/irq.h)
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*/
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#ifndef __ARCH_Z8_IRQ_H
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#define __ARCH_Z8_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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/****************************************************************************
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* Definitions
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****************************************************************************/
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2008-02-14 01:31:37 +01:00
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/* This is similar configuration information that is contained in ez8.h.
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* However, this file must be include-able by assembly language files and,
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* hence, cannot include ez8.h. The logic is fragmentary at present.
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*/
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2008-02-16 01:48:39 +01:00
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#ifndef ENCORE_VECTORS
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# if defined(_Z8ENCORE_F642X) || defined(_Z8ENCORE_64K_SERIES)
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# define ENCORE_VECTORS 1
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# endif
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2008-02-14 01:31:37 +01:00
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2008-02-16 01:48:39 +01:00
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# if defined(_Z8ENCORE_F640X) || defined(_Z8ENCORE_640_FAMILY)
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# define ENCORE_VECTORS 1
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# endif
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2008-02-14 01:31:37 +01:00
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2008-02-16 01:48:39 +01:00
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# if defined(_Z8ENCORE_F08X) || defined(_Z8ENCORE_8K_SERIES)
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# define ENCORE_VECTORS 1
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# endif
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2008-02-14 01:31:37 +01:00
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2008-02-16 01:48:39 +01:00
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# if defined(_Z8ENCORE_4K_SERIES)
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# define ENCORE_VECTORS 1
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# endif
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2008-02-14 01:31:37 +01:00
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#endif
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2008-02-16 14:47:29 +01:00
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/* ez8 Interrupt Numbers ****************************************************/
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2008-02-13 20:50:48 +01:00
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#if defined(ENCORE_VECTORS)
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# define Z8_WDT_IRQ 0
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# define Z8_TRAP_IRQ 1
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# define Z8_TIMER2_IRQ 2 /* Only if EZ8_TIMER3 defined */
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# define Z8_TIMER1_IRQ 3
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# define Z8_TIMER0_IRQ 4
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# define Z8_UART0_RX_IRQ 5 /* Only if EZ8_UART0 defined */
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# define Z8_UART0_TX_IRQ 6 /* Only if EZ8_UART0 defined */
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# define Z8_I2C_IRQ 7 /* Only if EZ8_I2C defined */
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# define Z8_SPI_IRQ 8 /* Only if EZ8_SPI defined */
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# define Z8_ADC_IRQ 9 /* Only if EZ8_ADC defined */
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# define Z8_P7AD_IRQ 10
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# define Z8_P6AD_IRQ 11
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# define Z8_P5AD_IRQ 12
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# define Z8_P4AD_IRQ 13
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# define Z8_P3AD_IRQ 14
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# define Z8_P2AD_IRQ 15
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# define Z8_P1AD_IRQ 16
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# define Z8_P0AD_IRQ 17
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# define Z8_TIMER3_IRQ 18 /* Only if EZ8_TIMER4 defined */
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# define Z8_UART1_RX_IRQ 19 /* Only if EZ8_UART1 defined */
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# define Z8_UART1_TX_IRQ 20 /* Only if EZ8_UART1 defined */
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# define Z8_DMA_IRQ 21 /* Only if EZ8_DMA defined */
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# define Z8_C3_IRQ 22 /* Only if EZ8_PORT1 defined */
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# define Z8_C2_IRQ 23 /* Only if EZ8_PORT1 defined */
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# define Z8_C1_IRQ 24 /* Only if EZ8_PORT1 defined */
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# define Z8_C0_IRQ 25 /* Only if EZ8_PORT1 defined */
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# define NR_IRQS (26)
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#elif defined(ENCORE_XP_VECTORS)
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# define Z8_WDT_IRQ 0
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# define Z8_TRAP_IRQ 1
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# define Z8_TIMER2_IRQ 2 /* Only if EZ8_TIMER3 defined */
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# define Z8_TIMER1_IRQ 3
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# define Z8_TIMER0_IRQ 4
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# define Z8_UART0_RX_IRQ 5 /* Only if EZ8_UART0 defined */
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# define Z8_UART0_TX_IRQ 6 /* Only if EZ8_UART0 defined */
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# define Z8_I2C_IRQ 7 /* Only if EZ8_I2C defined */
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# define Z8_SPI_IRQ 8 /* Only if EZ8_SPI defined */
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# define Z8_ADC_IRQ 9 /* Only if EZ8_ADC or EZ8_ADC_NEW defined */
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# define Z8_P7AD_IRQ 10
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# define Z8_P6AD_IRQ 11
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# define Z8_P5AD_IRQ 12
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# define Z8_P4AD_IRQ 13
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# define Z8_P3AD_IRQ 14
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# define Z8_P2AD_IRQ 15
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# define Z8_P1AD_IRQ 16
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# define Z8_P0AD_IRQ 17
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# define Z8_TIMER3_IRQ 18 /* Only if EZ8_TIMER4 defined */
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# define Z8_UART1_RX_IRQ 19 /* Only if EZ8_UART1 defined */
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# define Z8_UART1_TX_IRQ 20 /* Only if EZ8_UART1 defined */
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# define Z8_DMA_IRQ 21 /* Only if EZ8_DMA defined */
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# define Z8_C3_IRQ 22 /* Only if EZ8_PORT1 defined */
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# define Z8_C2_IRQ 23 /* Only if EZ8_PORT1 defined */
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# define Z8_C1_IRQ 24 /* Only if EZ8_PORT1 defined */
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# define Z8_C0_IRQ 25 /* Only if EZ8_PORT1 defined */
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# define Z8_POTRAP_IRQ 27
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# define Z8_WOTRAP_IRQ 28
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# define NR_IRQS (29)
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#elif defined(ENCORE_XP16K_VECTORS)
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# define Z8_WDT_IRQ 0
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# define Z8_TRAP_IRQ 1
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# define Z8_TIMER2_IRQ 2 /* Only if EZ8_TIMER3 defined */
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# define Z8_TIMER1_IRQ 3
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# define Z8_TIMER0_IRQ 4
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# define Z8_UART0_RX_IRQ 5 /* Only if EZ8_UART0 defined */
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# define Z8_UART0_TX_IRQ 6 /* Only if EZ8_UART0 defined */
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# define Z8_I2C_IRQ 7 /* Only if EZ8_I2C defined */
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2008-02-14 00:57:43 +01:00
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# define Z8_SPI_IRQ 8 /* Only if EZ8_ESPI defined */
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2008-02-13 20:50:48 +01:00
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# define Z8_ADC_IRQ 9 /* Only if EZ8_ADC_NEW defined */
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# define Z8_P7AD_IRQ 10
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# define Z8_P6AD_IRQ 11
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# define Z8_P5AD_IRQ 12
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# define Z8_P4AD_IRQ 13
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# define Z8_P3AD_IRQ 14
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# define Z8_P2AD_IRQ 15
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# define Z8_P1AD_IRQ 16
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# define Z8_P0AD_IRQ 17
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# define Z8_MCT_IRQ 19 /* Only if EZ8_MCT defined */
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# define Z8_UART1_RX_IRQ 20 /* Only if EZ8_UART1 defined */
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# define Z8_UART1_TX_IRQ 21 /* Only if EZ8_UART1 defined */
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# define Z8_C3_IRQ 22
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# define Z8_C2_IRQ 23
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# define Z8_C1_IRQ 24
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# define Z8_C0_IRQ 25
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# define Z8_POTRAP_IRQ 27
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# define Z8_WOTRAP_IRQ 28
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# define NR_IRQS (29)
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#elif defined(ENCORE_MC_VECTORS)
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# define Z8_WDT_IRQ 0
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# define Z8_TRAP_IRQ 1
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# define Z8_PWMTIMER_IRQ 2
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# define Z8_PWMFAULT_IRQ 3
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# define Z8_ADC_IRQ 4 /* Only if EZ8_ADC_NEW defined */
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# define Z8_CMP_IRQ 5
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# define Z8_TIMER0_IRQ 6
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# define Z8_UART0_RX_IRQ 7 /* Only if EZ8_UART0 defined */
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# define Z8_UART0_TX_IRQ 8 /* Only if EZ8_UART0 defined */
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# define Z8_SPI_IRQ 9 /* Only if EZ8_SPI defined */
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# define Z8_I2C_IRQ 10 /* Only if EZ8_I2C defined */
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# define Z8_C0_IRQ 12
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# define Z8_PB_IRQ 13
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2008-02-14 00:57:43 +01:00
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# define Z8_P7AP3A_IRQ 14
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# define Z8_P6AP2A_IRQ 15
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# define Z8_P5AP1A_IRQ 16
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# define Z8_P4AP0A_IRQ 17
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2008-02-13 20:50:48 +01:00
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# define Z8_POTRAP_IRQ 27
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# define Z8_WOTRAP_IRQ 28
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# define NR_IRQS (29)
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2008-02-11 18:15:52 +01:00
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2008-02-13 20:50:48 +01:00
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#endif
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2008-02-11 18:15:52 +01:00
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2008-02-13 20:50:48 +01:00
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#define Z8_IRQ_SYSTIMER Z8_TIMER0_IRQ
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2008-02-11 18:15:52 +01:00
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2008-02-16 14:47:29 +01:00
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/* IRQ Management Macros ****************************************************/
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/* These macros map IRQ numbers to IRQ registers and bits.
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* WARNING: These have only been verified for the Z8F640X family!
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*/
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2008-02-16 15:48:35 +01:00
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#ifdef ENCORE_VECTORS
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2008-02-16 14:47:29 +01:00
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# define Z8_IRQ0_MIN Z8_TIMER2_IRQ
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2008-02-16 16:40:11 +01:00
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# define Z8_IRQ0_BIT(irq) (1 << (Z8_ADC_IRQ - (irq)))
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2008-02-16 14:47:29 +01:00
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# define Z8_IRQ0_MAX Z8_ADC_IRQ
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# define Z8_IRQ1_MIN Z8_P7AD_IRQ
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2008-02-16 16:40:11 +01:00
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# define Z8_IRQ1_BIT(irq) (1 << (Z8_P0AD_IRQ - (irq)))
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2008-02-16 14:47:29 +01:00
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# define Z8_IRQ1_MAX Z8_P0AD_IRQ
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# define Z8_IRQ2_MIN Z8_TIMER3_IRQ
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2008-02-16 16:40:11 +01:00
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# define Z8_IRQ2_BIT(irq) (1 << (Z8_C0_IRQ - (irq)))
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2008-02-16 14:47:29 +01:00
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# define Z8_IRQ2_MAX Z8_C0_IRQ
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#else
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# error "Add IRQ support for Z8F family"
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#endif
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/* IRQ State Save Format ****************************************************
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2008-02-11 18:15:52 +01:00
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*
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2008-02-14 18:24:14 +01:00
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* These indices describe how the ez8 context is save in the state save array
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2008-02-11 20:16:45 +01:00
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*
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2008-02-14 18:24:14 +01:00
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* Byte offsets:
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2008-02-11 20:16:45 +01:00
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*/
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2008-02-14 18:24:14 +01:00
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#define XCPT8_R0 (0) /* Offset 0-15: R0-R15 */
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#define XCPT8_R1 (1)
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#define XCPT8_R2 (2)
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#define XCPT8_R3 (3)
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#define XCPT8_R4 (4)
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#define XCPT8_R5 (5)
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#define XCPT8_R6 (6)
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#define XCPT8_R7 (7)
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#define XCPT8_R8 (8)
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#define XCPT8_R9 (9)
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#define XCPT8_R10 (10)
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#define XCPT8_R11 (11)
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#define XCPT8_R12 (12)
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#define XCPT8_R13 (13)
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#define XCPT8_R14 (14)
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#define XCPT8_R15 (15)
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#define XCPT8_SPH (16) /* Offset 16: SP[8:15] */
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#define XCPT8_SPL (17) /* Offset 17: SP[0:7] */
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#define XCPT8_RP (18) /* Offset 18: Register pointer */
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#define XCPT8_FLAGS (19) /* Offset 19: FLAGS */
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#define XCPT8_PCH (20) /* Offset 20: PC[8:15] */
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#define XCPT8_PCL (21) /* Offset 21: PC[0:7] */
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/* 16-bit "word" offsets */
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#define XCPT_RR0 (0) /* Indices 0-7: RR0-RR14 */
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#define XCPT_RR2 (1)
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#define XCPT_RR4 (2)
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#define XCPT_RR6 (3)
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#define XCPT_RR8 (4)
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#define XCPT_RR10 (5)
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#define XCPT_RR12 (6)
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2008-02-15 20:54:58 +01:00
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#define XCPT_RR14 (7)
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2008-02-14 21:53:15 +01:00
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#define XCPT_IRQCTL (8) /* Index 8: IRQCTL register */
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#define XCPT_SP (9) /* Index 9: SP[8:15] */
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#define XCPT_RPFLAGS (10) /* Index 10: RP (MS) and FLAGS (LS) */
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#define XCPT_PC (11) /* Index 11: PC[8:15] */
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2008-02-14 18:24:14 +01:00
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2008-02-14 21:53:15 +01:00
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#define XCPTCONTEXT_REGS (12)
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2008-02-14 18:24:14 +01:00
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/* Byte offsets: */
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2008-02-15 15:28:54 +01:00
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#define XCPT_R0_OFFS (2*XCPT_RR0) /* Offset 0-15: R0-R15 */
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2008-02-14 18:24:14 +01:00
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#define XCPT_R1_OFFS (2*XCPT_RR0+1)
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#define XCPT_R2_OFFS (2*XCPT_RR2)
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#define XCPT_R3_OFFS (2*XCPT_RR2+1)
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#define XCPT_R4_OFFS (2*XCPT_RR4)
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#define XCPT_R5_OFFS (2*XCPT_RR4+1)
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#define XCPT_R6_OFFS (2*XCPT_RR6)
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#define XCPT_R7_OFFS (2*XCPT_RR6+1)
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#define XCPT_R8_OFFS (2*XCPT_RR8)
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#define XCPT_R9_OFFS (2*XCPT_RR8+1)
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#define XCPT_R10_OFFS (2*XCPT_RR10)
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#define XCPT_R11_OFFS (2*XCPT_RR10+1)
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#define XCPT_R12_OFFS (2*XCPT_RR12)
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#define XCPT_R13_OFFS (2*XCPT_RR12+1)
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2008-02-15 20:54:58 +01:00
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#define XCPT_R14_OFFS (2*XCPT_RR14)
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#define XCPT_R15_OFFS (2*XCPT_RR14+1)
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2008-02-15 15:28:54 +01:00
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#define XCPT_UNUSED_OFFS (2*XCPT_IRQCTL) /* Offset 16: Unused (zero) */
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#define XCPT_IRQCTL_OFFS (2*XCPT_IRQCTL+1) /* offset 17: IRQCTL register */
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#define XCPT_SPH_OFFS (2*XCPT_SP) /* Offset 18: SP[8:15] */
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#define XCPT_SPL_OFFS (2*XCPT_SP+1) /* Offset 19: SP[0:7] */
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#define XCPT_RP_OFFS (2*XCPT_RPFLAGS) /* Offset 20: Register pointer */
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#define XCPT_FLAGS_OFFS (2*XCPT_RPFLAGS+1) /* Offset 21: FLAGS */
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#define XCPT_PCH_OFFS (2*XCPT_PC) /* Offset 22: PC[8:15] */
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#define XCPT_PCL_OFFS (2*XCPT_PC+1) /* Offset 23: PC[0:7] */
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2008-02-14 18:24:14 +01:00
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#define XCPTCONTEXT_SIZE (2*XCPTCONTEXT_REGS)
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2008-02-11 18:15:52 +01:00
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* This is the the type of the register save array */
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typedef uint16 chipreg_t;
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/* This struct defines the way the registers are stored. */
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struct xcptcontext
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{
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/* Register save area */
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2008-02-14 18:24:14 +01:00
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chipreg_t regs[XCPTCONTEXT_REGS];
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2008-02-11 18:15:52 +01:00
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/* The following function pointer is non-zero if there
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* are pending signals to be processed.
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*/
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#ifndef CONFIG_DISABLE_SIGNALS
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2008-02-12 15:37:55 +01:00
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CODE void *sigdeliver; /* Actual type is sig_deliver_t */
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2008-02-11 18:15:52 +01:00
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/* The following retains that state during signal execution */
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uint16 saved_pc; /* Saved return address */
|
2008-02-16 00:11:51 +01:00
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uint16 saved_irqctl; /* Saved interrupt state */
|
2008-02-11 18:15:52 +01:00
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#endif
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};
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#endif
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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/****************************************************************************
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* Public Variables
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C" {
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#else
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#define EXTERN extern
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#endif
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|
2008-02-12 15:37:55 +01:00
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EXTERN irqstate_t irqsave(void);
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EXTERN void irqrestore(irqstate_t flags);
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|
2008-02-11 18:15:52 +01:00
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_Z8_IRQ_H */
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