146 lines
5.1 KiB
C
146 lines
5.1 KiB
C
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/****************************************************************************
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* arch/ez80f910200zco/src/ez80f910200zco.h
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*
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* Copyright (C) 2008 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef _CONFIGS_EZ80F910200ZCO_SRC_EZ80F910200ZCO+H
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#define _CONFIGS_EZ80F910200ZCO_SRC_EZ80F910200ZCO+H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/* Memory map */
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#define EZ80_ONCHIPFLASH 0x000000 /* CS0: 256Kb of on-chip flash */
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#define EZ80_OFFCHIPFLASH 0x400000 /* CS0: Off chip flash (Up to 4Mb-256Kb) */
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#define EZ80_LEDGPIOCNTRL 0x800000 /* CS2: (See below) */
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#define EZ80_PLTFMSRAM 0xb80000 /* CS2: Platform SRAM (512Kb) */
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#define EZ80_MODULESRAM 0xc00000 /* CS1: Module SRAM (up to 2Mb) */
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#define EZ80_ONCHIPFLASH 0xffe000 /* On-chip SRAM (8Kb) */
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/* LED and port emulation memory register addresses */
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#define EZ80_LEDANODE 0x800000 /* WR: LED anode/GPIO port output control */
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#define EZ80_GPIOCNTRL EZ80_LEDANODE
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#define EZ80_LEDCATHODE 0x800001 /* WR: LED cathode/Modem/Trig */
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#define EZ80_MODEM EZ80_LEDCATHODE
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#define EZ80_TRIGGERS EZ80_LEDCATHODE
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#define EZ80_GPIODATA 0x800002 /* RD/WR: GPIO data */
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#define getmmreg(a) (*(ubyte*)(a))
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#define putmmreg(v,a) (*(ubyte*)(a) = (v))
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/* LED anode/GPIO port output control bit definitions */
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#define EZ80_ANODECOL1 0x01
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#define EZ80_ANODECOL2 0x02
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#define EZ80_ANODECOL3 0x04
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#define EZ80_ANODECOL4 0x08
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#define EZ80_ANODECOL5 0x10
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#define EZ80_ANODECOL6 0x20
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#define EZ80_ANODECOL7 0x40
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#define EZ80_GPIOOUTPUT 0x80
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/* LED cathode/Modem/Trig bit definitions */
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#define EZ80_CATHODEROW5 0x01
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#define EZ80_CATHODEROW4 0x02
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#define EZ80_CATHODEROW3 0x04
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#define EZ80_CATHODEROW2 0x08
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#define EZ80_CATHODEROW1 0x10
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#define EZ80_MODEMRESET 0x20
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#define EZ80_TRIG1 0x40
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#define EZ80_TRIG2 0x80
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/* GPIO data bit definitions */
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#define EZ80_GPIOD0 0x01
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#define EZ80_GPIOD1 0x02
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#define EZ80_GPIOD2 0x04
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#define EZ80_GPIOD3 0x08
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#define EZ80_GPIOD4 0x10
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#define EZ80_GPIOD5 0x20
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#define EZ80_GPIOD6 0x40
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#define EZ80_GPIOD7 0x80
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/* Modem Signals:
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*
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* DCD:
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* The Data Carrier Detect (DCD) signal at D1 indicates that a good carrier
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* signal is being received from the remove mode.
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* RX:
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* The RX signal at D2 indicates that data is received from the modem.
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* DTR:
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* The Data Terminal Ready (DTR) signal at D3 informs the modem that the PC
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* is ready.
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* TX:
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* The TX signal at D4 indicates that data is tranmitted to the modem.
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*/
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/* Push buttons:
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*
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* PB0 SW1 Bit 0 of GPIO Port B
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* PB1 SW2 Bit 1 of GPIO Port B
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* PB2 SW3 Bit 2 of GPIO Port B
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* RESET SW4
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*/
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#define EZ80_PB0_IRQ EZ80_PORTB0_IRQ /* Vector Oxa0 */
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#define EZ80_PB1_IRQ EZ80_PORTB1_IRQ /* Vector Oxa4 */
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#define EZ80_PB2_IRQ EZ80_PORTB2_IRQ /* Vector Oxa8 */
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C" {
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* _CONFIGS_EZ80F910200ZCO_SRC_EZ80F910200ZCO+H */
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